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fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.bsf

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/** @file
Boot Setting File for Platform Configuration.
Copyright (c) 2022, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
This file is automatically generated. Please do NOT modify !!!
**/
GlobalDataDef
SKUID = 0, "DEFAULT"
EndGlobalData
StructDef
Find "ADLUPD_T"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 87 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_PcdPciExpressBaseAddress 8 bytes $_DEFAULT_ = 0xC0000000
$gPlatformFspPkgTokenSpaceGuid_PcdPciExpressRegionLength 4 bytes $_DEFAULT_ = 0x10000000
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDataBits 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugMmioBase 4 bytes $_DEFAULT_ = 0xFE036000
$gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags 1 bytes $_DEFAULT_ = 0x012
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartDataBits 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMmioBase 4 bytes $_DEFAULT_ = 0xFE034000
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_FspDebugHandler 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsPolarity 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsEnable 2 bytes $_DEFAULT_ = 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiDefaultCsOutput 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsState 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiNumber 1 bytes $_DEFAULT_ = 0x0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMmioBase 4 bytes $_DEFAULT_ = 0x0
Find "ADLUPD_M"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 55 bytes
$gPlatformFspPkgTokenSpaceGuid_PlatformMemorySize 8 bytes $_DEFAULT_ = 0x550000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen 2 bytes $_DEFAULT_ = 0x200
$gPlatformFspPkgTokenSpaceGuid_EnableAbove4GBMmio 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogDevice 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr000 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr001 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr010 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr011 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr020 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr021 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr030 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr031 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr100 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr101 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr110 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr111 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr120 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr121 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr130 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr131 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_RcompResistor 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_RcompTarget 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch0 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch1 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch2 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch3 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch0 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch1 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch2 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch3 2 bytes $_DEFAULT_ = 0, 1
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch0 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch1 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch2 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch3 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch0 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch1 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch2 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch3 16 bytes $_DEFAULT_ = 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
$gPlatformFspPkgTokenSpaceGuid_DqPinsInterleaved 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SmramMask 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Ibecc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeEnable 8 bytes $_DEFAULT_ = 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeBase 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeMask 32 bytes $_DEFAULT_ = 0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03,0xE0,0xFF,0xFF,0x03
$gPlatformFspPkgTokenSpaceGuid_MrcFastBoot 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_RmtPerTask 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TrainTrace 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_TsegSize 4 bytes $_DEFAULT_ = 0x0400000
$gPlatformFspPkgTokenSpaceGuid_MmioSize 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ProbelessTrace 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SpdAddressTable 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciDbcMode 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_DciModphyPg 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPreMemRsvd 5 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_X2ApicOptOut 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmaControlGuarantee 1 bytes $_DEFAULT_ = 0x1
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_VtdBaseAddress 36 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VtdDisable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VtdIgdEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdIpuEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdIopEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VtdItbtEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc 1 bytes $_DEFAULT_ = 0xFE
$gPlatformFspPkgTokenSpaceGuid_InternalGfx 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ApertureSize 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_UserBd 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SaGv 1 bytes $_DEFAULT_ = 0x05
$gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RMT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch3 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch3 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ScramblerSupport 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RefClk 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VddVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_Ratio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCL 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCWL 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_tFAW 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRAS 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRCDtRP 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_tREFI 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRFC 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_tRRD 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRTP 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NModeSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchIshEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaGvGear 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SaGvFreq 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_GearRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HeciTimeouts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Heci1BarAddress 4 bytes $_DEFAULT_ = 0xFEDA2000
$gPlatformFspPkgTokenSpaceGuid_Heci2BarAddress 4 bytes $_DEFAULT_ = 0xFEDA3000
$gPlatformFspPkgTokenSpaceGuid_Heci3BarAddress 4 bytes $_DEFAULT_ = 0xFEDA4000
$gPlatformFspPkgTokenSpaceGuid_HgDelayAfterPwrEn 2 bytes $_DEFAULT_ = 300
$gPlatformFspPkgTokenSpaceGuid_HgDelayAfterHoldReset 2 bytes $_DEFAULT_ = 100
$gPlatformFspPkgTokenSpaceGuid_MmioSizeAdjustment 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay 1 bytes $_DEFAULT_ = 0x3
$gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize 1 bytes $_DEFAULT_ = 0x0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_GmAdr 4 bytes $_DEFAULT_ = 0xB0000000
$gPlatformFspPkgTokenSpaceGuid_GttMmAdr 4 bytes $_DEFAULT_ = 0xAF000000
$gPlatformFspPkgTokenSpaceGuid_GttSize 2 bytes $_DEFAULT_ = 0x3
$gPlatformFspPkgTokenSpaceGuid_CpuPcie0Rtd3Gpio 24 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_TxtImplemented 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SaOcSupport 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageMode 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtMaxOcRatio 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageOffset 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtVoltageOverride 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_GtExtraTurboVoltage 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SaVoltageOffset 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_RootPortIndex 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieMultipleSegmentEnabled 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SaIpuEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed 8 bytes $_DEFAULT_ = 0x04, 0x01, 0x02, 0x04, 0x04, 0x04, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CsiSpeed 8 bytes $_DEFAULT_ = 0x2, 0x1, 0x2, 0x2, 0x2, 0x2, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_ImguClkOutEn 6 bytes $_DEFAULT_ = 0x1, 0x1, 0x1, 0x1, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableMask 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable 3 bytes $_DEFAULT_ = 0x1, 0x1, 0x1
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPcieSpeed 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_GtPsmiSupport 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortAHpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortBHpd 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortCHpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort1Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort2Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort3Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort4Hpd 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortADdc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPortBDdc 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DdiPortCDdc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort1Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort2Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort3Ddc 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DdiPort4Ddc 1 bytes $_DEFAULT_ = 0x0
Skip 7 bytes
$gPlatformFspPkgTokenSpaceGuid_GmAdr64 8 bytes $_DEFAULT_ = 0xB0000000
$gPlatformFspPkgTokenSpaceGuid_PerCoreHtDisable 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SaVoltageMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaExtraTurboVoltage 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VddqVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_VppVoltage 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_CpuPcieNewFom 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiNewFom 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DynamicMemoryBoost 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_HgSupport 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryFrequency 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SaPreMemProductionRsvd 97 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GtClosEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3ProgramStaticEq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DmiGen3RootPortPreset 8 bytes $_DEFAULT_ = 0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointHint 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_DmiGen3RxCtlePeaking 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DmiAspm 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_DmiHweq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase23Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase3Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen3RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpre 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpo 8 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCm 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortRxPreset 8 bytes $_DEFAULT_ = 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01
$gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortRxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCm 8 bytes $_DEFAULT_ = 0x0, 0x7, 0x6, 0x7, 0x7, 0x7, 0x7, 0x7
$gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCp 8 bytes $_DEFAULT_ = 0x0, 0xE, 0xA, 0x7, 0x7, 0x7, 0x7, 0x7
$gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase23Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase3Bypass 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_Gen4RtcoRtpoEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_Gen4LtcoEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpre 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpo 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPresetEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPortTxPreset 8 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_DmiAspmCtrl 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_DmiAspmL1ExitLatency 1 bytes $_DEFAULT_ = 0x4
$gPlatformFspPkgTokenSpaceGuid_BistOnReset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SkipStopPbet 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableC6Dram 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_OcSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_OcLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CoreMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingMaxOcRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HyperThreading 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuRatioOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuRatio 1 bytes $_DEFAULT_ = 0x1C
$gPlatformFspPkgTokenSpaceGuid_BootFrequency 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_FClkFrequency 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmxEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Avx2RatioOffset 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_Avx3RatioOffset 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_BclkAdaptiveVoltage 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageAdaptive 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CorePllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingDownBin 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RingVoltageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TjMaxOffset 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_RingVoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVoltageAdaptive 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TmeEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DebugInterfaceLockEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageAdaptive 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffset 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffsetPrefix 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_IaCepEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_GtCepEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_DlvrBypassModeEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffset 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffsetPrefix 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreRatioOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PerCoreRatio 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomClusterRatio 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CoreRatioExtensionMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PvdRatioThreshold 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_UnlimitedIccMax 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CrashLogGprs 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffset 30 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetPrefix 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointRatio 15 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_RingVfPointCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BclkSource 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_GpioOverride 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuBclkOcFrequency 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_DisablePerCoreMask 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisablePerAtomMask 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SiSkipOverrideBootModeWhenFwUpdate 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IaIccUnlimitedMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IaIccMax 2 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_GtIccUnlimitedMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_GtIccMax 2 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold0 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold0 1 bytes $_DEFAULT_ = 0x46
$gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold1 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold1 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_FllOcModeEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FllOverclockMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_CustomPowerLimit1 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Etvb 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_UnderVoltProtection 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPreMem 6 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BiosGuard 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_Txt 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PrmrrSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SinitMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtDprMemoryBase 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_TxtHeapMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtDprMemorySize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BiosAcmBase 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BiosAcmSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ApStartupBase 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TgaSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_TxtLcpPdBase 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_TxtLcpPdSize 8 bytes $_DEFAULT_ = 0x0000000000000000
$gPlatformFspPkgTokenSpaceGuid_IsTPMPresence 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ReservedSecurityPreMem 32 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtleEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtle 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmpEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmp 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmphEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmph 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5Enable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0Enable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMagEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMag 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmphEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmph 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchLpcEnhancePort8xhDecoding 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPort80Route 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusArpEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchNumRsvdSmbusAddresses 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchSmbusIoBase 2 bytes $_DEFAULT_ = 0xEFA0
$gPlatformFspPkgTokenSpaceGuid_PchSmbAlertEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieClkSrcUsage 18 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
Skip 14 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieClkSrcClkReq 18 bytes $_DEFAULT_ = 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x00, 0x01
Skip 17 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieClkReqGpioMux 72 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_RsvdSmbusAddressTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PcieRpEnableMask 4 bytes $_DEFAULT_ = 0x00FFFFFF
$gPlatformFspPkgTokenSpaceGuid_PchHdaVcType 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaDspUaaCompliance 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkHdaEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHdaSdiEnable 2 bytes $_DEFAULT_ = 0x01, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicEnable 2 bytes $_DEFAULT_ = 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkAPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkBPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaDspEnable 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicDataPinMux 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSspEnable 6 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSndwEnable 4 bytes $_DEFAULT_ = 0x01, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PchHdaIDispCodecDisconnect 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CnviDdrRfim 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags 1 bytes $_DEFAULT_ = 0x32
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugAutoFlow 1 bytes $_DEFAULT_ = 0x0
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugBaudRate 4 bytes $_DEFAULT_ = 115200
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugDataBits 1 bytes $_DEFAULT_ = 0x8
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMmioBase 4 bytes $_DEFAULT_ = 0xFE036000
$gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GtPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RingPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_McPllVoltageOffset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MrcSafeConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie0En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie1En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie2En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie3En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssXhciEn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssXdciEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TcssDma0En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssDma1En 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_HobBufferSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ECT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SOT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ERDMPRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDMPRT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RCVET 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_JWRL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EWRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ERDTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRVC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDTC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMODTT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMRONT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRDSEQT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRSRT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDODTT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDEQT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDAPT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDTC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WRVC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVC2D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDVC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_LCT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RTL 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TAT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MEMTST 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ALIASCHK 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RCVENC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RMC 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRDSUDT 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EccSupport 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RemapEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RankInterleave 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnhancedInterleave 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ChHashEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ChHashOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableExtts 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnablePwrDn 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnablePwrDnLpddr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SrefCfgEna 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeatLpddr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeat 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RhSelect 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ExitOnFailure 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DCC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVC1D 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TXTCO 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CLKTCO 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDSR 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDDSEQ 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DIMMODTCA 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TXTCODQS 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CMDDRUD 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VCCDLLBP 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PVTTDNLP 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RDVREFDC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VDDQT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RMTBIT 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EccDftEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Write0 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedClock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedZq 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ChHashMask 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_BClkFrequency 4 bytes $_DEFAULT_ = 100000000
$gPlatformFspPkgTokenSpaceGuid_Idd3n 2 bytes $_DEFAULT_ = 0x1A
$gPlatformFspPkgTokenSpaceGuid_Idd3p 2 bytes $_DEFAULT_ = 0x0B
$gPlatformFspPkgTokenSpaceGuid_CMDNORM 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EWRDSEQ 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_McRefresh2X 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0xD4
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm0 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm1 1 bytes $_DEFAULT_ = 0xDD
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AllowOppRefBelowWriteThrehold 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WriteThreshold 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh0 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnCmdRate 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_Refresh2X 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EpgEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Lfsr0Mask 1 bytes $_DEFAULT_ = 0xB
$gPlatformFspPkgTokenSpaceGuid_UserThresholdEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_UserBudgetEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerDownMode 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PwdwnIdleCounter 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CmdRanksTerminated 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SafeMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CleanMemory 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpDdrDqDqsReTraining 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_UsbTcPortEnPreMem 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PostCodeOutputPort 2 bytes $_DEFAULT_ = 0x80
$gPlatformFspPkgTokenSpaceGuid_RMTLoopCount 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CridEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WrcFeatureEnable 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_BclkRfiFreq 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrSize 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrEnabled 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieImrRpLocation 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieImrRpSelection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Lfsr1Mask 1 bytes $_DEFAULT_ = 0xB
$gPlatformFspPkgTokenSpaceGuid_LpddrRttWr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpddrRttCa 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RefreshPanicWm 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_RefreshHpWm 1 bytes $_DEFAULT_ = 0x07
$gPlatformFspPkgTokenSpaceGuid_Lp5CccConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CmdMirror 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DIMMDFE 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ExtendedBankHashing 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RefreshWm 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_McRefreshRate 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PeriodicDcc 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LpMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TXDQSDCC 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DRAMDCA 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EARLYDIMMDFE 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SkipExtGfxScan 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_BdatEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_LockPTMregs 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PegGen3Rsvd 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PanelPowerEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_BdatTestType 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_DmaBufferSize 4 bytes $_DEFAULT_ = 0x0400000
$gPlatformFspPkgTokenSpaceGuid_PreBootDmaMask 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_OemT12DelayOverride 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SaPreMemTestRsvd 89 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_TotalFlashSize 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_BiosSize 2 bytes $_DEFAULT_ = 0x2800
$gPlatformFspPkgTokenSpaceGuid_SecurityTestRsvd 12 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusDynamicPowerGating 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WdtDisableAndLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbusSpdWriteDisable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DidInitStat 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DisableCpuReplacedPolling 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_DisableMessageCheck 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SkipMbpHob 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_HeciCommunication2 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_KtDeviceEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SkipCpuReplacementCheck 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuPcie1Rtd3Gpio 96 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcie2Rtd3Gpio 96 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcie3Rtd3Gpio 96 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_Avx2VoltageScaleFactor 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Avx512VoltageScaleFactor 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugTxPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugCtsPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PprEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MarginLimitL2 2 bytes $_DEFAULT_ = 100
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpCdrRelock 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiCdrRelock 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl 1 bytes $_DEFAULT_ = 0x0
Skip 6 bytes
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjAddress 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjMask 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IbeccErrInjCount 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EnableDmaBuffer 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PllMaxBandingRatio 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_DebugValue 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BoardGpioTablePreMemAddress 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_tRFCpb 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRFC2 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRFC4 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRD_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tRRD_S 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tCCD_L 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_tWTR_S 1 bytes $_DEFAULT_ = 0x00
Skip 5 bytes
$gPlatformFspPkgTokenSpaceGuid_EccErrInjAddress 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EccErrInjMask 8 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EccErrInjCount 4 bytes $_DEFAULT_ = 0xF
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMask 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIA 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorGT 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIO 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorStall 1 bytes $_DEFAULT_ = 0x1E
$gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsDownControl 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsUpControl 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_16GB 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB_16GB 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_2R2R 2 bytes $_DEFAULT_ = 0x07D0
$gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCm 8 bytes $_DEFAULT_ = 0x06, 0x05, 0x02, 0x09, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCp 8 bytes $_DEFAULT_ = 0x05, 0x03, 0x07, 0x08, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_LctCmdEyeWidth 2 bytes $_DEFAULT_ = 0x60
$gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmrLpddr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMaskEcc 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_Lp5BankMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_WRDS 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_OverloadSAM 1 bytes $_DEFAULT_ = 0x00
Find "ADLUPD_S"
$gPlatformFspPkgTokenSpaceGuid_Revision 1 bytes $_DEFAULT_ = 0x02
Skip 55 bytes
$gPlatformFspPkgTokenSpaceGuid_LogoPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LogoSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BltBufferAddress 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_BltBufferSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_GraphicsConfigPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Device4Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ShowSpiController 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionBase 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionSize 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TurboMode 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SataSalpSupport 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataPortsEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SataPortDevSlpPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PortUsb20Enable 16 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PortUsb30Enable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_XdciEnable 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_DevIntConfigPtr 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NumOfDevIntConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PxRcConfig 8 bytes $_DEFAULT_ = 0x0B, 0x0A, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B
$gPlatformFspPkgTokenSpaceGuid_GpioIrqRoute 1 bytes $_DEFAULT_ = 0x0E
$gPlatformFspPkgTokenSpaceGuid_SciIrqSelect 1 bytes $_DEFAULT_ = 0x09
$gPlatformFspPkgTokenSpaceGuid_TcoIrqSelect 1 bytes $_DEFAULT_ = 0x09
$gPlatformFspPkgTokenSpaceGuid_TcoIrqEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTableEntryNum 1 bytes $_DEFAULT_ = 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTablePtr 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_PchHdaCodecSxWakeCapability 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPolarity 14 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsEnable 14 bytes $_DEFAULT_ = 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiDefaultCsOutput 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsState 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartMode 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartBaudRate 28 bytes $_DEFAULT_ = 0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00,0x00,0xC2,0x01,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartParity 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDataBits 7 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartStopBits 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating 7 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDmaEnable 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartAutoFlow 7 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartRtsPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartCtsPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartRxPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartTxPinMuxPolicy 28 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoUartDbg2 7 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SerialIoI2cMode 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSdaPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSclPinMux 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cPadsTermination 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_IshGpGpioPinMuxing 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartRxPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartTxPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartRtsPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshUartCtsPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshI2cSclPinMuxing 12 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiClkPinMuxing 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshSpiCsPinMuxing 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_IshGpGpioPadTermination 8 bytes $_DEFAULT_ = 0, 0, 0, 0, 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartRxPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartTxPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartRtsPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshUartCtsPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshI2cSclPadTermination 3 bytes $_DEFAULT_ = 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiClkPadTermination 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IshSpiCsPadTermination 4 bytes $_DEFAULT_ = 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiCsEnable 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPetxiset 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyTxiset 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPredeemp 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb2PhyPehalfbit 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmphEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmph 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmpEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmp 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 80 bytes
$gPlatformFspPkgTokenSpaceGuid_PchLanEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchTsnEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed 1 bytes $_DEFAULT_ = 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressHigh 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressLow 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PciePtm 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieDpc 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEdpc 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_UsbPdoProgramming 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PmcPowerButtonDebounce 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchEspiBmeMasterSlaveEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchEspiLockLinkConfiguration 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailSupportedVoltageStates 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMax 1 bytes $_DEFAULT_ = 0x64
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSupportedVoltageStates 1 bytes $_DEFAULT_ = 0x2
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMax 1 bytes $_DEFAULT_ = 0xC8
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxEnabledStates 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxVoltage 2 bytes $_DEFAULT_ = 0x01A4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMax 1 bytes $_DEFAULT_ = 0xC8
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxLowToHighCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x0C
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToHighCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x036
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToLowCurModeVolTranTime 1 bytes $_DEFAULT_ = 0x2B
$gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxOffToHighCurModeVolTranTime 2 bytes $_DEFAULT_ = 0x0096
$gPlatformFspPkgTokenSpaceGuid_PmcDbgMsgEn 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinLen 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchFivrDynPm 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMaximum 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase 4 bytes $_DEFAULT_ = 0xF8000000
$gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeLimit 4 bytes $_DEFAULT_ = 0xF9FFFFFF
$gPlatformFspPkgTokenSpaceGuid_PchXhciUaolEnable 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinPtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinLen 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_CnviMode 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviWifiCore 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviBtCore 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CnviBtAudioOffload 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CnviRfResetPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CnviClkreqPinMux 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchEspiHostC10ReportEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PmcUsb2PhySusPgEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchUsbOverCurrentEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchEspiLgmrEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailCtrlRampTmr 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailCtrlRampTmr 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlpResetConfig 8 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PchHotEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataLedEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmVrAlert 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AmtEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_WatchDogEnabled 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_FwProgress 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_AmtSolEnabled 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_WatchDogTimerOs 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_WatchDogTimerBios 2 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ForcMebxSyncUp 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotImplemented 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpAcsEnabled 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpEnableCpm 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieRpDetectTimeoutMs 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PmcModPhySusPgEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcV1p05PhyExtFetControlEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcV1p05IsExtFetControlEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PavpEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_CdClock 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PeiGraphicsPeimInit 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_D3HotEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_GnaEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_IomTypeCPortPadCfg 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x06,0x11,0x00,0x04,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuUsb3OverCurrentPin 8 bytes $_DEFAULT_ = 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
$gPlatformFspPkgTokenSpaceGuid_D3ColdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ITbtPcieTunnelingForUsb4 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SkipFspGop 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TcCstateLimit 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_VbtSize 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LidStatus 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_IomStayInTCColdSeconds 1 bytes $_DEFAULT_ = 0x32
$gPlatformFspPkgTokenSpaceGuid_IomBeforeEnteringTCColdSeconds 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_SaPostMemRsvd 5 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_VmdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VmdPort 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPortDev 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdPortFunc 31 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarSize 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr 1 bytes $_DEFAULT_ = 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_VmdVariablePtr 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBase 4 bytes $_DEFAULT_ = 0xA0000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Base 4 bytes $_DEFAULT_ = 0xA2000000
$gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Base 4 bytes $_DEFAULT_ = 0xA4000000
$gPlatformFspPkgTokenSpaceGuid_TcssCpuUsbPdoProgramming 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcPdEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TcssAuxOri 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_TcssHslOri 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_UsbOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ITbtPcieRootPortEn 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_UsbTcPortEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ITbtForcePowerOnTimeoutInMs 2 bytes $_DEFAULT_ = 0x1F4
$gPlatformFspPkgTokenSpaceGuid_ITbtConnectTopologyTimeoutInMs 2 bytes $_DEFAULT_ = 0x1388
$gPlatformFspPkgTokenSpaceGuid_VccSt 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ITbtDmaLtr 4 bytes $_DEFAULT_ = 0xFF,0x97,0xFF,0x97
$gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PtmEnabled 4 bytes $_DEFAULT_ = 0, 0, 0, 0
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrEnable 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0xC8,0x00,0xC8,0x00,0x3C,0x00,0xC8,0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0xC8,0x00,0xC8,0x00,0xC8,0x00,0xC8,0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpForceLtrOverride 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrConfigLock 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_AesEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Psi3Enable 5 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_Psi4Enable 5 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_ImonSlope 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ImonOffset 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VrConfigEnable 5 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_TdcEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_TdcTimeWindow 20 bytes $_DEFAULT_ = 0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x01,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_TdcLock 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysSlope 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AcousticNoiseMitigation 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FastPkgCRampDisable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SlowSlewRate 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_TdcCurrentLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_AcLoadline 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_DcLoadline 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi1Threshold 10 bytes $_DEFAULT_ = 0x50,0x00,0x50,0x00,0x50,0x00,0x50,0x00,0x50,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi2Threshold 10 bytes $_DEFAULT_ = 0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00
$gPlatformFspPkgTokenSpaceGuid_Psi3Threshold 10 bytes $_DEFAULT_ = 0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00
$gPlatformFspPkgTokenSpaceGuid_IccMax 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_TxtEnable 1 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_SkipMpInit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FivrRfiFrequency 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FivrSpreadSpectrum 1 bytes $_DEFAULT_ = 0x08
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuBistData 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CpuMpPpi 4 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_PreWake 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RampUp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RampDown 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_VrVoltageLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_VccInAuxImonIccImax 2 bytes $_DEFAULT_ = 160
$gPlatformFspPkgTokenSpaceGuid_EnableVsysCritical 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VsysFullScale 1 bytes $_DEFAULT_ = 0x18
$gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold 1 bytes $_DEFAULT_ = 0x06
$gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchMantissa 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchExponent 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchMantissa 1 bytes $_DEFAULT_ = 0x0D
$gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchExponent 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_VccInAuxImonSlope 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_VccInAuxImonOffset 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_FivrSpectrumEnable 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_IccLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PpinSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableMinVoltageOverride 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MinVoltageRuntime 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceMemSize 1 bytes $_DEFAULT_ = 0xff
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_MinVoltageC8 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SmbiosType4MaxSpeedOverride 2 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Irms 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_AvxDisable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Avx3Disable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_X2ApicSupport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_VrPowerDeliveryDesign 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableFastVmode 5 bytes $_DEFAULT_ = 0x0, 0x0, 0x0, 0x0, 0x0
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemProduction 32 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPwrOptEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchWriteProtectionEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchReadProtectionEnable 5 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeLimit 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeBase 10 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaPme 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiCs0Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIoApicEntry24_119 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchIoApicId 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchIshSpiEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshUartEnable 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshI2cEnable 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshGpEnable 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchIshPdtUnlock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchLanLtrEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchCrid 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RtcBiosInterfaceLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_RtcMemoryLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpHotPlug 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpPmSci 28 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpTransmitterHalfSwing 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpClkReqDetect 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpAdvancedErrorReporting 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpUnsupportedRequestReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpFatalErrorReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpNoFatalErrorReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpCorrectableErrorReport 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnFatalError 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnNonFatalError 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnCorrectableError 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpMaxPayload 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment 1 bytes $_DEFAULT_ = 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_ThcPort0InterruptPinMuxing 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort0WakeOnTouch 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment 1 bytes $_DEFAULT_ = 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_ThcPort1InterruptPinMuxing 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_ThcPort1WakeOnTouch 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieRpPcieSpeed 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpPhysicalSlotNumber 28 bytes $_DEFAULT_ = 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B
$gPlatformFspPkgTokenSpaceGuid_PcieRpCompletionTimeout 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpAspm 28 bytes $_DEFAULT_ = 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PcieRpL1Substates 28 bytes $_DEFAULT_ = 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03
$gPlatformFspPkgTokenSpaceGuid_PcieRpL1Low 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrEnable 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrConfigLock 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqOverrideDefault 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqMethod 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqLocalTransmitterOverrideEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3NumberOfPresetsOrCoefficients 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PreCursorList 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PostCursorList 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PresetList 11 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh1DownstreamPortTransmitterPreset 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh1UpstreamPortTransmitterPreset 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieEqPh2LocalTransmitterOverridePreset 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PcieEnablePeerMemoryWrite 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieComplianceTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpFunctionSwap 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3ProgramStaticEq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4ProgramStaticEq 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PchPmPmeB0S5Dis 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpImrEnabled 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PcieRpImrSelection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWolEnableOverride 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPcieWakeFromDeepSx 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanDeepSxEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmLanWakeFromDeepSx 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmDeepSxPol 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpS3MinAssert 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpS4MinAssert 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpSusMinAssert 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpAMinAssert 1 bytes $_DEFAULT_ = 0x04
$gPlatformFspPkgTokenSpaceGuid_PchEnableDbcObs 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpStrchSusUp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmSlpLanLowDc 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPwrBtnOverridePeriod 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableDsxAcPresentPulldown 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableNativePowerButton 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmMeWakeSts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmWolOvrWkSts 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmPwrCycDur 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmPciePllSsc 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchLegacyIoLowLatency 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPwrOptEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EsataSpeedLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataSpeedLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsHotPlug 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsInterlockSw 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsExternal 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsSpinUp 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsSolidStateDrive 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsEnableDitoConfig 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDmVal 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsDitoVal 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_SataPortsZpOdd 8 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstRaidDeviceId 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieEnable 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieStoragePort 3 bytes $_DEFAULT_ = 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstPcieDeviceResetDelay 3 bytes $_DEFAULT_ = 100, 100, 100
$gPlatformFspPkgTokenSpaceGuid_UfsEnable 2 bytes $_DEFAULT_ = 0, 0
$gPlatformFspPkgTokenSpaceGuid_IehMode 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchT0Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchT1Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchT2Level 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PchTTEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTTState13Enable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchTTLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TTSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TTCrossThrottling 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchDmiTsawEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_DmiSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiTS0TW 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_DmiTS1TW 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_DmiTS2TW 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DmiTS3TW 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0T1M 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataP0T2M 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SataP0T3M 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SataP0TDisp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1T1M 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_SataP1T2M 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SataP1T3M 1 bytes $_DEFAULT_ = 0x03
$gPlatformFspPkgTokenSpaceGuid_SataP1TDisp 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0Tinact 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP0TDispFinit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1Tinact 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataP1TDispFinit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataThermalSuggestedSetting 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchMemoryThrottlingEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchMemoryPmsyncEnable 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchMemoryC0TransmitEnable 2 bytes $_DEFAULT_ = 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PchMemoryPinSelection 2 bytes $_DEFAULT_ = 0x00, 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchTemperatureHotLevel 2 bytes $_DEFAULT_ = 0x0073
$gPlatformFspPkgTokenSpaceGuid_Usb2OverCurrentPin 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x06, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_Usb3OverCurrentPin 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x04, 0x04
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrOverrideEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ThcMode 2 bytes $_DEFAULT_ = 0x0, 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrHighIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrMediumIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_PchUsbLtrLowIdleTimeOverride 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGating 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGatingOnS3 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableTcoTimer 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HybridStorageMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuRootportUsedForHybridStorage 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchRootportUsedForCpuAttach 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_PchAcpiL6dPmeHandling 1 bytes $_DEFAULT_ = 0x0
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_BgpdtHash 32 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_BiosGuardAttr 4 bytes $_DEFAULT_ = 0xFFFFFFFF
Skip 4 bytes
$gPlatformFspPkgTokenSpaceGuid_BiosGuardModulePtr 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_SendEcCmd 8 bytes $_DEFAULT_ = 0xFFFFFFFFFFFFFFFF
$gPlatformFspPkgTokenSpaceGuid_EcCmdProvisionEav 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_EcCmdLock 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_SiSkipSsidProgramming 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_SiCustomizedSvid 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SiCustomizedSsid 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_SiSsidTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_SiNumberOfSsidTableEntry 2 bytes $_DEFAULT_ = 0x0000
$gPlatformFspPkgTokenSpaceGuid_PortResetMessageEnable 16 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnforceEDebugMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsOnEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcCpuC10GatePinEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PchDmiCwbEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcOsIdleEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchS0ixAutoDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchPmLatchEventsC10Exit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrTimerEn 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrTimer1Val 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrMultiplier1Val 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrHostPartitionReset 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcOverride 1 bytes $_DEFAULT_ = 0x00
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcSel 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCm 32 bytes $_DEFAULT_ = 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06
$gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCp 32 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3RootPortPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4RootPortPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointPreset 20 bytes $_DEFAULT_ = 0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07,0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointHint 20 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointHint 20 bytes $_DEFAULT_ = 0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieFiaProgramming 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieClockGating 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPciePowerGating 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieComplianceTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieEnablePeerMemoryWrite 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpFunctionSwap 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieSlotSelection 1 bytes $_DEFAULT_ = 0x01
Skip 3 bytes
$gPlatformFspPkgTokenSpaceGuid_CpuPcieDeviceOverrideTablePtr 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpHotPlug 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPmSci 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpTransmitterHalfSwing 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAcsEnabled 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableCpm 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAdvancedErrorReporting 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpUnsupportedRequestReport 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpFatalErrorReport 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNoFatalErrorReport 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpCorrectableErrorReport 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnFatalError 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnNonFatalError 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnCorrectableError 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMaxPayload 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcEnabled 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcExtensionsEnabled 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSlotImplemented 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3EqPh3Method 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4EqPh3Method 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPhysicalSlotNumber 4 bytes $_DEFAULT_ = 0x00, 0x01, 0x02, 0x03
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAspm 4 bytes $_DEFAULT_ = 0x03, 0x03, 0x03, 0x03
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpL1Substates 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrEnable 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrConfigLock 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPtmEnabled 4 bytes $_DEFAULT_ = 0x01, 0x01, 0x01, 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDetectTimeoutMs 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMultiVcEnabled 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTranEnable 10 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTran 10 bytes $_DEFAULT_ = 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C, 0x4C
$gPlatformFspPkgTokenSpaceGuid_SkipPamLock 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_EdramTestMode 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_RenderStandby 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_PmSupport 1 bytes $_DEFAULT_ = 0x1
$gPlatformFspPkgTokenSpaceGuid_CdynmaxClampEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_GtFreqMax 1 bytes $_DEFAULT_ = 0xFF
$gPlatformFspPkgTokenSpaceGuid_DisableTurboGt 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_SkipCdClockInit 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_RC1pFreqEnable 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchTsnMultiVcEnable 1 bytes $_DEFAULT_ = 0x0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_LogoPixelHeight 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_LogoPixelWidth 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_Usb4CmMode 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieResizableBarSupport 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_SaPostMemTestRsvd 3 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableRsr 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem1 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Hwp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_HdcControl 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PowerLimit1Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit2 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TurboPowerLimitLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3DutyCycle 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3Lock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PowerLimit4Lock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TccActivationOffset 1 bytes $_DEFAULT_ = 0x0A
$gPlatformFspPkgTokenSpaceGuid_TccOffsetClamp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TccOffsetLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_NumberOfEntries 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom1TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom1ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom2ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1Time 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3TurboActivationRatio 1 bytes $_DEFAULT_ = 0x14
$gPlatformFspPkgTokenSpaceGuid_Custom3ConfigTdpControl 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLock 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpBios 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Time 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MlcStreamerPrefetcher 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MlcSpatialPrefetcher 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MonitorMwaitEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MachineCheckEnable 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ApIdleManner 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcessorTraceEnable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Eist 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnergyEfficientPState 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnergyEfficientTurbo 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TStates 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_BiProcHot 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DisableProcHotOut 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ProcHotResponse 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DisableVrThermalAlert 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableAllThermalFunctions 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ThermalMonitor 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_Cx 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmgCstCfgCtrlLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1e 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PkgCStateDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PkgCStateUnDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CStatePreWake 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_TimedMwait 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CstCfgCtrIoMwaitRedirection 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PkgCStateLimit 1 bytes $_DEFAULT_ = 0x08
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl0TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5TimeUnit 1 bytes $_DEFAULT_ = 0x02
$gPlatformFspPkgTokenSpaceGuid_PpmIrmSetting 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ProcHotLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MaxRatio 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_StateRatio 40 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_StateRatioMax16 16 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PsysPmax 2 bytes $_DEFAULT_ = 0xAC
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4Irtl 2 bytes $_DEFAULT_ = 0
$gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5Irtl 2 bytes $_DEFAULT_ = 0
Skip 2 bytes
$gPlatformFspPkgTokenSpaceGuid_PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit2Power 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit3 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PowerLimit4 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_TccOffsetTimeWindowForRatl 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit2 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Power 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2Power 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_RaceToHalt 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_HwpInterruptControl 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem2 4 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableItbm 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1StateAutoDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_C1StateUnDemotion 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_MinRingRatioLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_MaxRingRatioLimit 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnablePerCorePState 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoPerCorePstate 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoEppGrouping 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_EnableEpbPeciOverride 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_EnableFastMsrHwpReq 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ApplyConfigTdp 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_HwpLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_DualTauBoost 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemTest 16 bytes $_DEFAULT_ = 0x00
Skip 16 bytes
$gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage 1 bytes $_DEFAULT_ = 0x2
$gPlatformFspPkgTokenSpaceGuid_DisableD0I3SettingForHeci 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_MctpBroadcastCycle 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_PchLockDownGlobalSmi 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosInterface 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PchUnlockGpioPads 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchSbAccessUnlock 1 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxSnoopLatency 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxNoSnoopLatency 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMode 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMultiplier 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideValue 56 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMode 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMultiplier 28 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideValue 56 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitScale 28 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitValue 56 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_PcieEnablePort8xhDecode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPciePort8xhDecodePortIndex 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchPmDisableEnergyReport 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_SataTestMode 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_PchXhciOcLock 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_PmcLpmS0ixSubStateEnableMask 1 bytes $_DEFAULT_ = 0x9
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxSnoopLatency 8 bytes $_DEFAULT_ = 0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxNoSnoopLatency 8 bytes $_DEFAULT_ = 0x0F,0x10,0x0F,0x10,0x0F,0x10,0x0F,0x10
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMode 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMultiplier 4 bytes $_DEFAULT_ = 0x02, 0x02, 0x02, 0x02
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideValue 8 bytes $_DEFAULT_ = 0x3C,0x00,0x3C,0x00,0x3C,0x00,0x3C,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Uptp 4 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Dptp 4 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Uptp 4 bytes $_DEFAULT_ = 0x08, 0x08, 0x08, 0x08
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Dptp 4 bytes $_DEFAULT_ = 0x09, 0x09, 0x09, 0x09
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Uptp 4 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Dptp 4 bytes $_DEFAULT_ = 0x07, 0x07, 0x07, 0x07
$gPlatformFspPkgTokenSpaceGuid_EnableTcssCovTypeA 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_MappingPchXhciUsbA 4 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcC10DynamicThresholdAdjustment 1 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitRatio 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitNumCore 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitRatio 8 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitNumCore 8 bytes $_DEFAULT_ = 0x00
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_FspEventHandler 4 bytes $_DEFAULT_ = 0x0
$gPlatformFspPkgTokenSpaceGuid_VmdGlobalMapping 1 bytes $_DEFAULT_ = 0x01
$gPlatformFspPkgTokenSpaceGuid_CpuPcieFunc0LinkDisable 4 bytes $_DEFAULT_ = 0x00, 0x00, 0x00, 0x00
$gPlatformFspPkgTokenSpaceGuid_PmcSkipVccInConfig 1 bytes $_DEFAULT_ = 0x00
$gPlatformFspPkgTokenSpaceGuid_CseDataResilience 1 bytes $_DEFAULT_ = 0x01
Skip 1 bytes
$gPlatformFspPkgTokenSpaceGuid_HorizontalResolution 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_VerticalResolution 4 bytes $_DEFAULT_ = 0x00000000
$gPlatformFspPkgTokenSpaceGuid_ThcActiveLtr 8 bytes $_DEFAULT_ = 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
$gPlatformFspPkgTokenSpaceGuid_ThcIdleLtr 8 bytes $_DEFAULT_ = 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
$gPlatformFspPkgTokenSpaceGuid_ThcHidResetPad 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidResetPadTrigger 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidConnectionSpeed 8 bytes $_DEFAULT_ = 0x40,0x66,0x03,0x01,0x40,0x66,0x03,0x01
$gPlatformFspPkgTokenSpaceGuid_ThcLimitPacketSize 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcPerformanceLimitation 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportHeaderAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportBodyAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidOutputReportAddress 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidReadOpcode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidWriteOpcode 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
$gPlatformFspPkgTokenSpaceGuid_ThcHidFlags 8 bytes $_DEFAULT_ = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
EndStruct
List &EN_DIS
Selection 0x1 , "Enabled"
Selection 0x0 , "Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable
Selection 0 , "Disable"
Selection 1 , "Enable and Initialize"
Selection 2 , "Enable without Initializing"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow
Selection 0 , " Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel
Selection 0 , "Disable"
Selection 1 , "Error Only"
Selection 2 , "Error and Warnings"
Selection 3 , "Load Error Warnings and Info"
Selection 4 , "Load Error Warnings and Info & Event"
Selection 5 , "Load Error Warnings Info and Verbose"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase
Selection 0 , "0x3F8"
Selection 1 , "0x2F8"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable
Selection 0 , "Disable"
Selection 1 , "Enable and Initialize"
Selection 2 , "Enable without Initializing"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow
Selection 0 , " Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen
Selection 0x100 , "256 Bytes"
Selection 0x200 , "512 Bytes"
Selection 0x400 , "1024 Bytes"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SmramMask
Selection 0 , " Neither"
Selection 1 , "AB-SEG"
Selection 2 , "H-SEG"
Selection 3 , " Both"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode
Selection 0 , "Protect base on address range"
Selection 1 , "Non-protected"
Selection 2 , "All protected"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TsegSize
Selection 0x0400000 , "4MB"
Selection 0x01000000 , "16MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent
Selection 0 , "Disabled"
Selection 2 , "Enabled (All Probes+TraceHub)"
Selection 6 , "Enable (Low Power)"
Selection 7 , "Manual"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DciDbcMode
Selection 0 , "Disabled"
Selection 1 , "USB2 DbC"
Selection 2 , "USB3 DbC"
Selection 3 , "Both"
Selection 4 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode
Selection 0 , " Disable"
Selection 1 , " Target Debugger Mode"
Selection 2 , " Host Debugger Mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect
Selection 0 , " Both"
Selection 1 , " ClkA"
Selection 2 , " ClkB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc
Selection 0x00 , "0MB"
Selection 0x01 , "32MB"
Selection 0x02 , "64MB"
Selection 0x03 , "96MB"
Selection 0x04 , "128MB"
Selection 0x05 , "160MB"
Selection 0xF0 , "4MB"
Selection 0xF1 , "8MB"
Selection 0xF2 , "12MB"
Selection 0xF3 , "16MB"
Selection 0xF4 , "20MB"
Selection 0xF5 , "24MB"
Selection 0xF6 , "28MB"
Selection 0xF7 , "32MB"
Selection 0xF8 , "36MB"
Selection 0xF9 , "40MB"
Selection 0xFA , "44MB"
Selection 0xFB , "48MB"
Selection 0xFC , "52MB"
Selection 0xFD , "56MB"
Selection 0xFE , "60MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ApertureSize
Selection 0 , "128 MB"
Selection 1 , "256 MB"
Selection 3 , "512 MB"
Selection 7 , "1024 MB"
Selection 15 , " 2048 MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_UserBd
Selection 0 , "Mobile"
Selection 1 , "Desktop1Dpc"
Selection 2 , "Desktop2DpcDaisyChain"
Selection 3 , "Desktop2DpcTeeTopologyAsymmetrical"
Selection 4 , "Desktop2DpcTeeTopology"
Selection 5 , "UltMobile"
Selection 7 , "UP Server"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss
Selection 0 , "Disabled"
Selection 1 , "Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit
Selection 1067 , "1067"
Selection 1333 , "1333"
Selection 1600 , "1600"
Selection 1867 , "1867"
Selection 2133 , "2133"
Selection 2400 , "2400"
Selection 2667 , "2667"
Selection 2933 , "2933"
Selection 0 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SaGv
Selection 0 , "Disabled"
Selection 1 , "FixedPoint0"
Selection 2 , "FixedPoint1"
Selection 3 , "FixedPoint2"
Selection 4 , "FixedPoint3"
Selection 5 , "Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl
Selection 0 , "Auto"
Selection 1 , "Manual"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected
Selection 0 , "Default SPD Profile"
Selection 1 , "Custom Profile"
Selection 2 , "XMP Profile 1"
Selection 3 , "XMP Profile 2"
Selection 4 , "XMP Profile 3"
Selection 5 , "XMP User Profile 4"
Selection 6 , "XMP User Profile 5"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RefClk
Selection 0 , "133MHz"
Selection 1 , "100MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Ratio
Selection 0 , "Auto"
Selection 4 , "4"
Selection 5 , "5"
Selection 6 , "6"
Selection 7 , "7"
Selection 8 , "8"
Selection 9 , "9"
Selection 10 , "10"
Selection 11 , "11"
Selection 12 , "12"
Selection 13 , "13"
Selection 14 , "14"
Selection 15 , "15"
EndList
List &gPlatformFspPkgTokenSpaceGuid_tWR
Selection 0 , "Auto"
Selection 5 , "5"
Selection 6 , "6"
Selection 7 , "7"
Selection 8 , "8"
Selection 10 , "10"
Selection 12 , "12"
Selection 14 , "14"
Selection 16 , "16"
Selection 18 , "18"
Selection 20 , "20"
Selection 24 , "24"
Selection 30 , "30"
Selection 34 , "34"
Selection 40 , "40"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode
Selection 0 , " Disable"
Selection 1 , "Target Debugger Mode"
Selection 2 , "Host Debugger Mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size
Selection 0 , "0"
Selection 1 , "1MB"
Selection 2 , "8MB"
Selection 3 , "64MB"
Selection 4 , "128MB"
Selection 5 , "256MB"
Selection 6 , "512MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom
Selection 0 , "Before"
Selection 1 , "After"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay
Selection 0 , "iGFX"
Selection 1 , "PEG"
Selection 2 , "PCIe Graphics on PCH"
Selection 3 , "AUTO"
Selection 4 , "Hybrid Graphics"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize
Selection 0 , "32MB"
Selection 1 , "288MB"
Selection 2 , "544MB"
Selection 3 , "800MB"
Selection 4 , "1024MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GttSize
Selection 1 , "2MB"
Selection 2 , "4MB"
Selection 3 , "8MB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GtVoltageMode
Selection 0 , " Adaptive"
Selection 1 , " Override"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed
Selection 1 , "x1"
Selection 2 , "x2"
Selection 3 , "x3"
Selection 4 , "x4"
Selection 8 , "x8"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CsiSpeed
Selection 0 , "Sensor default"
Selection 1 , "<416Mbps"
Selection 2 , "<1.5Gbps"
Selection 3 , "<2Gbps"
Selection 4 , "<2.5Gbps"
Selection 5 , "<4Gbps"
Selection 6 , ">4Gbps"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig
Selection 0 , "Disabled"
Selection 1 , "eDP"
Selection 2 , "MIPI DSI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig
Selection 0 , "Disabled"
Selection 1 , "eDP"
Selection 2 , "MIPI DSI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink
Selection 0 , " Disabled"
Selection 1 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed
Selection 0 , "Auto"
Selection 1 , "Gen1"
Selection 2 , "Gen2"
Selection 3 , "Gen3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable
Selection 0 , "Disable phase2"
Selection 1 , "Enable phase2"
Selection 2 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method
Selection 0 , "Auto"
Selection 1 , "HwEq"
Selection 2 , "SwEq"
Selection 3 , "StaticEq"
Selection 4 , "BypassPhase3"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis
Selection 0 , " -6dB"
Selection 1 , " -3.5dB"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BootFrequency
Selection 0 , "0"
Selection 1 , "1"
Selection 2 , "2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount
Selection 0 , "Disable all big cores"
Selection 1 , "1"
Selection 2 , "2"
Selection 3 , "3"
Selection 0xFF , "Active all big cores"
EndList
List &gPlatformFspPkgTokenSpaceGuid_FClkFrequency
Selection 0 , "800 MHz"
Selection 1 , " 1 GHz"
Selection 2 , " 400 MHz"
Selection 3 , " Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable
Selection 0 , " False"
Selection 1 , " True"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "No Change"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount
Selection 0 , "Disable all small cores"
Selection 1 , "1"
Selection 2 , "2"
Selection 3 , "3"
Selection 0xFF , "Active all small cores"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix
Selection 0 , "Positive"
Selection 1 , "Negative"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope
Selection 0 , "All-core"
Selection 1 , "Per-core"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CrashLogGprs
Selection 0 , "Disabled"
Selection 1 , "Enabled"
Selection 2 , "Only Smm GPRs Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode
Selection 0 , "Legacy"
Selection 1 , "Selection"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BclkSource
Selection 1 , "CPU BCLK"
Selection 2 , "PCH BCLK"
Selection 3 , "External CLK"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride
Selection 0 , " 3200MHz"
Selection 1 , " 1600MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup
Selection 0 , "Enable"
Selection 1 , "Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchPort80Route
Selection 0 , "LPC"
Selection 1 , "PCI"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaVcType
Selection 0 , " VC0"
Selection 1 , " VC1"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating
Selection 0 , " POR"
Selection 1 , " Force Enable"
Selection 2 , " Force Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency
Selection 4 , " 96MHz"
Selection 3 , " 48MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode
Selection 0 , " 2T"
Selection 2 , " 4T"
Selection 3 , " 8T"
Selection 4 , " 16T"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber
Selection 0 , "SerialIoUart0"
Selection 1 , "SerialIoUart1"
Selection 2 , "SerialIoUart2"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity
Selection 0 , " DefaultParity"
Selection 1 , " NoParity"
Selection 2 , " EvenParity"
Selection 3 , " OddParity"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits
Selection 0 , " DefaultStopBits"
Selection 1 , " OneStopBit"
Selection 2 , " OneFiveStopBits"
Selection 3 , " TwoStopBits"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate
Selection 3 , "9600"
Selection 4 , "19200"
Selection 6 , "56700"
Selection 7 , "115200"
EndList
List &gPlatformFspPkgTokenSpaceGuid_HobBufferSize
Selection 0 , "Default"
Selection 1 , " 1 Byte"
Selection 2 , " 1 KB"
Selection 3 , " Max value"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RhSelect
Selection 0 , "Disable"
Selection 1 , "RFM"
Selection 2 , "pTRR"
EndList
List &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2
Selection 0 , "Disable"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit
Selection 0 , "BIT6"
Selection 1 , "BIT7"
Selection 2 , "BIT8"
Selection 3 , "BIT9"
Selection 4 , "BIT10"
Selection 5 , "BIT11"
Selection 6 , "BIT12"
Selection 7 , "BIT13"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BClkFrequency
Selection 100000000 , "100Hz"
Selection 125000000 , "125Hz"
Selection 167000000 , "167Hz"
Selection 250000000 , "250Hz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EnCmdRate
Selection 0 , "Disable"
Selection 5 , "2 CMDS"
Selection 7 , "3 CMDS"
Selection 9 , "4 CMDS"
Selection 11 , "5 CMDS"
Selection 13 , "6 CMDS"
Selection 15 , "7 CMDS"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Refresh2X
Selection 0 , "Disable"
Selection 1 , "Enabled for WARM or HOT"
Selection 2 , "Enabled HOT only"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PowerDownMode
Selection 0x0 , "No Power Down"
Selection 0x1 , "APD"
Selection 0x6 , "PPD DLL OFF"
Selection 0xFF , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout
Selection 0 , "Enabled"
Selection 1 , "Disabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel
Selection 0 , "Disable"
Selection 1 , "Error Only"
Selection 2 , "Error and Warnings"
Selection 3 , "Load Error Warnings and Info"
Selection 4 , "Load Error Warnings and Info & Event"
Selection 5 , "Load Error Warnings Info and Verbose"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc
Selection 0 , " Disabled"
Selection 1 , " Enabled on DIMM0 only"
Selection 2 , " Enabled on DIMM1 only"
Selection 3 , " Enabled"
EndList
List &gPlatformFspPkgTokenSpaceGuid_RefreshWm
Selection 0 , "Set Refresh Watermarks to Low"
Selection 1 , "Set Refresh Watermarks to High (Default)"
EndList
List &gPlatformFspPkgTokenSpaceGuid_McRefreshRate
Selection 0 , "NORMAL Refresh"
Selection 1 , "1x Refresh"
Selection 2 , "2x Refresh"
Selection 3 , "4x Refresh"
EndList
List &gPlatformFspPkgTokenSpaceGuid_LpMode
Selection 0 , " Auto (default)"
Selection 1 , " Enabled"
Selection 2 , " Disabled"
Selection 3 , " Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_BdatTestType
Selection 0 , "RMT per Rank"
Selection 1 , "RMT per Bit"
Selection 2 , "Margin2D"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay
Selection 0 , " No Delay"
Selection 0xFFFF , " Auto Calulate T12 Delay"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board
Selection 0 , " no"
Selection 1 , " yes"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode
Selection 0 , "SerialIoUartDisabled"
Selection 1 , "SerialIoUartPci"
Selection 2 , "SerialIoUartHidden"
Selection 3 , "SerialIoUartCom"
Selection 4 , "SerialIoUartSkipInit"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PprEnable
Selection 0 , "Disable"
Selection 2 , "Hard PPR"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck
Selection 0 , "Disable"
Selection 1 , "L1"
Selection 2 , "L2"
Selection 3 , "Both"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl
Selection 0 , " No Error Injection"
Selection 1 , "Inject Correctable Error Address match"
Selection 3 , "Inject Correctable Error on insertion counter"
Selection 5 , " Inject Uncorrectable Error Address match"
Selection 7 , "Inject Uncorrectable Error on insertion counter"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Lp5BankMode
Selection 0 , "Auto"
Selection 1 , "8 Bank Mode"
Selection 2 , "16 Bank Mode"
Selection 3 , "BG Mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SataMode
Selection 0 , "AHCI"
Selection 1 , "RAID"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber
Selection 0 , "UART0"
Selection 1 , "UART1"
Selection 2 , "UART2"
Selection 3 , "UART3"
Selection 4 , "UART4"
Selection 5 , "UART5"
Selection 6 , "UART6"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed
Selection 0 , " 24Mhz 2.5Gbps"
Selection 1 , " 24Mhz 1Gbps"
Selection 2 , " 38.4Mhz 2.5Gbps"
Selection 3 , " 38.4Mhz 1Gbps"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CnviMode
Selection 0 , "Disable"
Selection 1 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CdClock
Selection 0xFF , " Auto (Max based on reference clock frequency)"
Selection 0 , " 192"
Selection 1 , " 307.2"
Selection 2 , " 312 Mhz"
Selection 3 , " 324Mhz"
Selection 4 , " 326.4 Mhz"
Selection 5 , " 552 Mhz"
Selection 6 , " 556.8 Mhz"
Selection 7 , " 648 Mhz"
Selection 8 , " 652.8 Mhz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_LidStatus
Selection 0 , " LidClosed"
Selection 1 , " LidOpen"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr
Selection 0 , " VMD_32BIT_NONPREFETCH"
Selection 1 , " VMD_64BIT_NONPREFETCH"
Selection 2 , " VMD_64BIT_PREFETCH"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr
Selection 0 , " VMD_32BIT_NONPREFETCH"
Selection 1 , " VMD_64BIT_NONPREFETCH"
Selection 2 , " VMD_64BIT_PREFETCH"
EndList
List &gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr
Selection 0 , " VMD_32BIT_NONPREFETCH"
Selection 1 , " VMD_64BIT_NONPREFETCH"
Selection 2 , " VMD_64BIT_PREFETCH"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SlowSlewRate
Selection 0 , " Fast/2"
Selection 1 , " Fast/4"
Selection 2 , " Fast/8"
Selection 3 , " Fast/16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PpinSupport
Selection 0 , " Disable"
Selection 1 , " Enable"
Selection 2 , " Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_AvxDisable
Selection 0 , " Enable"
Selection 1 , " Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_Avx3Disable
Selection 0 , " Enable"
Selection 1 , " Disable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EnableFastVmode
Selection 0 , " Disable"
Selection 1 , " Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency
Selection 0 , " 6MHz"
Selection 1 , " 12MHz"
Selection 2 , " 24MHz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment
Selection 0x0 , "ThcAssignmentNone"
Selection 0x1 , "ThcAssignmentThc0"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment
Selection 0x0 , "ThcAssignmentNone"
Selection 0x1 , "ThcPort1AssignmentThc0"
Selection 0x2 , "ThcAssignmentThc1"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieEqMethod
Selection 0 , " HardwareEq"
Selection 1 , " FixedEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PcieEqMode
Selection 0 , " PresetEq"
Selection 1 , " CoefficientEq"
EndList
List &gPlatformFspPkgTokenSpaceGuid_IehMode
Selection 0 , " Bypass"
Selection 1 , "Enable"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS0TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS1TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS2TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_DmiTS3TW
Selection 0 , "x1"
Selection 1 , "x2"
Selection 2 , "x4"
Selection 3 , "x8"
Selection 4 , "x16"
EndList
List &gPlatformFspPkgTokenSpaceGuid_HybridStorageMode
Selection 0 , " Disabled"
Selection 1 , " Dynamic Configuration"
EndList
List &gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt
Selection 0 , "Msix"
Selection 1 , "Msi"
Selection 2 , "Legacy"
EndList
List &gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear
Selection 0 , " Disable ME Unconfig On Rtc Clear"
Selection 1 , " Enable ME Unconfig On Rtc Clear"
Selection 2 , " Cmos is clear"
Selection 3 , " Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl
Selection 0 , "Disabled"
Selection 1 , "L0s"
Selection 2 , "L1"
Selection 3 , "L0sL1"
Selection 4 , "Auto"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EdramTestMode
Selection 0 , " EDRAM SW disable"
Selection 1 , " EDRAM SW Enable"
Selection 2 , " EDRAM HW mode"
EndList
List &gPlatformFspPkgTokenSpaceGuid_GtFreqMax
Selection 0xFF , " Auto(Default)"
Selection 2 , " 100 Mhz"
Selection 3 , " 150 Mhz"
Selection 4 , " 200 Mhz"
Selection 5 , " 250 Mhz"
Selection 6 , " 300 Mhz"
Selection 7 , " 350 Mhz"
Selection 8 , " 400 Mhz"
Selection 9 , " 450 Mhz"
Selection 0xA , " 500 Mhz"
Selection 0xB , " 550 Mhz"
Selection 0xC , " 600 Mhz"
Selection 0xD , " 650 Mhz"
Selection 0xE , " 700 Mhz"
Selection 0xF , " 750 Mhz"
Selection 0x10 , " 800 Mhz"
Selection 0x11 , " 850 Mhz"
Selection 0x12 , "900 Mhz"
Selection 0x13 , " 950 Mhz"
Selection 0x14 , " 1000 Mhz"
Selection 0x15 , " 1050 Mhz"
Selection 0x16 , " 1100 Mhz"
Selection 0x17 , " 1150 Mhz"
Selection 0x18 , " 1200 Mhz"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ApIdleManner
Selection 1 , " HALT loop"
Selection 2 , " MWAIT loop"
Selection 3 , " RUN loop"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme
Selection 0 , " Single Range Output"
Selection 1 , " ToPA Output"
EndList
List &gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable
Selection 0 , " False"
Selection 1 , " True"
EndList
List &gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage
Selection 0 , "Disable"
Selection 1 , "Send in PEI"
Selection 2 , "Send in DXE"
Selection 3 , "Reserved"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp
Selection 0 , " Auto"
Selection 1 , " Gen3 Foms"
Selection 2 , " Gen4 Foms"
Selection 3 , " Gen3 and Gen4 Foms"
EndList
List &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode
Selection 0 , " Disable"
Selection 1 , " Enable"
EndList
BeginInfoBlock
PPVer "0.1"
Description "Alder Lake Platform"
EndInfoBlock
Page "FSP-T Settings"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable, "PcdSerialIoUartDebugEnable", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugEnable,
Help "Enable SerialIo Uart debug library with/without initializing SerialIo Uart device in FSP. "
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber, "PcdSerialIoUartNumber", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartNumber,
Help "Select SerialIo Uart Controller for debug. Note: If UART0 is selected as CNVi BT Core interface, it cannot be used for debug purpose."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode, "PcdSerialIoUartMode - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartMode,
Help "Select SerialIo Uart Controller mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartBaudRate, "PcdSerialIoUartBaudRate - FSPT", DEC,
Help "Set default BaudRate Supported from 0 - default to 6000000"
"Valid range: 0 ~ 6000000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdPciExpressBaseAddress, "Pci Express Base Address", HEX,
Help "Base address to be programmed for Pci Express "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdPciExpressRegionLength, "Pci Express Region Length", HEX,
Help "Region Length to be programmed for Pci Express "
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity, "PcdSerialIoUartParity - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartParity,
Help "Set default Parity."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDataBits, "PcdSerialIoUartDataBits - FSPT", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0x08"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits, "PcdSerialIoUartStopBits - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartStopBits,
Help "Set default stop bits."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow, "PcdSerialIoUartAutoFlow - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartAutoFlow,
Help "Enables UART hardware flow control, CTS and RTS lines."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRxPinMux, "PcdSerialIoUartRxPinMux - FSPT", HEX,
Help "Select RX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartTxPinMux, "PcdSerialIoUartTxPinMux - FSPT", HEX,
Help "Select TX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartRtsPinMux, "PcdSerialIoUartRtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart used for debug Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartCtsPinMux, "PcdSerialIoUartCtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart used for debug Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoUartDebugMmioBase, "PcdSerialIoUartDebugMmioBase - FSPT", HEX,
Help "Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIoUartMode = SerialIoUartPci."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable, "PcdLpcUartDebugEnable", &gPlatformFspPkgTokenSpaceGuid_PcdLpcUartDebugEnable,
Help "Enable to initialize LPC Uart device in FSP."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags, "Debug Interfaces", HEX,
Help "Debug Interfaces. BIT0-RAM, BIT1-UART, BIT3-USB3, BIT4-Serial IO, BIT5-TraceHub, BIT2 - Not used."
"Valid range: 0x00 ~ 0x3F"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel, "PcdSerialDebugLevel", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel,
Help "Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase, "ISA Serial Base selection", &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase,
Help "Select ISA Serial Base address. Default is 0x3F8."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable, "PcdSerialIo2ndUartEnable", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartEnable,
Help "Enable Additional SerialIo Uart device in FSP."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber, "PcdSerialIo2ndUartNumber", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartNumber,
Help "Select SerialIo Uart Controller Number"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode, "PcdSerialIo2ndUartMode - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMode,
Help "Select SerialIo Uart Controller mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartBaudRate, "PcdSerialIo2ndUartBaudRate - FSPT", DEC,
Help "Set default BaudRate Supported from 0 - default to 6000000"
"Valid range: 0 ~ 6000000"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity, "PcdSerialIo2ndUartParity - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartParity,
Help "Set default Parity."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartDataBits, "PcdSerialIo2ndUartDataBits - FSPT", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0x08"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits, "PcdSerialIo2ndUartStopBits - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartStopBits,
Help "Set default stop bits."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow, "PcdSerialIo2ndUartAutoFlow - FSPT", &gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartAutoFlow,
Help "Enables UART hardware flow control, CTS and RTS lines."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRxPinMux, "PcdSerialIo2ndUartRxPinMux - FSPT", HEX,
Help "Select RX pin muxing for SerialIo UART"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartTxPinMux, "PcdSerialIo2ndUartTxPinMux - FSPT", HEX,
Help "Select TX pin muxing for SerialIo UART"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartRtsPinMux, "PcdSerialIo2ndUartRtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartCtsPinMux, "PcdSerialIo2ndUartCtsPinMux - FSPT", HEX,
Help "Select SerialIo Uart Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIo2ndUartMmioBase, "PcdSerialIo2ndUartMmioBase - FSPT", HEX,
Help "Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIo2ndUartMode = SerialIoUartPci."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FspDebugHandler, "FspDebugHandler", HEX,
Help "<b>Optional</b> pointer to the boot loader's implementation of FSP_DEBUG_HANDLER."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsPolarity, "Serial Io SPI Chip Select Polarity", HEX,
Help "Sets polarity for each chip Select. Available options: 0:SerialIoSpiCsActiveLow, 1:SerialIoSpiCsActiveHigh"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsEnable, "Serial Io SPI Chip Select Enable", HEX,
Help "0:Disabled, 1:Enabled. Enables GPIO for CS0 or CS1 if it is Enabled"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiDefaultCsOutput, "Serial Io SPI Default Chip Select Output", HEX,
Help "Sets Default CS as Output. Available options: 0:CS0, 1:CS1"
"Valid range: 0x00 ~ 0x1"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsMode, "Serial Io SPI Default Chip Select Mode HW/SW", HEX,
Help "Sets Default CS Mode Hardware or Software. Available options: 0:HW, 1:SW"
"Valid range: 0x00 ~ 0x1"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiCsState, "Serial Io SPI Default Chip Select State Low/High", HEX,
Help "Sets Default CS State Low or High. Available options: 0:Low, 1:High"
"Valid range: 0x00 ~ 0x1"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdSerialIoSpiMmioBase, "Serial Io SPI Device MMIO Base", HEX,
Help "Assigns MMIO for Serial Io SPI controller usage in early stage."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EndPage
Page "Memory Reference Code"
EditNum $gPlatformFspPkgTokenSpaceGuid_PlatformMemorySize, "Platform Reserved Memory Size", HEX,
Help "The minimum platform memory size required to pass control into DXE"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen, "SPD Data Length", &gPlatformFspPkgTokenSpaceGuid_MemorySpdDataLen,
Help "Length of SPD Data"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableAbove4GBMmio, "Enable above 4GB MMIO resource support", &EN_DIS,
Help "Enable/disable above 4GB MMIO resource support"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr000, "Memory SPD Pointer Controller 0 Channel 0 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr001, "Memory SPD Pointer Controller 0 Channel 0 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr010, "Memory SPD Pointer Controller 0 Channel 1 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr011, "Memory SPD Pointer Controller 0 Channel 1 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr020, "Memory SPD Pointer Controller 0 Channel 2 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr021, "Memory SPD Pointer Controller 0 Channel 2 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr030, "Memory SPD Pointer Controller 0 Channel 3 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr031, "Memory SPD Pointer Controller 0 Channel 3 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr100, "Memory SPD Pointer Controller 1 Channel 0 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr101, "Memory SPD Pointer Controller 1 Channel 0 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr110, "Memory SPD Pointer Controller 1 Channel 1 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr111, "Memory SPD Pointer Controller 1 Channel 1 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr120, "Memory SPD Pointer Controller 1 Channel 2 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr121, "Memory SPD Pointer Controller 1 Channel 2 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr130, "Memory SPD Pointer Controller 1 Channel 3 Dimm 0", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MemorySpdPtr131, "Memory SPD Pointer Controller 1 Channel 3 Dimm 1", HEX,
Help "Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RcompResistor, "RcompResistor settings", HEX,
Help "Indicates RcompResistor settings: Board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RcompTarget, "RcompTarget settings", HEX,
Help "RcompTarget settings: board-dependent"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch0, "Dqs Map CPU to DRAM MC 0 CH 0", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch1, "Dqs Map CPU to DRAM MC 0 CH 1", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch2, "Dqs Map CPU to DRAM MC 0 CH 2", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc0Ch3, "Dqs Map CPU to DRAM MC 0 CH 3", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch0, "Dqs Map CPU to DRAM MC 1 CH 0", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch1, "Dqs Map CPU to DRAM MC 1 CH 1", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch2, "Dqs Map CPU to DRAM MC 1 CH 2", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqsMapCpu2DramMc1Ch3, "Dqs Map CPU to DRAM MC 1 CH 3", HEX,
Help "Set Dqs mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch0, "Dq Map CPU to DRAM MC 0 CH 0", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch1, "Dq Map CPU to DRAM MC 0 CH 1", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch2, "Dq Map CPU to DRAM MC 0 CH 2", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 2: board-dependet"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc0Ch3, "Dq Map CPU to DRAM MC 0 CH 3", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch0, "Dq Map CPU to DRAM MC 1 CH 0", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 0: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch1, "Dq Map CPU to DRAM MC 1 CH 1", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 1: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch2, "Dq Map CPU to DRAM MC 1 CH 2", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 2: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DqMapCpu2DramMc1Ch3, "Dq Map CPU to DRAM MC 1 CH 3", HEX,
Help "Set Dq mapping relationship between CPU and DRAM, Channel 3: board-dependent"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DqPinsInterleaved, "Dqs Pins Interleaved Setting", &EN_DIS,
Help "Indicates DqPinsInterleaved setting: board-dependent"
Combo $gPlatformFspPkgTokenSpaceGuid_SmramMask, "Smram Mask", &gPlatformFspPkgTokenSpaceGuid_SmramMask,
Help "The SMM Regions AB-SEG and/or H-SEG reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_Ibecc, "Ibecc", &EN_DIS,
Help "Enable/Disable Ibecc"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode, "IbeccOperationMode", &gPlatformFspPkgTokenSpaceGuid_IbeccOperationMode,
Help "In-Band ECC Operation Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeEnable, "IbeccProtectedRangeEnable", &EN_DIS,
Help "In-Band ECC Protected Region Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeBase, "IbeccProtectedRangeBase", HEX,
Help "IBECC Protected Region Base"
"Valid range: 0x00000000 ~ 0x03FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccProtectedRangeMask, "IbeccProtectedRangeMask", HEX,
Help "IBECC Protected Region Mask"
"Valid range: 0x00000001 ~ 0x03FFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_MrcFastBoot, "MRC Fast Boot", &EN_DIS,
Help "Enables/Disable the MRC fast path thru the MRC"
Combo $gPlatformFspPkgTokenSpaceGuid_RmtPerTask, "Rank Margin Tool per Task", &EN_DIS,
Help "This option enables the user to execute Rank Margin Tool per major training step in the MRC."
Combo $gPlatformFspPkgTokenSpaceGuid_TrainTrace, "Training Trace", &EN_DIS,
Help "This option enables the trained state tracing feature in MRC. This feature will print out the key training parameters state across major training steps."
Combo $gPlatformFspPkgTokenSpaceGuid_TsegSize, "Tseg Size", &gPlatformFspPkgTokenSpaceGuid_TsegSize,
Help "Size of SMRAM memory reserved. 0x400000 for Release build and 0x1000000 for Debug build"
EditNum $gPlatformFspPkgTokenSpaceGuid_MmioSize, "MMIO Size", HEX,
Help "Size of MMIO space reserved for devices. 0(Default)=Auto, non-Zero=size in MB"
"Valid range: 0 ~ 0xC00"
Combo $gPlatformFspPkgTokenSpaceGuid_ProbelessTrace, "Probeless Trace", &EN_DIS,
Help "Probeless Trace: 0=Disabled, 1=Enable. Enabling Probeless Trace will reserve 128MB. This also requires IED to be enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_SpdAddressTable, "Spd Address Tabl", HEX,
Help "Specify SPD Address table for CH0D0/CH0D1/CH1D0&CH1D1. MemorySpdPtr will be used if SPD Address is 00"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UserBd, "Board Type", &gPlatformFspPkgTokenSpaceGuid_UserBd,
Help "MrcBoardType, Options are 0:Mobile, 1:Desktop1Dpc, 2:Desktop2DpcDaisyChain, 3:Desktop2DpcTeeTopologyAsymmetrical, 4:Desktop2DpcTeeTopology, 5:UltMobile, 7:UP Server"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss, "MRC Retraining on RTC Power Loss", &gPlatformFspPkgTokenSpaceGuid_DisableMrcRetrainingOnRtcPowerLoss,
Help "Specifies whether MRC memory training will occur when RTC power loss is detected. Options are 0=Memory will be re-trained if RTC power loss is detected. 1=Memory will not be re-trained when RTC power loss is detected. (Typically used on board designs without a dedicated RTC battery)"
Combo $gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit, "DDR Frequency Limit", &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit,
Help "Maximum Memory Frequency Selections in Mhz. Options are 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933 and 0 for Auto."
Combo $gPlatformFspPkgTokenSpaceGuid_SaGv, "SA GV", &gPlatformFspPkgTokenSpaceGuid_SaGv,
Help "System Agent dynamic frequency support and when enabled memory will be training at four different frequencies."
Combo $gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot, "Memory Test on Warm Boot", &gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot,
Help "Run Base Memory Test on Warm Boot"
Combo $gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl, "DDR Speed Control", &gPlatformFspPkgTokenSpaceGuid_DdrSpeedControl,
Help "DDR Frequency and Gear control for all SAGV points."
Combo $gPlatformFspPkgTokenSpaceGuid_RMT, "Rank Margin Tool", &EN_DIS,
Help "Enable/disable Rank Margin Tool."
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch0, "Controller 0 Channel 0 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 0"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch1, "Controller 0 Channel 1 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 1"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch2, "Controller 0 Channel 2 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 2"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc0Ch3, "Controller 0 Channel 3 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 0 Channel 3"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch0, "Controller 1 Channel 0 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 0"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch1, "Controller 1 Channel 1 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 1"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch2, "Controller 1 Channel 2 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 2"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMc1Ch3, "Controller 1 Channel 3 DIMM Control", &EN_DIS,
Help "Enable / Disable DIMMs on Controller 1 Channel 3"
Combo $gPlatformFspPkgTokenSpaceGuid_ScramblerSupport, "Scrambler Support", &EN_DIS,
Help "This option enables data scrambling in memory."
Combo $gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected, "SPD Profile Selected", &gPlatformFspPkgTokenSpaceGuid_SpdProfileSelected,
Help "Select DIMM timing profile. Options are 0:Default SPD Profile, 1:Custom Profile, 2:XMP Profile 1, 3:XMP Profile 2, 4:XMP Profile 3, 5:XMP User Profile 4, 6:XMP User Profile 5"
Combo $gPlatformFspPkgTokenSpaceGuid_RefClk, "Memory Reference Clock", &gPlatformFspPkgTokenSpaceGuid_RefClk,
Help "100MHz, 133MHz."
EditNum $gPlatformFspPkgTokenSpaceGuid_VddVoltage, "Memory Voltage", DEC,
Help "DRAM voltage (Vdd) (supply voltage for input buffers and core logic of the DRAM chips) in millivolts from 0 - default to 1435mv."
"Valid range: 0 ~ 1435"
Combo $gPlatformFspPkgTokenSpaceGuid_Ratio, "Memory Ratio", &gPlatformFspPkgTokenSpaceGuid_Ratio,
Help "Automatic or the frequency will equal ratio times reference clock. Set to Auto to recalculate memory timings listed below."
EditNum $gPlatformFspPkgTokenSpaceGuid_tCL, "tCL", HEX,
Help "CAS Latency, 0: AUTO, max: 31. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tCWL, "tCWL", HEX,
Help "Min CAS Write Latency Delay Time, 0: AUTO, max: 34. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x22"
EditNum $gPlatformFspPkgTokenSpaceGuid_tFAW, "tFAW", HEX,
Help "Min Four Activate Window Delay Time, 0: AUTO, max: 63. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRAS, "tRAS", HEX,
Help "RAS Active Time, 0: AUTO, max: 64. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x40"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRCDtRP, "tRCD/tRP", HEX,
Help "RAS to CAS delay time and Row Precharge delay time, 0: AUTO, max: 63. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tREFI, "tREFI", HEX,
Help "Refresh Interval, 0: AUTO, max: 65535. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC, "tRFC", HEX,
Help "Min Refresh Recovery Delay Time, 0: AUTO, max: 1023. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD, "tRRD", HEX,
Help "Min Row Active to Row Active Delay Time, 0: AUTO, max: 15. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRTP, "tRTP", HEX,
Help "Min Internal Read to Precharge Command Delay Time, 0: AUTO, max: 15. DDR4 legal values: 5, 6, 7, 8, 9, 10, 12. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_tWR, "tWR", &gPlatformFspPkgTokenSpaceGuid_tWR,
Help "Min Write Recovery Time, 0: AUTO, legal values: 5, 6, 7, 8, 10, 12, 14, 16, 18, 20, 24, 30, 34, 40. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR, "tWTR", HEX,
Help "Min Internal Write to Read Command Delay Time, 0: AUTO, max: 28. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0x1C"
EditNum $gPlatformFspPkgTokenSpaceGuid_NModeSupport, "NMode", HEX,
Help "System command rate, range 0-2, 0 means auto, 1 = 1N, 2 = 2N"
"Valid range: 0x00 ~ 0x02"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaGvGear, "SAGV Gear Ratio", HEX,
Help "Gear Selection for SAGV points. 0 - Auto, 1-1 Gear 1, 2-Gear 2"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaGvFreq, "SAGV Frequency", HEX,
Help "SAGV Frequency per point in Mhz. 0 for Auto and a ratio of 133/100MHz: 1333/1300."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GearRatio, "SAGV Disabled Gear Ratio", HEX,
Help "Gear Selection for SAGV Disabled. 0 - Auto, 1-1 Gear 1, 2-Gear 2"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TxtImplemented, "Enable/Disable MRC TXT dependency", &EN_DIS,
Help "When enabled MRC execution will wait for TXT initialization to be done first. Disabled(0x0)(Default): MRC will not wait for TXT initialization, Enabled(0x1): MRC will wait for TXT initialization"
Combo $gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming, "Realtime Memory Timing", &gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryTiming,
Help "0(Default): Disabled, 1: Enabled. When enabled, it will allow the system to perform realtime memory timing changes after MRC_DONE."
EditNum $gPlatformFspPkgTokenSpaceGuid_VddqVoltage, "Memory VDDQ Voltage", DEC,
Help "DRAM voltage (Vddq) (supply voltage for DQ/DQS of the DRAM chips) in millivolts from 0 - default to 1435mv."
"Valid range: 0 ~ 1435"
EditNum $gPlatformFspPkgTokenSpaceGuid_VppVoltage, "Memory VPP Voltage", DEC,
Help "DRAM voltage (Vpp) (supply voltage for VPP of the DRAM chips) in millivolts from 0 - default to 2135mv."
"Valid range: 0 ~ 2135"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieNewFom, "CPU PCIe New FOM", &EN_DIS,
Help "Enable/Disable NewFom for DEKEL Programming. 0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiNewFom, "DMI DEKEL New FOM", &EN_DIS,
Help "Enable/Disable NewFom for DEKEL Programming. 0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DynamicMemoryBoost, "Dynamic Memory Boost", &EN_DIS,
Help "0(Default): Disable, 1: Enable. When enabled, MRC will train the Default SPD Profile, and also the profile selected by SpdProfileSelected, to allow automatic switching during runtime. Only valid if SpdProfileSelected is an XMP Profile, otherwise ignored."
EditNum $gPlatformFspPkgTokenSpaceGuid_HgSupport, "Hybrid Graphics Support ", HEX,
Help "0(Default): PEG10, 1: PEG60, 2:PEG62. Help to select Hybrid Graphics Support on Peg Port"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_RealtimeMemoryFrequency, "Realtime Memory Frequency", &EN_DIS,
Help "0(Default): Disabled, 1: Enabled. Ignored unless SpdProfileSelected is an XMP Profile. If enabled, MRC will train the Default SPD Profile, and also the selected XMP Profile, to allow manually triggered switching between frequencies at runtime."
Combo $gPlatformFspPkgTokenSpaceGuid_SaPreMemProductionRsvd, "SaPreMemProductionRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Production"
Combo $gPlatformFspPkgTokenSpaceGuid_GtClosEnable, "Enable Gt CLOS", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed, "DMI Max Link Speed", &gPlatformFspPkgTokenSpaceGuid_DmiMaxLinkSpeed,
Help "Auto (Default)(0x0): Maximum possible link speed, Gen1(0x1): Limit Link to Gen1 Speed, Gen2(0x2): Limit Link to Gen2 Speed, Gen3(0x3):Limit Link to Gen3 Speed"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable, "DMI Equalization Phase 2", &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh2Enable,
Help "DMI Equalization Phase 2. (0x0): Disable phase 2, (0x1): Enable phase 2, (0x2)(Default): AUTO - Use the current default method"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method, "DMI Gen3 Equalization Phase3", &gPlatformFspPkgTokenSpaceGuid_DmiGen3EqPh3Method,
Help "DMI Gen3 Equalization Phase3. Auto(0x0)(Default): Use the current default method, HwEq(0x1): Use Adaptive Hardware Equalization, SwEq(0x2): Use Adaptive Software Equalization (Implemented in BIOS Reference Code), Static(0x3): Use the Static EQs provided in DmiGen3EndPointPreset array for Phase1 AND Phase3 (Instead of just Phase1), Disabled(0x4): Bypass Equalization Phase 3"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3ProgramStaticEq, "Enable/Disable DMI GEN3 Static EQ Phase1 programming", &EN_DIS,
Help "Program DMI Gen3 EQ Phase1 Static Presets. Disabled(0x0): Disable EQ Phase1 Static Presets Programming, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis, "DeEmphasis control for DMI", &gPlatformFspPkgTokenSpaceGuid_DmiDeEmphasis,
Help "DeEmphasis control for DMI. 0=-6dB, 1(Default)=-3.5 dB"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3RootPortPreset, "DMI Gen3 Root port preset values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointPreset, "DMI Gen3 End port preset values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3EndPointHint, "DMI Gen3 End port Hint values per lane", HEX,
Help "Used for programming DMI Gen3 Hint values per lane. Range: 0-6, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3RxCtlePeaking, "DMI Gen3 RxCTLEp per-Bundle control", HEX,
Help "Range: 0-15, 0 is default for each bundle, must be specified based upon platform design"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspm, "DMI ASPM Configuration:{Combo", HEX,
Help "Set ASPM Configuration"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiHweq, "Enable/Disable DMI GEN3 Hardware Eq", &EN_DIS,
Help "Enable/Disable DMI GEN3 Hardware Eq. Disabled(0x0)(Default): Disable Hardware Eq, Enabled(0x1): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase23Bypass, "Enable/Disable CPU DMI GEN3 Phase 23 Bypass", &EN_DIS,
Help "CPU DMI GEN3 Phase 23 Bypass. Disabled(0x0)(Default): Disable Phase 23 Bypass, Enabled(0x1): Enable Phase 23 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3EqPhase3Bypass, "Enable/Disable CPU DMI GEN3 Phase 3 Bypass", &EN_DIS,
Help "CPU DMI GEN3 Phase 3 Bypass. Disabled(0x0)(Default): Disable Phase 3 Bypass, Enabled(0x1): Enable Phase 3 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3LtcoEnable, "Enable/Disable CPU DMI Gen3 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0)(Default): Disable Local Transmitter Coefficient Override, Enabled(0x1): Enable Local Transmitter Coefficient Override"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen3RtcoRtpoEnable, "Enable/Disable CPU DMI Gen3 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpre, "DMI Gen3 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen3 Transmitter Pre-Cursor Coefficient . Range: 0-10, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3Ltcpo, "DMI Gen3 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming Transmitter Post-Cursor Coefficient. Range: 0-9, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCm, "PCIE Hw Eq Gen3 CoeffList Cm", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen3CoeffListCp, "PCIE Hw Eq Gen3 CoeffList Cp", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPresetEnable, "Enable/Disable DMI GEN3 DmiGen3DsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN3 DmiGen3DsPreset. Auto(0x0)(Default): DmiGen3DsPresetEnable, Manual(0x1): Enable DmiGen3DsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortRxPreset, "DMI Gen3 Root port preset Rx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 1 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3DsPortTxPreset, "DMI Gen3 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPresetEnable, "Enable/Disable DMI GEN3 DmiGen3UsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN3 DmiGen3UsPreset. Auto(0x0)(Default): DmiGen3UsPresetEnable, Manual(0x1): Enable DmiGen3UsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortRxPreset, "DMI Gen3 Root port preset Rx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen3UsPortTxPreset, "DMI Gen3 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen3 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCm, "DMI Hw Eq Gen4 CoeffList Cm", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuDmiHwEqGen4CoeffListCp, "DMI Hw Eq Gen4 CoeffList Cp", HEX,
Help "CPU_PCIE_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase23Bypass, "Enable/Disable CPU DMI GEN4 Phase 23 Bypass", &EN_DIS,
Help "CPU DMI GEN4 Phase 23 Bypass. Disabled(0x0)(Default): Disable Phase 23 Bypass, Enabled(0x1): Enable Phase 23 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4EqPhase3Bypass, "Enable/Disable CPU DMI GEN4 Phase 3 Bypass", &EN_DIS,
Help "CPU DMI GEN3 Phase 4 Bypass. Disabled(0x0)(Default): Disable Phase 3 Bypass, Enabled(0x1): Enable Phase 3 Bypass"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPresetEnable, "Enable/Disable DMI GEN4 DmiGen4DsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN4 DmiGen4DsPreset. Auto(0x0)(Default): DmiGen4DsPresetEnable, Manual(0x1): Enable DmiGen4DsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4DsPortTxPreset, "DMI Gen4 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen4 preset values per lane. Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4RtcoRtpoEnable, "Enable/Disable CPU DMI Gen4 EQ Remote Transmitter Coefficient/Preset Override Enable", &EN_DIS,
Help "Program Remote Transmitter Coefficient/Preset Override. Disabled(0x0)(Default): Disable Remote Transmitter Coefficient/Preset Override, Enabled(0x1): Enable Remote Transmitter Coefficient/Preset Override"
Combo $gPlatformFspPkgTokenSpaceGuid_Gen4LtcoEnable, "Enable/Disable CPU DMI Gen4 EQ Local Transmitter Coefficient Override Enable", &EN_DIS,
Help "Program Gen3 EQ Local Transmitter Coefficient Override. Disabled(0x0)(Default): Disable Local Transmitter Coefficient Override, Enabled(0x1): Enable Local Transmitter Coefficient Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpre, "DMI Gen4 Transmitter Pre-Cursor Coefficient ", HEX,
Help "Used for programming DMI Gen4 Transmitter Pre-Cursor Coefficient . Range: 0-10, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4Ltcpo, "DMI Gen4 Transmitter Post-Cursor Coefficient", HEX,
Help "Used for programming DMI Gen4 Transmitter Post-Cursor Coefficient. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPresetEnable, "Enable/Disable DMI GEN4 DmiGen4UsPresetEnable", &EN_DIS,
Help "Enable/Disable DMI GEN4 DmiGen4UsPreset. Auto(0x0)(Default): DmiGen4UsPresetEnable, Manual(0x1): Enable DmiGen4UsPresetEnable"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiGen4UsPortTxPreset, "DMI Gen4 Root port preset Tx values per lane", HEX,
Help "Used for programming DMI Gen4 preset values per lane. Range: 0-10, 1 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspmCtrl, "DMI ASPM Control Configuration:{Combo", HEX,
Help "Set ASPM Control configuration"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmiAspmL1ExitLatency, "DMI ASPM L1 exit Latency", HEX,
Help "Range: 0-7, 4 is default L1 exit Latency"
"Valid range: 0x00 ~ 0x07"
Combo $gPlatformFspPkgTokenSpaceGuid_SiSkipOverrideBootModeWhenFwUpdate, "Skip override boot mode When Fw Update.", &EN_DIS,
Help "When set to TRUE and boot mode is BOOT_ON_FLASH_UPDATE, skip setting boot mode to BOOT_WITH_FULL_CONFIGURATION in PEI memory init."
Combo $gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup, "TSC HW Fixup disable", &gPlatformFspPkgTokenSpaceGuid_TscDisableHwFixup,
Help "TSC HW Fixup disable during TSC copy from PMA to APIC. <b>0: Enable</b>; 1: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_IaIccUnlimitedMode, "Support IA Unlimited ICCMAX", &EN_DIS,
Help "Support IA Unlimited ICCMAX up to maximum value 512A; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_IaIccMax, "IA ICCMAX", HEX,
Help "IA ICCMAX value is represented in 1/4 A increments. A value of 400 = 100A. <b>4 </b>. Range is 4-2047."
"Valid range: 0x00 ~ 0x7FF"
Combo $gPlatformFspPkgTokenSpaceGuid_GtIccUnlimitedMode, "Support GT Unlimited ICCMAX", &EN_DIS,
Help "Support GT Unlimited ICCMAX up to maximum value 512A; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_GtIccMax, "GT ICCMAX", HEX,
Help "GT ICCMAX value is represented in 1/4 A increments. A value of 400 = 100A. <b>4 </b>. Range is 4-2047."
"Valid range: 0x00 ~ 0x7FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold0, "TVB Down Bins for Temp Threshold 0", DEC,
Help "Down Bins (delta) for Temperature Threshold 0. When running above Temperature Threshold 0, the ratio will be clipped by MAX_RATIO[n]-This value, when TVB ratio clipping is enabled. Default is 1."
"Valid range: 0 ~ 10"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold0, "TVB Temperature Threshold 0", DEC,
Help "TVB Temp (degrees C) - Temperature Threshold 0. Running ABOVE this temperature will clip delta Down Bins for Threshold 0 from the resolved OC Ratio, when TVB ratio clipping is enabled. Default is 70."
"Valid range: 0 ~ 100"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbTempThreshold1, "TVB Temperature Threshold 1", DEC,
Help "TVB Temp (degrees C) - Temperature Threshold 1. Running ABOVE this temperature will clip delta Down Bins for Threshold 1 from the resolved OC Ratio, when TVB ratio clipping is enabled. Default is 100."
"Valid range: 0 ~ 100"
EditNum $gPlatformFspPkgTokenSpaceGuid_TvbDownBinsTempThreshold1, "TVB Down Bins for Temp Threshold 1", DEC,
Help "Down Bins (delta) for Temperature Threshold 1. When running above Temperature Threshold 1, the ratio will be clipped by MAX_RATIO[n]-Down Bin Threshold 1-This value, when TVB ratio clipping is enabled. Default is 2."
"Valid range: 0 ~ 10"
Combo $gPlatformFspPkgTokenSpaceGuid_FllOcModeEn, "FLL Overclock Mode Enable", &EN_DIS,
Help "Select FLL Mode Value from 0 to 3. 0x0 = no overclocking, 0x1 = ratio overclocking with nominal (0.5-1x) reference clock frequency, 0x2 = BCLK overclocking with elevated (1-3x) reference clock frequency, 0x3 = BCLK overclocking with extreme elevated (3-5x) reference clock frequency and ratio limited to 63."
EditNum $gPlatformFspPkgTokenSpaceGuid_FllOverclockMode, "FLL Overclock Mode", HEX,
Help "Select FLL Mode Value from 0 to 3. 0x0 = no overclocking, 0x1 = ratio overclocking with nominal (0.5-1x) reference clock frequency, 0x2 = BCLK overclocking with elevated (1-3x) reference clock frequency, 0x3 = BCLK overclocking with extreme elevated (3-5x) reference clock frequency and ratio limited to 63."
"Valid range: 0x0 ~ 0x3"
EditNum $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel, "Configuration for boot TDP selection", HEX,
Help "Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP Up;0xFF : Deactivate"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CustomPowerLimit1, "Short term Power Limit value for custom cTDP level 1", HEX,
Help "Short term Power Limit value for custom cTDP level 1. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
Combo $gPlatformFspPkgTokenSpaceGuid_Etvb, "Enhanced Thermal Turbo Mode", &EN_DIS,
Help "When eTVB mode is enabled user will be clipped when temperatures reach 70C <b>0: Disabled</b>; 1: Enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_UnderVoltProtection, "UnderVolt Protection", &EN_DIS,
Help "When UnderVolt Protection is enabled, user will be not be able to program under voltage in OS runtime. 0: Disabled; <b>1: Enabled</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPreMem, "ReservedCpuPreMem", &EN_DIS,
Help "Reserved for Cpu Pre-Mem"
EditNum $gPlatformFspPkgTokenSpaceGuid_MrcSafeConfig, "MRC Safe Config", HEX,
Help "Enables/Disable MRC Safe Config"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_HobBufferSize, "HobBufferSize", &gPlatformFspPkgTokenSpaceGuid_HobBufferSize,
Help "Size to set HOB Buffer. 0:Default, 1: 1 Byte, 2: 1 KB, 3: Max value(assuming 63KB total HOB size)."
Combo $gPlatformFspPkgTokenSpaceGuid_ECT, "Early Command Training", &EN_DIS,
Help "Enables/Disable Early Command Training"
Combo $gPlatformFspPkgTokenSpaceGuid_SOT, "SenseAmp Offset Training", &EN_DIS,
Help "Enables/Disable SenseAmp Offset Training"
Combo $gPlatformFspPkgTokenSpaceGuid_ERDMPRTC2D, "Early ReadMPR Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Early ReadMPR Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDMPRT, "Read MPR Training", &EN_DIS,
Help "Enables/Disable Read MPR Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RCVET, "Receive Enable Training", &EN_DIS,
Help "Enables/Disable Receive Enable Training"
Combo $gPlatformFspPkgTokenSpaceGuid_JWRL, "Jedec Write Leveling", &EN_DIS,
Help "Enables/Disable Jedec Write Leveling"
Combo $gPlatformFspPkgTokenSpaceGuid_EWRTC2D, "Early Write Time Centering 2D", &EN_DIS,
Help "Enables/Disable Early Write Time Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_ERDTC2D, "Early Read Time Centering 2D", &EN_DIS,
Help "Enables/Disable Early Read Time Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTC1D, "Write Timing Centering 1D", &EN_DIS,
Help "Enables/Disable Write Timing Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRVC1D, "Write Voltage Centering 1D", &EN_DIS,
Help "Enables/Disable Write Voltage Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDTC1D, "Read Timing Centering 1D", &EN_DIS,
Help "Enables/Disable Read Timing Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMODTT, "Dimm ODT Training", &EN_DIS,
Help "Enables/Disable Dimm ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMRONT, "DIMM RON Training", &EN_DIS,
Help "Enables/Disable DIMM RON Training"
Combo $gPlatformFspPkgTokenSpaceGuid_WRDSEQT, "Write Drive Strength/Equalization 2D", &EN_DIS,
Help "Enables/Disable Write Drive Strength/Equalization 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRSRT, "Write Slew Rate Training", &EN_DIS,
Help "Enables/Disable Write Slew Rate Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDODTT, "Read ODT Training", &EN_DIS,
Help "Enables/Disable Read ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDEQT, "Read Equalization Training", &EN_DIS,
Help "Enables/Disable Read Equalization Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDAPT, "Read Amplifier Training", &EN_DIS,
Help "Enables/Disable Read Amplifier Training"
Combo $gPlatformFspPkgTokenSpaceGuid_WRTC2D, "Write Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Write Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDTC2D, "Read Timing Centering 2D", &EN_DIS,
Help "Enables/Disable Read Timing Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_WRVC2D, "Write Voltage Centering 2D", &EN_DIS,
Help "Enables/Disable Write Voltage Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVC2D, "Read Voltage Centering 2D", &EN_DIS,
Help "Enables/Disable Read Voltage Centering 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDVC, "Command Voltage Centering", &EN_DIS,
Help "Enables/Disable Command Voltage Centering"
Combo $gPlatformFspPkgTokenSpaceGuid_LCT, "Late Command Training", &EN_DIS,
Help "Enables/Disable Late Command Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RTL, "Round Trip Latency Training", &EN_DIS,
Help "Enables/Disable Round Trip Latency Training"
Combo $gPlatformFspPkgTokenSpaceGuid_TAT, "Turn Around Timing Training", &EN_DIS,
Help "Enables/Disable Turn Around Timing Training"
Combo $gPlatformFspPkgTokenSpaceGuid_MEMTST, "Memory Test", &EN_DIS,
Help "Enables/Disable Memory Test"
Combo $gPlatformFspPkgTokenSpaceGuid_ALIASCHK, "DIMM SPD Alias Test", &EN_DIS,
Help "Enables/Disable DIMM SPD Alias Test"
Combo $gPlatformFspPkgTokenSpaceGuid_RCVENC1D, "Receive Enable Centering 1D", &EN_DIS,
Help "Enables/Disable Receive Enable Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_RMC, "Retrain Margin Check", &EN_DIS,
Help "Enables/Disable Retrain Margin Check"
Combo $gPlatformFspPkgTokenSpaceGuid_WRDSUDT, "Write Drive Strength Up/Dn independently", &EN_DIS,
Help "Enables/Disable Write Drive Strength Up/Dn independently"
Combo $gPlatformFspPkgTokenSpaceGuid_EccSupport, "ECC Support", &EN_DIS,
Help "Enables/Disable ECC Support"
Combo $gPlatformFspPkgTokenSpaceGuid_RemapEnable, "Memory Remap", &EN_DIS,
Help "Enables/Disable Memory Remap"
Combo $gPlatformFspPkgTokenSpaceGuid_RankInterleave, "Rank Interleave support", &EN_DIS,
Help "Enables/Disable Rank Interleave support. NOTE: RI and HORI can not be enabled at the same time."
Combo $gPlatformFspPkgTokenSpaceGuid_EnhancedInterleave, "Enhanced Interleave support", &EN_DIS,
Help "Enables/Disable Enhanced Interleave support"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashEnable, "Ch Hash Support", &EN_DIS,
Help "Enable/Disable Channel Hash Support. NOTE: ONLY if Memory interleaved Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashOverride, "Ch Hash Settings Override", &EN_DIS,
Help "Channel Hash Settings Override"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableExtts, "Extern Therm Status", &EN_DIS,
Help "Enables/Disable Extern Therm Status"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePwrDn, "DDR PowerDown and idle counter", &EN_DIS,
Help "Enables/Disable DDR PowerDown and idle counter(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePwrDnLpddr, "DDR PowerDown and idle counter", &EN_DIS,
Help "Enables/Disable DDR PowerDown and idle counter(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_SrefCfgEna, "SelfRefresh Enable", &EN_DIS,
Help "Enables/Disable SelfRefresh Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeatLpddr, "Throttler CKEMin Defeature", &EN_DIS,
Help "Enables/Disable Throttler CKEMin Defeature(For LPDDR Only)"
Combo $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinDefeat, "Throttler CKEMin Defeature", &EN_DIS,
Help "Enables/Disable Throttler CKEMin Defeature"
Combo $gPlatformFspPkgTokenSpaceGuid_RhSelect, "Row Hammer Select", &gPlatformFspPkgTokenSpaceGuid_RhSelect,
Help "Row Hammer Select"
Combo $gPlatformFspPkgTokenSpaceGuid_ExitOnFailure, "Exit On Failure (MRC)", &EN_DIS,
Help "Enables/Disable Exit On Failure (MRC)"
Combo $gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1, "New Features 1 - MRC", &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable1,
Help "New Feature Enabling 1, <b>0:Disable</b>, 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2, "New Features 2 - MRC", &gPlatformFspPkgTokenSpaceGuid_NewFeatureEnable2,
Help "New Feature Enabling 2, <b>0:Disable</b>, 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DCC, "Duty Cycle Correction Training", &EN_DIS,
Help "Enable/Disable Duty Cycle Correction Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVC1D, "Read Voltage Centering 1D", &EN_DIS,
Help "Enable/Disable Read Voltage Centering 1D"
Combo $gPlatformFspPkgTokenSpaceGuid_TXTCO, "TxDqTCO Comp Training", &EN_DIS,
Help "Enable/Disable TxDqTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CLKTCO, "ClkTCO Comp Training", &EN_DIS,
Help "Enable/Disable ClkTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDSR, "CMD Slew Rate Training", &EN_DIS,
Help "Enable/Disable CMD Slew Rate Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDDSEQ, "CMD Drive Strength and Tx Equalization", &EN_DIS,
Help "Enable/Disable CMD Drive Strength and Tx Equalization"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMODTCA, "DIMM CA ODT Training", &EN_DIS,
Help "Enable/Disable DIMM CA ODT Training"
Combo $gPlatformFspPkgTokenSpaceGuid_TXTCODQS, "TxDqsTCO Comp Training", &EN_DIS,
Help "Enable/Disable TxDqsTCO Comp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDDRUD, "CMD/CTL Drive Strength Up/Dn 2D", &EN_DIS,
Help "Enable/Disable CMD/CTL Drive Strength Up/Dn 2D"
Combo $gPlatformFspPkgTokenSpaceGuid_VCCDLLBP, "VccDLL Bypass Training", &EN_DIS,
Help "Enable/Disable VccDLL Bypass Training"
Combo $gPlatformFspPkgTokenSpaceGuid_PVTTDNLP, "PanicVttDnLp Training", &EN_DIS,
Help "Enable/Disable PanicVttDnLp Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RDVREFDC, "Read Vref Decap Training*", &EN_DIS,
Help "Enable/Disable Read Vref Decap Training*"
Combo $gPlatformFspPkgTokenSpaceGuid_VDDQT, "Vddq Training", &EN_DIS,
Help "Enable/Disable Vddq Training"
Combo $gPlatformFspPkgTokenSpaceGuid_RMTBIT, "Rank Margin Tool Per Bit", &EN_DIS,
Help "Enable/Disable Rank Margin Tool Per Bit"
Combo $gPlatformFspPkgTokenSpaceGuid_EccDftEn, "ECC DFT feature", &EN_DIS,
Help "Enables/Disable ECC DFT feature"
Combo $gPlatformFspPkgTokenSpaceGuid_Write0, "Write0 feature", &EN_DIS,
Help "Enables/Disable Write0 feature"
Combo $gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedClock, "Select if CLK0 is shared between Rank0 and Rank1 in DDR4 DDP", &EN_DIS,
Help "Select if CLK0 is shared between Rank0 and Rank1 in DDR4 DDP"
Combo $gPlatformFspPkgTokenSpaceGuid_Ddr4DdpSharedZq, "Select if ZQ pin is shared between Rank0 and Rank1 in DDR4 DDP", &EN_DIS,
Help "ESelect if ZQ pin is shared between Rank0 and Rank1 in DDR4 DDP"
Combo $gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit, "Ch Hash Interleaved Bit", &gPlatformFspPkgTokenSpaceGuid_ChHashInterleaveBit,
Help "Select the BIT to be used for Channel Interleaved mode. NOTE: BIT7 will interlave the channels at a 2 cacheline granularity, BIT8 at 4 and BIT9 at 8. Default is BIT8"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChHashMask, "Ch Hash Mask", HEX,
Help "Set the BIT(s) to be included in the XOR function. NOTE BIT mask corresponds to BITS [19:6] Default is 0x30CC"
"Valid range: 0x0000 ~ 0x3FFF"
Combo $gPlatformFspPkgTokenSpaceGuid_BClkFrequency, "Base reference clock value", &gPlatformFspPkgTokenSpaceGuid_BClkFrequency,
Help "Base reference clock value, in Hertz(Default is 100Hz)"
EditNum $gPlatformFspPkgTokenSpaceGuid_Idd3n, "EPG DIMM Idd3N", HEX,
Help "Active standby current (Idd3N) in milliamps from datasheet. Must be calculated on a per DIMM basis. Default is 26"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_Idd3p, "EPG DIMM Idd3P", HEX,
Help "Active power-down current (Idd3P) in milliamps from datasheet. Must be calculated on a per DIMM basis. Default is 11"
"Valid range: 0x00 ~ 0x7D0"
Combo $gPlatformFspPkgTokenSpaceGuid_CMDNORM, "CMD Normalization", &EN_DIS,
Help "Enable/Disable CMD Normalization"
Combo $gPlatformFspPkgTokenSpaceGuid_EWRDSEQ, "Early DQ Write Drive Strength and Equalization Training", &EN_DIS,
Help "Enable/Disable Early DQ Write Drive Strength and Equalization Training"
Combo $gPlatformFspPkgTokenSpaceGuid_McRefresh2X, "MC_REFRESH_2X_MODE", &EN_DIS,
Help "DEPRECATED"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm0, "Idle Energy Mc0Ch0Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch0Dimm1, "Idle Energy Mc0Ch0Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm0, "Idle Energy Mc0Ch1Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc0Ch1Dimm1, "Idle Energy Mc0Ch1Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm0, "Idle Energy Mc1Ch0Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch0Dimm1, "Idle Energy Mc1Ch0Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm0, "Idle Energy Mc1Ch1Dimm0", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_IdleEnergyMc1Ch1Dimm1, "Idle Energy Mc1Ch1Dimm1", HEX,
Help "Idle Energy Consumed for 1 clk w/dimm idle/cke on, range[63;0],(10= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm0, "PowerDown Energy Mc0Ch0Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch0Dimm1, "PowerDown Energy Mc0Ch0Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm0, "PowerDown Energy Mc0Ch1Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc0Ch1Dimm1, "PowerDown Energy Mc0Ch1Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm0, "PowerDown Energy Mc1Ch0Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch0Dimm1, "PowerDown Energy Mc1Ch0Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm0, "PowerDown Energy Mc1Ch1Dimm0", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PdEnergyMc1Ch1Dimm1, "PowerDown Energy Mc1Ch1Dimm1", HEX,
Help "PowerDown Energy Consumed w/dimm idle/cke off, range[63;0],(6= Def)"
"Valid range: 0x0 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm0, "Activate Energy Mc0Ch0Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch0Dimm1, "Activate Energy Mc0Ch0Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm0, "Activate Energy Mc0Ch1Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc0Ch1Dimm1, "Activate Energy Mc0Ch1Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm0, "Activate Energy Mc1Ch0Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch0Dimm1, "Activate Energy Mc1Ch0Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm0, "Activate Energy Mc1Ch1Dimm0", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ActEnergyMc1Ch1Dimm1, "Activate Energy Mc1Ch1Dimm1", HEX,
Help "Activate Energy Contribution, range[255;0],(172= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm0, "Read Energy Mc0Ch0Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch0Dimm1, "Read Energy Mc0Ch0Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm0, "Read Energy Mc0Ch1Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc0Ch1Dimm1, "Read Energy Mc0Ch1Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm0, "Read Energy Mc1Ch0Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch0Dimm1, "Read Energy Mc1Ch0Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm0, "Read Energy Mc1Ch1Dimm0", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RdEnergyMc1Ch1Dimm1, "Read Energy Mc1Ch1Dimm1", HEX,
Help "Read Energy Contribution, range[255;0],(212= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm0, "Write Energy Mc0Ch0Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch0Dimm1, "Write Energy Mc0Ch0Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm0, "Write Energy Mc0Ch1Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc0Ch1Dimm1, "Write Energy Mc0Ch1Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm0, "Write Energy Mc1Ch0Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch0Dimm1, "Write Energy Mc1Ch0Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm0, "Write Energy Mc1Ch1Dimm0", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WrEnergyMc1Ch1Dimm1, "Write Energy Mc1Ch1Dimm1", HEX,
Help "Write Energy Contribution, range[255;0],(221= Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmr, "Throttler CKEMin Timer", HEX,
Help "Timer value for CKEMin, range[255;0]. Req'd min of SC_ROUND_T + BYTE_LENGTH (4). Dfault is 0x00"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_AllowOppRefBelowWriteThrehold, "Allow Opp Ref Below Write Threhold", &EN_DIS,
Help "Allow opportunistic refreshes while we don't exit power down."
EditNum $gPlatformFspPkgTokenSpaceGuid_WriteThreshold, "Write Threshold", HEX,
Help "Number of writes that can be accumulated while CKE is low before CKE is asserted."
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh0, "Rapl Power Floor Ch0", HEX,
Help "Power budget ,range[255;0],(0= 5.3W Def)"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RaplPwrFlCh1, "Rapl Power Floor Ch1", HEX,
Help "Power budget ,range[255;0],(0= 5.3W Def)"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnCmdRate, "Command Rate Support", &gPlatformFspPkgTokenSpaceGuid_EnCmdRate,
Help "CMD Rate and Limit Support Option. NOTE: ONLY supported in 1N Mode, Default is 3 CMDs"
Combo $gPlatformFspPkgTokenSpaceGuid_Refresh2X, "REFRESH_2X_MODE", &gPlatformFspPkgTokenSpaceGuid_Refresh2X,
Help "0- (Default)Disabled 1-iMC enables 2xRef when Warm and Hot 2- iMC enables 2xRef when Hot"
Combo $gPlatformFspPkgTokenSpaceGuid_EpgEnable, "Energy Performance Gain", &EN_DIS,
Help "Enable/disable(default) Energy Performance Gain."
EditNum $gPlatformFspPkgTokenSpaceGuid_Lfsr0Mask, "RH pTRR LFSR0 Mask", HEX,
Help "Row Hammer pTRR LFSR0 Mask, 1/2^(value)"
"Valid range: 0x01 ~ 0xF"
Combo $gPlatformFspPkgTokenSpaceGuid_UserThresholdEnable, "User Manual Threshold", &EN_DIS,
Help "Disabled: Predefined threshold will be used.\nEnabled: User Input will be used."
Combo $gPlatformFspPkgTokenSpaceGuid_UserBudgetEnable, "User Manual Budget", &EN_DIS,
Help "Disabled: Configuration of memories will defined the Budget value.\nEnabled: User Input will be used."
Combo $gPlatformFspPkgTokenSpaceGuid_PowerDownMode, "Power Down Mode", &gPlatformFspPkgTokenSpaceGuid_PowerDownMode,
Help "This option controls command bus tristating during idle periods"
EditNum $gPlatformFspPkgTokenSpaceGuid_PwdwnIdleCounter, "Pwr Down Idle Timer", HEX,
Help "The minimum value should = to the worst case Roundtrip delay + Burst_Length. 0 means AUTO: 64 for ULX/ULT, 128 for DT/Halo"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout, "Page Close Idle Timeout", &gPlatformFspPkgTokenSpaceGuid_DisPgCloseIdleTimeout,
Help "This option controls Page Close Idle Timeout"
EditNum $gPlatformFspPkgTokenSpaceGuid_CmdRanksTerminated, "Bitmask of ranks that have CA bus terminated", HEX,
Help "Offset 225 LPDDR4: Bitmask of ranks that have CA bus terminated. <b>0x01=Default, Rank0 is terminating and Rank1 is non-terminating</b>"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SafeMode, "Safe Mode Support", &EN_DIS,
Help "This option configures the varous items in the IO and MC to be more conservative.(def=Disable)"
Combo $gPlatformFspPkgTokenSpaceGuid_CleanMemory, "Ask MRC to clear memory content", &EN_DIS,
Help "Ask MRC to clear memory content <b>0: Do not Clear Memory;</b> 1: Clear Memory."
Combo $gPlatformFspPkgTokenSpaceGuid_LpDdrDqDqsReTraining, "LpDdrDqDqsReTraining", &EN_DIS,
Help "Enable/Disable TxDqDqs ReTraining for LP4/5 and DDR5"
EditNum $gPlatformFspPkgTokenSpaceGuid_RMTLoopCount, "RMTLoopCount", HEX,
Help "Specifies the Loop Count to be used during Rank Margin Tool Testing. 0 - AUTO"
"Valid range: 0 ~ 0x20"
EditNum $gPlatformFspPkgTokenSpaceGuid_BclkRfiFreq, "BCLK RFI Frequency", HEX,
Help "Bclk RFI Frequency for each SAGV point in Hz units. 98000000Hz = 98MHz <b>0 - No RFI Tuning</b>. Range is 98Mhz-100Mhz."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RefreshPanicWm, "REFRESH_PANIC_WM", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RefreshHpWm, "REFRESH_HP_WM", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lp5CccConfig, "Command Pins Mapping", HEX,
Help "BitMask where bits [3:0] are Controller 0 Channel [3:0] and bits [7:4] are Controller 1 Channel [3:0]. 0 = CCC pin mapping is Ascending, 1 = CCC pin mapping is Descending."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CmdMirror, "Command Pins Mirrored", HEX,
Help "BitMask where bits [3:0] are Controller 0 Channel [3:0] and bits [7:4] are Controller 1 Channel [3:0]. 0 = No Command Mirror and 1 = Command Mirror."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DIMMDFE, "DIMM DFE Training", &EN_DIS,
Help "Enable/Disable DIMM DFE Training"
Combo $gPlatformFspPkgTokenSpaceGuid_ExtendedBankHashing, "Extended Bank Hashing", &EN_DIS,
Help "Enable/Disable Extended Bank Hashing"
Combo $gPlatformFspPkgTokenSpaceGuid_RefreshWm, "Refresh Watermarks", &gPlatformFspPkgTokenSpaceGuid_RefreshWm,
Help "Refresh Watermarks: 0-Low, 1-High (default)"
Combo $gPlatformFspPkgTokenSpaceGuid_McRefreshRate, "MC_REFRESH_RATE", &gPlatformFspPkgTokenSpaceGuid_McRefreshRate,
Help "Type of Refresh Rate used to prevent Row Hammer. Default is NORMAL Refresh"
Combo $gPlatformFspPkgTokenSpaceGuid_PeriodicDcc, "Periodic DCC", &EN_DIS,
Help "Enable/Disable Periodic DCC; default: Disabled"
Combo $gPlatformFspPkgTokenSpaceGuid_LpMode, "LpMode", &gPlatformFspPkgTokenSpaceGuid_LpMode,
Help "LpMode feature"
Combo $gPlatformFspPkgTokenSpaceGuid_TXDQSDCC, "TX DQS DCC Training", &EN_DIS,
Help "Enable/Disable TX DQS DCC Training"
Combo $gPlatformFspPkgTokenSpaceGuid_DRAMDCA, "DRAM DCA Training", &EN_DIS,
Help "Enable/Disable DRAM DCA Training"
Combo $gPlatformFspPkgTokenSpaceGuid_EARLYDIMMDFE, "EARLY DIMM DFE Training", &EN_DIS,
Help "Enable/Disable EARLY DIMM DFE Training"
Combo $gPlatformFspPkgTokenSpaceGuid_BdatEnable, "Generate BIOS Data ACPI Table", &EN_DIS,
Help "Enable: Generate BDAT for MRC RMT or SA PCIe data. Disable (Default): Do not generate it"
Combo $gPlatformFspPkgTokenSpaceGuid_LockPTMregs, "Lock PCU Thermal Management registers", &EN_DIS,
Help "Lock PCU Thermal Management registers. Enable(Default)=1, Disable=0"
Combo $gPlatformFspPkgTokenSpaceGuid_PegGen3Rsvd, "Rsvd", &EN_DIS,
Help "Disable(0x0)(Default): Normal Operation - RxCTLE adaptive behavior enabled, Enable(0x1): Override RxCTLE - Disable RxCTLE adaptive behavior to keep the configured RxCTLE peak values unmodified"
Combo $gPlatformFspPkgTokenSpaceGuid_PanelPowerEnable, "Panel Power Enable", &EN_DIS,
Help "Control for enabling/disabling VDD force bit (Required only for early enabling of eDP panel). 0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_BdatTestType, "BdatTestType", &gPlatformFspPkgTokenSpaceGuid_BdatTestType,
Help "Indicates the type of Memory Training data to populate into the BDAT ACPI table."
Combo $gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board, "Reuse Adl DDR5 Board or not", &gPlatformFspPkgTokenSpaceGuid_ReuseAdlSDdr5Board,
Help "Indicate whether adl ddr5 board is reused."
Combo $gPlatformFspPkgTokenSpaceGuid_OemT12DelayOverride, "Oem T12 Delay Override", &EN_DIS,
Help "Oem T12 Delay Override. 0(Default)=Disable 1=Enable "
Combo $gPlatformFspPkgTokenSpaceGuid_SaPreMemTestRsvd, "SaPreMemTestRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Test"
Combo $gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck, "Margin Limit Check", &gPlatformFspPkgTokenSpaceGuid_MarginLimitCheck,
Help "Margin Limit Check. Choose level of margin check"
EditNum $gPlatformFspPkgTokenSpaceGuid_MarginLimitL2, "Margin Limit L2", HEX,
Help "% of L1 check for margin limit check"
"Valid range: 0x01 ~ 0x12C"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpCdrRelock, "DEKEL CDR Relock", HEX,
Help "Enable/Disable CDR Relock. 0: Disable(Default); 1: Enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DmiCdrRelock, "DMI DEKEL CDR Relock", &EN_DIS,
Help "Enable/Disable CPU DMI CDR Relock. 0: Disable(Default); 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl, "IbeccErrInjControl", &gPlatformFspPkgTokenSpaceGuid_IbeccErrInjControl,
Help "IBECC Error Injection Control"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjAddress, "IbeccErrInjAddress", HEX,
Help "Address to match against for ECC error injection"
"Valid range: 0x0 ~ 0x3FFFFFFFFFC0"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjMask, "IbeccErrInjMask", HEX,
Help "Mask to match against for ECC error injection"
"Valid range: 0x0 ~ 0x3FFFFFFFFFC0"
EditNum $gPlatformFspPkgTokenSpaceGuid_IbeccErrInjCount, "IbeccErrInjCount", HEX,
Help "Number of transactions between ECC error injection"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EnableDmaBuffer, "Pointer EnableDmaBuffer", HEX,
Help "Pointer of EnableDmaBuffer Callback Function."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PllMaxBandingRatio, "PLL Max Banding Ratio", HEX,
Help "DEPRECATED"
"Valid range: 0x0 ~ 0x78"
EditNum $gPlatformFspPkgTokenSpaceGuid_DebugValue, "Debug Value", HEX,
Help "Debug Value"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BoardGpioTablePreMemAddress, "Pre-Mem GPIO table address", HEX,
Help "AlderLake S needs to assert PCIe SLOT RTD3 and PEG reset pins in early PreMem phase. 0: Skip FSP PCIe pins programming. Refer to mAdlSPcieRstPinGpioTable[] in GpioSampleDef.h."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFCpb, "tRFCpb", HEX,
Help "Min Internal per bank refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC2, "tRFC2", HEX,
Help "Min Internal refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRFC4, "tRFC4", HEX,
Help "Min Internal refresh recovery delay time, 0: AUTO, max: 0xFFFF. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD_L, "tRRD_L", HEX,
Help "Min Internal row active to row active delay time for same bank groups, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tRRD_S, "tRRD_S", HEX,
Help "Min Internal row active to row active delay time for different bank groups, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR_L, "tWTR_L", HEX,
Help "Min Internal write to read command delay time for same bank groups, 0: AUTO, max: 127. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tCCD_L, "tCCD_L", HEX,
Help "Min Internal CAS-to-CAS delay for same bank group, 0: AUTO, max: 80. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_tWTR_S, "tWTR_S", HEX,
Help "Min Internal write to read command delay time for different bank groups, 0: AUTO, max: 50. Only used if FspmUpd->FspmConfig.SpdProfileSelected == 1 (Custom Profile)."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EccErrInjAddress, "EccErrInjAddress", HEX,
Help "Address to match against for ECC error injection"
"Valid range: 0x0 ~ 0x1FFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EccErrInjMask, "EccErrInjMask", HEX,
Help "Mask to match against for ECC error injection"
"Valid range: 0x0 ~ 0x1FFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EccErrInjCount, "EccErrInjCount", HEX,
Help "Number of transactions between ECC error injection"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig, "Frequency Limit for 2DPC Mixed or non-POR Config", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto (default), otherwise a frequency in MT/s"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMask, "First Dimm BitMask", HEX,
Help "Defines which DIMM should be populated first on a 2DPC board. Bit0: MC0 DIMM0, Bit1: MC0 DIMM1, Bit2: MC1 DIMM0, Bit3: MC1 DIMM1. For each MC, the first DIMM to be populated should be set to '1'"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIA, "SAGV Switch Factor IA DDR BW", DEC,
Help "SAGV Switch Factor IA DDR BW: IA DDR load percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorGT, "SAGV Switch Factor GT DDR BW", DEC,
Help "SAGV Switch Factor GT DDR BW: GT DDR load percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorIO, "SAGV Switch Factor IO DDR BW", DEC,
Help "SAGV Switch Factor IO DDR BW: IO DDR load percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvSwitchFactorStall, "SAGV Switch Factor IA and GT Stall", DEC,
Help "SAGV Switch Factor IA and GT Stall: IA and GT percentage when system switch to high SAGV point from 1 to 50%."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsDownControl, "Threshold For Switch Down", DEC,
Help "SAGV heuristics down control: Duration in ms of low activity after which SAGV will switch down, from 1 to 50ms."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_SagvHeuristicsUpControl, "Threshold For Switch Up", DEC,
Help "SAGV heuristics up control: Duration in ms of low activity after which SAGV will switch up, from 1 to 50ms."
"Valid range: 1 ~ 50"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB, "Frequency Limit for Mixed 2DPC DDR5 1 Rank 8GB and 8GB", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_16GB, "Frequency Limit for Mixed 2DPC DDR5 1 Rank 16GB and 16GB", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_1R1R_8GB_16GB, "Frequency Limit for Mixed 2DPC DDR5 1 Rank 8GB and 16GB", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_FreqLimitMixedConfig_2R2R, "Frequency Limit for Mixed 2DPC DDR5 2 Rank", DEC,
Help "Frequency Limit for 2DPC Mixed or non-POR Config. 0: Auto, otherwise a frequency in MT/s, default is 2000"
"Valid range: 0 ~ 10000"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCm, "DMI Hw Eq Gen3 CoeffList Cm", HEX,
Help "PCH_DMI_EQ_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchDmiHwEqGen3CoeffListCp, "DMI Hw Eq Gen3 CoeffList Cp", HEX,
Help "PCH_DMI_EQ_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LctCmdEyeWidth, " LCT Command eyewidth", DEC,
Help " LCT Command eyewidth. 0: Auto, otherwise eyewidth , default is 96"
"Valid range: 0 ~ 256"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThrtCkeMinTmrLpddr, "For LPDDR Only: Throttler CKEMin Timer", HEX,
Help "For LPDDR Only: Timer value for CKEMin, range[255;0]. Reqd min of SC_ROUND_T + BYTE_LENGTH (4). Dfault is 0x00"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FirstDimmBitMaskEcc, "First ECC Dimm BitMask", HEX,
Help "Defines which ECC DIMM should be populated first on a 2DPC board. Bit0: MC0 DIMM0, Bit1: MC0 DIMM1, Bit2: MC1 DIMM0, Bit3: MC1 DIMM1. For each MC, the first DIMM to be populated should be set to '1'"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_Lp5BankMode, " LP5 Bank Mode", &gPlatformFspPkgTokenSpaceGuid_Lp5BankMode,
Help " LP5 Bank Mode. 0: Auto, 1: 8 Bank Mode, 2: 16 Bank Mode, 3: BG Mode, default is 0"
Combo $gPlatformFspPkgTokenSpaceGuid_WRDS, "Write DS Training", &EN_DIS,
Help "Enable/Disable Write DS Training"
Combo $gPlatformFspPkgTokenSpaceGuid_OverloadSAM, "SAM Overlaoding", &EN_DIS,
Help "Enable: copy the sagv frequency point. Disable: not copy."
EndPage
Page "CPU (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode, "CPU Trace Hub Mode", &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMode,
Help "Select 'Host Debugger' if Trace Hub is used with host debugger tool or 'Target Debugger' if Trace Hub is used by target debugger software or 'Disable' trace hub functionality."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size, "CPU Trace Hub Memory Region 0", &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg0Size,
Help "CPU Trace Hub Memory Region 0, The avaliable memory size is : 0MB, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size, "CPU Trace Hub Memory Region 1", &gPlatformFspPkgTokenSpaceGuid_CpuTraceHubMemReg1Size,
Help "CPU Trace Hub Memory Region 1. The avaliable memory size is : 0MB, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_BistOnReset, "BIST on Reset", &EN_DIS,
Help "Enable or Disable BIST on Reset; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipStopPbet, "Skip Stop PBET Timer Enable/Disable", &EN_DIS,
Help "Skip Stop PBET Timer; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableC6Dram, "C6DRAM power gating feature", &EN_DIS,
Help "This policy indicates whether or not BIOS should allocate PRMRR memory for C6DRAM power gating feature.- 0: Don't allocate any PRMRR memory for C6DRAM power gating feature.- <b>1: Allocate PRMRR memory for C6DRAM power gating feature</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_OcSupport, "Over clocking support", &EN_DIS,
Help "Over clocking support; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_OcLock, "Over clocking Lock", &EN_DIS,
Help "Over clocking Lock Enable/Disable; 0: Disable; <b>1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreMaxOcRatio, "Maximum Core Turbo Ratio Override", HEX,
Help "Maximum core turbo ratio override allows to increase CPU core frequency beyond the fused max turbo ratio limit. <b>0: Hardware defaults.</b> Range: 0-85"
"Valid range: 0x00 ~ 0x53"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVoltageMode, "Core voltage mode", &EN_DIS,
Help "Core voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_RingMaxOcRatio, "Maximum clr turbo ratio override", HEX,
Help "Maximum clr turbo ratio override allows to increase CPU clr frequency beyond the fused max turbo ratio limit. <b>0: Hardware defaults.</b> Range: 0-85"
"Valid range: 0x00 ~ 0x53"
Combo $gPlatformFspPkgTokenSpaceGuid_HyperThreading, "Hyper Threading Enable/Disable", &EN_DIS,
Help "Enable or Disable Hyper Threading; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuRatioOverride, "Enable or Disable CPU Ratio Override", &EN_DIS,
Help "Enable or Disable CPU Ratio Override; <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuRatio, "CPU ratio value", HEX,
Help "CPU ratio value. Valid Range 0 to 63"
"Valid range: 0x00 ~ 0x3F"
Combo $gPlatformFspPkgTokenSpaceGuid_BootFrequency, "Boot frequency", &gPlatformFspPkgTokenSpaceGuid_BootFrequency,
Help "Sets the boot frequency starting from reset vector.- 0: Maximum battery performance. 1: Maximum non-turbo performance. <b>2: Turbo performance </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount, "Number of active big cores", &gPlatformFspPkgTokenSpaceGuid_ActiveCoreCount,
Help "Number of active big cores(Depends on Number of big cores). Default 0xFF means to active all system supported big cores. <b>0xFF: Active all big cores</b>; 0: Disable all big cores; 1: 1; 2: 2; 3: 3;"
Combo $gPlatformFspPkgTokenSpaceGuid_FClkFrequency, "Processor Early Power On Configuration FCLK setting", &gPlatformFspPkgTokenSpaceGuid_FClkFrequency,
Help " <b>0: 800 MHz (ULT/ULX)</b>. <b>1: 1 GHz (DT/Halo)</b>. Not supported on ULT/ULX.- 2: 400 MHz. - 3: Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable, "Set JTAG power in C10 and deeper power states", &gPlatformFspPkgTokenSpaceGuid_JtagC10PowerGateDisable,
Help "False: JTAG is power gated in C10 state. True: keeps the JTAG power up during C10 and deeper power states for debug purpose. <b>0: False</b>; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_VmxEnable, "Enable or Disable VMX", &EN_DIS,
Help "Enable or Disable VMX; 0: Disable; <b>1: Enable</b>."
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx2RatioOffset, "AVX2 Ratio Offset", HEX,
Help "0(Default)= No Offset. Range 0 - 31. Specifies number of bins to decrease AVX ratio vs. Core Ratio. Uses Mailbox MSR 0x150, cmd 0x1B."
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx3RatioOffset, "AVX3 Ratio Offset", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0x1F"
Combo $gPlatformFspPkgTokenSpaceGuid_BclkAdaptiveVoltage, "BCLK Adaptive Voltage Enable", &EN_DIS,
Help "When enabled, the CPU V/F curves are aware of BCLK frequency when calculated. </b>0: Disable;<b> 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVoltageOverride, "core voltage override", HEX,
Help "The core voltage override which is applied to the entire range of cpu core frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVoltageAdaptive, "Core Turbo voltage Adaptive", HEX,
Help "Extra Turbo voltage applied to the cpu core when the cpu is operating in turbo mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVoltageOffset, "Core Turbo voltage Offset", HEX,
Help "The voltage offset applied to the core while operating in turbo mode.Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_CorePllVoltageOffset, "Core PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomPllVoltageOffset, "Atom Core PLL voltage offset", HEX,
Help "Atom Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_RingDownBin, "Ring Downbin", &EN_DIS,
Help "Ring Downbin enable/disable. When enabled, CPU will ensure the ring ratio is always lower than the core ratio.0: Disable; <b>1: Enable.</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_RingVoltageMode, "Ring voltage mode", &EN_DIS,
Help "Ring voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_TjMaxOffset, "TjMax Offset", HEX,
Help "TjMax offset.Specified value here is clipped by pCode (125 - TjMax Offset) to support TjMax in the range of 62 to 115 deg Celsius. Valid Range 10 - 63"
"Valid range: 0x0A ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVoltageOverride, "Ring voltage override", HEX,
Help "The ring voltage override which is applied to the entire range of cpu ring frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVoltageAdaptive, "Ring Turbo voltage Adaptive", HEX,
Help "Extra Turbo voltage applied to the cpu ring when the cpu is operating in turbo mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVoltageOffset, "Ring Turbo voltage Offset", HEX,
Help "The voltage offset applied to the ring while operating in turbo mode. Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
Combo $gPlatformFspPkgTokenSpaceGuid_TmeEnable, "Enable or Disable TME", &EN_DIS,
Help "Enable or Disable TME; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable, "Enable CPU CrashLog", &EN_DIS,
Help "Enable or Disable CPU CrashLog; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable, "CPU Run Control", &gPlatformFspPkgTokenSpaceGuid_DebugInterfaceEnable,
Help "Enable, Disable or Do not configure CPU Run Control; 0: Disable; 1: Enable ; <b>2: No Change</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DebugInterfaceLockEnable, "CPU Run Control Lock", &EN_DIS,
Help "Lock or Unlock CPU Run Control; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageMode, "Atom L2 voltage mode", &EN_DIS,
Help "Atom L2 voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOverride, "Atom L2 Voltage Override", HEX,
Help "The atom L2 voltage override which is applied to the entire range of atom L2 frequencies. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageAdaptive, "Atom L2 Turbo voltage Adaptive", HEX,
Help "Extra Turbo voltage applied to the atom L2 when the atom L2 is operating in turbo mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomL2VoltageOffset, "Atom L2 Turbo voltage Offset", HEX,
Help "The voltage offset applied to the atom while operating in turbo mode.Valid Range 0 to 1000"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffset, "Per-Atom-Cluster VF Offset", HEX,
Help "Array used to specifies the selected Atom Core Cluster Offset Voltage. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerAtomClusterVoltageOffsetPrefix, "Per-Atom-Cluster VF Offset Prefix", HEX,
Help "Sets the PerAtomClusterVoltageOffset value as positive or negative for the selected Core; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_IaCepEnable, "Enable IA CEP", &EN_DIS,
Help "Control for enabling/disabling IA CEP (Current Excursion Protection)). <b>1: Enable</b>; 0: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_GtCepEnable, "Enable GT CEP", &EN_DIS,
Help "Control for enabling/disabling GT CEP (Current Excursion Protection)). <b>1: Enable</b>; 0: Disable"
Combo $gPlatformFspPkgTokenSpaceGuid_DlvrBypassModeEnable, "Enable CPU DLVR bypass mode support", &EN_DIS,
Help "Control for enabling/disabling CPU DLVR bypass mode). <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount, "Number of active small cores", &gPlatformFspPkgTokenSpaceGuid_ActiveSmallCoreCount,
Help "Number of active small cores(Depends on Number of small cores). Default 0xFF means to active all system supported small cores. <b>0xFF: Active all small cores</b>; 0: Disable all small cores; 1: 1; 2: 2; 3: 3;"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode, "Core VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetMode,
Help "Selects Core Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffset, "Core VF Point Offset", HEX,
Help "Array used to specifies the Core Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix, "Core VF Point Offset Prefix", &gPlatformFspPkgTokenSpaceGuid_CoreVfPointOffsetPrefix,
Help "Sets the CoreVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVfPointRatio, "Core VF Point Ratio", HEX,
Help "Array for the each selected Core VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CoreVfPointCount, "Core VF Point Count", HEX,
Help "Number of supported Core Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope, "Core VF Configuration Scope", &gPlatformFspPkgTokenSpaceGuid_CoreVfConfigScope,
Help "Alows both all-core VF curve or per-core VF curve configuration; <b>0: All-core</b>; 1: Per-core."
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffset, "Per-core VF Offset", HEX,
Help "Array used to specifies the selected Core Offset Voltage. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreVoltageOffsetPrefix, "Per-core VF Offset Prefix", HEX,
Help "Sets the PerCoreVoltageOffset value as positive or negative for the selected Core; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PerCoreRatioOverride, "Per Core Max Ratio override", &EN_DIS,
Help "Enable or disable Per Core PState OC supported by writing OCMB 0x1D to program new favored core ratio to each Core. <b>0: Disable</b>, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreRatio, "Per Core Current Max Ratio", HEX,
Help "Array for the Per Core Max Ratio"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomClusterRatio, "Atom Cluster Max Ratio", HEX,
Help "Array for Atom Cluster Max Ratio, 4 ATOM cores are in the same Cluster and their max core ratio will be aligned."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CoreRatioExtensionMode, "Core Ratio Extension Mode", &EN_DIS,
Help "Enable or disable Core Ratio above 85 Extension Mode by writing BIOS MB 0x37 to enable FULL_RANGE_MULTIPLIER_UNLOCK_EN. <b>0: Disable</b>, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PvdRatioThreshold, "Pvd Ratio Threshold", HEX,
Help "Select PVD Ratio Threshold Value from Range 1 to 40. 0 - Auto/Default."
"Valid range: 0x0 ~ 0x28"
Combo $gPlatformFspPkgTokenSpaceGuid_UnlimitedIccMax, "Support Unlimited ICCMAX", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_CrashLogGprs, "Enable CPU CrashLog GPRs dump", &gPlatformFspPkgTokenSpaceGuid_CrashLogGprs,
Help "Enable or Disable CPU CrashLog GPRs dump; <b>0: Disable</b>; 1: Enable; 2: Only disable Smm GPRs dump"
Combo $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode, "Ring VF Point Offset Mode", &gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetMode,
Help "Selects Ring Voltage & Frequency Offset mode between Legacy and Selection modes. In Legacy Mode, setting a global offset for the entire VF curve. In Selection Mode, setting a selected VF point; <b>0: Legacy</b>; 1: Selection."
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffset, "Ring VF Point Offset", HEX,
Help "Array used to specifies the Ring Voltage Offset applied to the each selected VF Point. This voltage is specified in millivolts."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointOffsetPrefix, "Ring VF Point Offset Prefix", HEX,
Help "Sets the RingVfPointOffset value as positive or negative for corresponding core VF Point; <b>0: Positive </b>; 1: Negative."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointRatio, "Ring VF Point Ratio", HEX,
Help "Array for the each selected Ring VF Point to display the ration."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingVfPointCount, "Ring VF Point Count", HEX,
Help "Number of supported Ring Voltage & Frequency Point Offset"
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_BclkSource, "BCLK Frequency Source", &gPlatformFspPkgTokenSpaceGuid_BclkSource,
Help "Clock source of BCLK OC frequency, <b>1:CPU BCLK</b>, 2:PCH BCLK, 3:External CLK"
EditNum $gPlatformFspPkgTokenSpaceGuid_GpioOverride, "GPIO Override", HEX,
Help "Gpio Override Level - FSP will not configure any GPIOs and rely on GPIO setings before moved to FSP. Available configurations 0: Disable; 1: Level 1 - Skips GPIO configuration in PEI/FSPM/FSPT phase;2: Level 2 - Reserved for future use"
"Valid range: 0x00 ~ 0x7"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuBclkOcFrequency, "CPU BCLK OC Frequency", HEX,
Help "CPU BCLK OC Frequency in 10KHz units increasing. Value 9800 (10KHz) = 98MHz <b>0 - Auto</b>. Range is 8000-50000 (10KHz)."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DisablePerCoreMask, "Bitmask of disable cores", HEX,
Help "Core mask is a bitwise indication of which core should be disabled. <b>0x00=Default</b>; Bit 0 - core 0, bit 7 - core 7."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DisablePerAtomMask, "Bitmask of disable atoms", HEX,
Help "DEPRECATED"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride, "Sa PLL Frequency", &gPlatformFspPkgTokenSpaceGuid_SaPllFreqOverride,
Help "Configure Sa PLL Frequency. <b>0: 3200MHz </b>, 1: 1600MHz"
EndPage
Page "CPU (Post-Mem)"
EditNum $gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionBase, "MicrocodeRegionBase", HEX,
Help "Memory Base of Microcode Updates"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MicrocodeRegionSize, "MicrocodeRegionSize", HEX,
Help "Size of Microcode Updates"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TurboMode, "Turbo Mode", &EN_DIS,
Help "Enable/Disable Turbo mode. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_AesEnable, "Advanced Encryption Standard (AES) feature", &EN_DIS,
Help "Enable or Disable Advanced Encryption Standard (AES) feature; </b>0: Disable; <b>1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi3Enable, "Power State 3 enable/disable", HEX,
Help "PCODE MMIO Mailbox: Power State 3 enable/disable; 0: Disable; <b>1: Enable</b>. For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi4Enable, "Power State 4 enable/disable", HEX,
Help "PCODE MMIO Mailbox: Power State 4 enable/disable; 0: Disable; <b>1: Enable</b>.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ImonSlope, "Imon slope correction", HEX,
Help "PCODE MMIO Mailbox: Imon slope correction. Specified in 1/100 increment values. Range is 0-200. 125 = 1.25. <b>0: Auto</b>.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ImonOffset, "Imon offset correction", HEX,
Help "PCODE MMIO Mailbox: Imon offset correction. Value is a 2's complement signed integer. Units 1/1000, Range 0-63999. For an offset = 12.580, use 12580. <b>0: Auto</b>"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrConfigEnable, "Enable/Disable BIOS configuration of VR", HEX,
Help "Enable/Disable BIOS configuration of VR; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcEnable, "Thermal Design Current enable/disable", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current enable/disable; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcTimeWindow, "Thermal Design Current time window", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current time window. Defined in milli seconds. Range 1ms to 448s"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcLock, "Thermal Design Current Lock", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current Lock; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysSlope, "Platform Psys slope correction", HEX,
Help "PCODE MMIO Mailbox: Platform Psys slope correction. <b>0 - Auto</b> Specified in 1/100 increment values. Range is 0-200. 125 = 1.25"
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysOffset, "Platform Psys offset correction", HEX,
Help "PCODE MMIO Mailbox: Platform Psys offset correction. <b>0 - Auto</b> Units 1/1000, Range 0-63999. For an offset of 25.348, enter 25348."
"Valid range: 0x0000 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_AcousticNoiseMitigation, "Acoustic Noise Mitigation feature", &EN_DIS,
Help "Enable or Disable Acoustic Noise Mitigation feature. <b>0: Disabled</b>; 1: Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_FastPkgCRampDisable, "Disable Fast Slew Rate for Deep Package C States for VR domains", &EN_DIS,
Help "Disable Fast Slew Rate for Deep Package C States based on Acoustic Noise Mitigation feature enabled. <b>0: False</b>; 1: True"
Combo $gPlatformFspPkgTokenSpaceGuid_SlowSlewRate, "Slew Rate configuration for Deep Package C States for VR domains", &gPlatformFspPkgTokenSpaceGuid_SlowSlewRate,
Help "Slew Rate configuration for Deep Package C States for VR domains based on Acoustic Noise Mitigation feature enabled. ADL supports VCCIA FAST/2/4/8/16, VCCGT FAST/2/4/8 and VCCSA FAST/2 <b>0: Fast/2</b>; 1: Fast/4; 2: Fast/8; 3: Fast/16"
EditNum $gPlatformFspPkgTokenSpaceGuid_TdcCurrentLimit, "Thermal Design Current current limit", HEX,
Help "PCODE MMIO Mailbox: Thermal Design Current current limit. Specified in 1/8A units. Range is 0-4095. 1000 = 125A. <b>0: Auto</b>. For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AcLoadline, "AcLoadline", HEX,
Help "PCODE MMIO Mailbox: AcLoadline in 1/100 mOhms (ie. 1250 = 12.50 mOhm); Range is 0-6249. <b>Intel Recommended Defaults vary by domain and SKU."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_DcLoadline, "DcLoadline", HEX,
Help "PCODE MMIO Mailbox: DcLoadline in 1/100 mOhms (ie. 1250 = 12.50 mOhm); Range is 0-6249.<b>Intel Recommended Defaults vary by domain and SKU.</b>"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi1Threshold, "Power State 1 Threshold current", HEX,
Help "PCODE MMIO Mailbox: Power State 1 current cuttof in 1/4 Amp increments. Range is 0-128A."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi2Threshold, "Power State 2 Threshold current", HEX,
Help "PCODE MMIO Mailbox: Power State 2 current cuttof in 1/4 Amp increments. Range is 0-128A."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Psi3Threshold, "Power State 3 Threshold current", HEX,
Help "PCODE MMIO Mailbox: Power State 3 current cuttof in 1/4 Amp increments. Range is 0-128A."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IccMax, "Icc Max limit", HEX,
Help "PCODE MMIO Mailbox: VR Icc Max limit. 0-512A in 1/4 A units. 400 = 100A"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TxtEnable, "Enable or Disable TXT", &EN_DIS,
Help "Enable or Disable TXT; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipMpInit, "Skip Multi-Processor Initialization", &EN_DIS,
Help "When this is skipped, boot loader must initialize processors before SilicionInit API. </b>0: Initialize; <b>1: Skip"
EditNum $gPlatformFspPkgTokenSpaceGuid_FivrRfiFrequency, "FIVR RFI Frequency", HEX,
Help "PCODE MMIO Mailbox: Set the desired RFI frequency, in increments of 100KHz. <b>0: Auto</b>. Range varies based on XTAL clock: 0-1918 (Up to 191.8HMz) for 24MHz clock; 0-1535 (Up to 153.5MHz) for 19MHz clock."
"Valid range: 0x0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FivrSpreadSpectrum, "FIVR RFI Spread Spectrum", HEX,
Help "Set the Spread Spectrum Range. <b>1.5%</b>; Range: 0.5%, 1%, 1.5%, 2%, 3%, 4%, 5%, 6%. Each Range is translated to an encoded value for FIVR register. 0.5% = 0, 1% = 3, 1.5% = 8, 2% = 18, 3% = 28, 4% = 34, 5% = 39, 6% = 44."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuBistData, "CpuBistData", HEX,
Help "Pointer CPU BIST Data"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuMpPpi, "CpuMpPpi", HEX,
Help "<b>Optional</b> pointer to the boot loader's implementation of EFI_PEI_MP_SERVICES_PPI. If not NULL, FSP will use the boot loader's implementation of multiprocessing. See section 5.1.4 of the FSP Integration Guide for more details."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PreWake, "Pre Wake Randomization time", HEX,
Help "PCODE MMIO Mailbox: Acoustic Noise Mitigation Range.Defines the maximum pre-wake randomization time in micro ticks.This can be programmed only if AcousticNoiseMitigation is enabled. Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RampUp, "Ramp Up Randomization time", HEX,
Help "PCODE MMIO Mailbox: Acoustic Noise Mitigation Range.Defines the maximum Ramp Up randomization time in micro ticks.This can be programmed only if AcousticNoiseMitigation is enabled.Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RampDown, "Ramp Down Randomization time", HEX,
Help "PCODE MMIO Mailbox: Acoustic Noise Mitigation Range.Defines the maximum Ramp Down randomization time in micro ticks.This can be programmed only if AcousticNoiseMitigation is enabled.Range 0-255 <b>0</b>."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrVoltageLimit, "VR Voltage Limit", HEX,
Help "PCODE MMIO Mailbox: Voltage Limit. Range is 0 - 7999mV"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInAuxImonIccImax, "VccIn Aux Imon IccMax", HEX,
Help "PCODE MMIO Mailbox: VccIn Aux Imon IccMax. <b>0 - Auto</b> Values are in 1/4 Amp increments. Range is 0-512."
"Valid range: 0x0000 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EnableVsysCritical, "Vsys Critical", HEX,
Help "PCODE MMIO Mailbox: Vsys Critical. <b>0: Disable</b>; 1: Enable Range is 0-255."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysFullScale, "Vsys Full Scale", HEX,
Help "Vsys Full Scale, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysCriticalThreshold, "Vsys Critical Threshold", HEX,
Help "Vsys Critical Threshold, Range is 0-255 "
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchMantissa, "Assertion Deglitch Mantissa", HEX,
Help "Assertion Deglitch Mantissa, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysAssertionDeglitchExponent, "Assertion Deglitch Exponent", HEX,
Help "Assertion Deglitch Exponent, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchMantissa, "De assertion Deglitch Mantissa", HEX,
Help "De assertion Deglitch Mantissa, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VsysDeassertionDeglitchExponent, "De assertion Deglitch Exponent", HEX,
Help "De assertion Deglitch Exponent, Range is 0-255"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInAuxImonSlope, "VccIn Aux Imon slope correction", HEX,
Help "PCODE MMIO Mailbox: VccIn Aux Imon slope correction. <b>0 - Auto</b> Specified in 1/100 increment values. Range is 0-200. 125 = 1.25"
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_VccInAuxImonOffset, "VccIn Aux Imon offset correction", HEX,
Help "PCODE MMIO Mailbox: VccIn Aux Imon offset correction. <b>0 - Auto</b> Units 1/1000, Range 0-63999. For an offset of 25.348, enter 25348."
"Valid range: 0x0000 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FivrSpectrumEnable, "FIVR RFI Spread Spectrum Enable or disable", HEX,
Help "Enable or Disable FIVR RFI Spread Spectrum. 0: Disable ; <b> 1: Enable </b>"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IccLimit, "VR Fast Vmode ICC Limit support", HEX,
Help "PCODE MMIO Mailbox: VR Fast Vmode ICC Limit support. 0-255A in 1/4 A units. 400 = 100A"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PpinSupport, "PpinSupport to view Protected Processor Inventory Number", &gPlatformFspPkgTokenSpaceGuid_PpinSupport,
Help "Enable or Disable or Auto (Based on End of Manufacturing flag. Disabled if this flag is set) for PPIN Support"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableMinVoltageOverride, "Enable or Disable Minimum Voltage Override", &EN_DIS,
Help "Enable or disable Minimum Voltage overrides ; <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_MinVoltageRuntime, "Min Voltage for Runtime ", HEX,
Help "PCODE MMIO Mailbox: Minimum voltage for runtime. Valid if EnableMinVoltageOverride = 1. Range 0 to 1999mV. <b> 0: 0mV </b>"
"Valid range: 0x00 ~ 0x7CF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MinVoltageC8, "Min Voltage for C8 ", HEX,
Help "PCODE MMIO Mailbox: Minimum voltage for C8. Valid if EnableMinVoltageOverride = 1. Range 0 to 1999mV. <b> 0: 0mV </b>"
"Valid range: 0x00 ~ 0x7CF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SmbiosType4MaxSpeedOverride, "Smbios Type4 Max Speed Override", HEX,
Help "Provide the option for platform to override the MaxSpeed field of Smbios Type 4. If this value is not zero, it dominates the field."
"Valid range: 0x0000 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Irms, "Current root mean square", HEX,
Help "PCODE MMIO Mailbox: Current root mean square; <b>0: Disable</b>; 1: Enable.For all VR Indexes"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_AvxDisable, "AvxDisable", &gPlatformFspPkgTokenSpaceGuid_AvxDisable,
Help "Enable or Disable AVX Support. This only applicable when all small core is disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_Avx3Disable, "Avx3Disable", &gPlatformFspPkgTokenSpaceGuid_Avx3Disable,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_X2ApicSupport, "X2ApicSupport", &EN_DIS,
Help "Enable or Disable X2APIC Support"
EditNum $gPlatformFspPkgTokenSpaceGuid_VrPowerDeliveryDesign, "CPU VR Power Delivery Design", HEX,
Help "Used to communicate the power delivery design capability of the board. This value is an enum of the available power delivery segments that are defined in the Platform Design Guide."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableFastVmode, "Enable/Disable VR FastVmode. The VR will initiate reactive protection if Fast Vmode is enabled.", &gPlatformFspPkgTokenSpaceGuid_EnableFastVmode,
Help "Enable/Disable VR FastVmode; <b>0: Disable</b>; 1: Enable.For all VR by domain"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemProduction, "ReservedCpuPostMemProduction", &EN_DIS,
Help "Reserved for CPU Post-Mem Production"
EditNum $gPlatformFspPkgTokenSpaceGuid_BgpdtHash, "BgpdtHash[4]", HEX,
Help "BgpdtHash values"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosGuardAttr, "BiosGuardAttr", HEX,
Help "BiosGuardAttr default values"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosGuardModulePtr, "BiosGuardModulePtr", HEX,
Help "BiosGuardModulePtr default values"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableRsr, "RSR feature", &EN_DIS,
Help "Enable or Disable RSR feature; 0: Disable; <b>1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem1, "ReservedCpuPostMem1", &EN_DIS,
Help "Reserved for CPU Post-Mem 1"
Combo $gPlatformFspPkgTokenSpaceGuid_Hwp, "Enable or Disable HWP", &EN_DIS,
Help "Enable or Disable HWP(Hardware P states) Support. 0: Disable; <b>1: Enable;</b> 2-3:Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_HdcControl, "Hardware Duty Cycle Control", &EN_DIS,
Help "Hardware Duty Cycle Control configuration. 0: Disabled; <b>1: Enabled</b> 2-3:Reserved"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit1Time, "Package Long duration turbo mode time", HEX,
Help "Package Long duration turbo mode time window in seconds. Valid values(Unit in seconds) 0 to 8 , 10 , 12 ,14 , 16 , 20 , 24 , 28 , 32 , 40 , 48 , 56 , 64 , 80 , 96 , 112 , 128"
"Valid range: 0x00 ~ 0x80"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit2, "Short Duration Turbo Mode", &EN_DIS,
Help "Enable or Disable short duration Turbo Mode. </b>0 : Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_TurboPowerLimitLock, "Turbo settings Lock", &EN_DIS,
Help "Lock all Turbo settings Enable/Disable; <b>0: Disable , </b> 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3Time, "Package PL3 time window", HEX,
Help "Package PL3 time window range for this policy from 0 to 64ms"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3DutyCycle, "Package PL3 Duty Cycle", HEX,
Help "Package PL3 Duty Cycle; Valid Range is 0 to 100"
"Valid range: 0x00 ~ 0x64"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit3Lock, "Package PL3 Lock", &EN_DIS,
Help "Package PL3 Lock Enable/Disable; <b>0: Disable</b> ; 1:Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PowerLimit4Lock, "Package PL4 Lock", &EN_DIS,
Help "Package PL4 Lock Enable/Disable; <b>0: Disable</b> ; 1:Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_TccActivationOffset, "TCC Activation Offset", HEX,
Help "TCC Activation Offset. Offset from factory set TCC activation temperature at which the Thermal Control Circuit must be activated. TCC will be activated at TCC Activation Temperature, in volts.For SKL Y SKU, the recommended default for this policy is <b>10</b>, For all other SKUs the recommended default are <b>0</b>"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TccOffsetClamp, "Tcc Offset Clamp Enable/Disable", &EN_DIS,
Help "Tcc Offset Clamp for Runtime Average Temperature Limit (RATL) allows CPU to throttle below P1.For SKL Y SKU, the recommended default for this policy is <b>1: Enabled</b>, For all other SKUs the recommended default are <b>0: Disabled</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_TccOffsetLock, "Tcc Offset Lock", &EN_DIS,
Help "Tcc Offset Lock for Runtime Average Temperature Limit (RATL) to lock temperature target; <b>0: Disabled</b>; 1: Enabled."
EditNum $gPlatformFspPkgTokenSpaceGuid_NumberOfEntries, "Custom Ratio State Entries", HEX,
Help "The number of custom ratio state entries, ranges from 0 to 40 for a valid custom ratio table.Sets the number of custom P-states. At least 2 states must be present"
"Valid range: 0x00 ~ 0x28"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Short term Power Limit time window value for custom CTDP level 1. Valid Range 0 to 128"
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Turbo Activation Ratio for custom cTDP level 1. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp Control (0/1/2) value for custom cTDP level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Short term Power Limit time window value for custom CTDP level 2. Valid Range 0 to 128"
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Turbo Activation Ratio for custom cTDP level 2. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp Control (0/1/2) value for custom cTDP level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1Time, "Custom Short term Power Limit time window", HEX,
Help "Short term Power Limit time window value for custom CTDP level 3. Valid Range 0 to 128"
"Valid range: 0x00 ~ 0x80"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3TurboActivationRatio, "Custom Turbo Activation Ratio", HEX,
Help "Turbo Activation Ratio for custom cTDP level 3. Valid Range 0 to 255"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3ConfigTdpControl, "Custom Config Tdp Control", HEX,
Help "Config Tdp Control (0/1/2) value for custom cTDP level 1. Valid Range is 0 to 2"
"Valid range: 0x00 ~ 0x2"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLock, "ConfigTdp mode settings Lock", &EN_DIS,
Help "Lock the ConfigTdp mode settings from runtime changes; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ConfigTdpBios, "Load Configurable TDP SSDT", &EN_DIS,
Help "Configure whether to load Configurable TDP SSDT; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1, "PL1 Enable value", &EN_DIS,
Help "PL1 Enable value to limit average platform power. <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Time, "PL1 timewindow", HEX,
Help "PL1 timewindow in seconds.Valid values(Unit in seconds) 0 to 8 , 10 , 12 ,14 , 16 , 20 , 24 , 28 , 32 , 40 , 48 , 56 , 64 , 80 , 96 , 112 , 128"
"Valid range: 0x00 ~ 0x80"
Combo $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2, "PL2 Enable Value", &EN_DIS,
Help "PL2 Enable activates the PL2 value to limit average platform power.<b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_MlcStreamerPrefetcher, "Enable or Disable MLC Streamer Prefetcher", &EN_DIS,
Help "Enable or Disable MLC Streamer Prefetcher; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_MlcSpatialPrefetcher, "Enable or Disable MLC Spatial Prefetcher", &EN_DIS,
Help "Enable or Disable MLC Spatial Prefetcher; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_MonitorMwaitEnable, "Enable or Disable Monitor /MWAIT instructions", &EN_DIS,
Help "Enable or Disable Monitor /MWAIT instructions; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_MachineCheckEnable, "Enable or Disable initialization of machine check registers", &EN_DIS,
Help "Enable or Disable initialization of machine check registers; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ApIdleManner, "AP Idle Manner of waiting for SIPI", &gPlatformFspPkgTokenSpaceGuid_ApIdleManner,
Help "AP Idle Manner of waiting for SIPI; 1: HALT loop; <b>2: MWAIT loop</b>; 3: RUN loop."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme, "Control on Processor Trace output scheme", &gPlatformFspPkgTokenSpaceGuid_ProcessorTraceOutputScheme,
Help "Control on Processor Trace output scheme; <b>0: Single Range Output</b>; 1: ToPA Output."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceEnable, "Enable or Disable Processor Trace feature", &EN_DIS,
Help "Enable or Disable Processor Trace feature; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_Eist, "Enable or Disable Intel SpeedStep Technology", &EN_DIS,
Help "Enable or Disable Intel SpeedStep Technology. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnergyEfficientPState, "Enable or Disable Energy Efficient P-state", &EN_DIS,
Help "Enable or Disable Energy Efficient P-state will be applied in Turbo mode. Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnergyEfficientTurbo, "Enable or Disable Energy Efficient Turbo", &EN_DIS,
Help "Enable or Disable Energy Efficient Turbo, will be applied in Turbo mode. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_TStates, "Enable or Disable T states", &EN_DIS,
Help "Enable or Disable T states; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_BiProcHot, "Enable or Disable Bi-Directional PROCHOT#", &EN_DIS,
Help "Enable or Disable Bi-Directional PROCHOT#; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableProcHotOut, "Enable or Disable PROCHOT# signal being driven externally", &EN_DIS,
Help "Enable or Disable PROCHOT# signal being driven externally; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ProcHotResponse, "Enable or Disable PROCHOT# Response", &EN_DIS,
Help "Enable or Disable PROCHOT# Response; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_DisableVrThermalAlert, "Enable or Disable VR Thermal Alert", &EN_DIS,
Help "Enable or Disable VR Thermal Alert; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_EnableAllThermalFunctions, "Enable or Disable Thermal Reporting", &EN_DIS,
Help "Enable or Disable Thermal Reporting through ACPI tables; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_ThermalMonitor, "Enable or Disable Thermal Monitor", &EN_DIS,
Help "Enable or Disable Thermal Monitor; 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_Cx, "Enable or Disable CPU power states (C-states)", &EN_DIS,
Help "Enable or Disable CPU power states (C-states). 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PmgCstCfgCtrlLock, "Configure C-State Configuration Lock", &EN_DIS,
Help "Configure C-State Configuration Lock; 0: Disable; <b>1: Enable</b>."
Combo $gPlatformFspPkgTokenSpaceGuid_C1e, "Enable or Disable Enhanced C-states", &EN_DIS,
Help "Enable or Disable Enhanced C-states. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PkgCStateDemotion, "Enable or Disable Package Cstate Demotion", &EN_DIS,
Help "Enable or Disable Package Cstate Demotion. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PkgCStateUnDemotion, "Enable or Disable Package Cstate UnDemotion", &EN_DIS,
Help "Enable or Disable Package Cstate UnDemotion. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_CStatePreWake, "Enable or Disable CState-Pre wake", &EN_DIS,
Help "Enable or Disable CState-Pre wake. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_TimedMwait, "Enable or Disable TimedMwait Support.", &EN_DIS,
Help "Enable or Disable TimedMwait Support. <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_CstCfgCtrIoMwaitRedirection, "Enable or Disable IO to MWAIT redirection", &EN_DIS,
Help "Enable or Disable IO to MWAIT redirection; <b>0: Disable</b>; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PkgCStateLimit, "Set the Max Pkg Cstate", HEX,
Help "Set the Max Pkg Cstate. Default set to Auto which limits the Max Pkg Cstate to deep C-state. Valid values 0 - C0/C1 , 1 - C2 , 2 - C3 , 3 - C6 , 4 - C7 , 5 - C7S , 6 - C8 , 7 - C9 , 8 - C10 , 254 - CPU Default , 255 - Auto"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl0TimeUnit, "TimeUnit for C-State Latency Control0", HEX,
Help "TimeUnit for C-State Latency Control0; Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1TimeUnit, "TimeUnit for C-State Latency Control1", HEX,
Help "TimeUnit for C-State Latency Control1;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2TimeUnit, "TimeUnit for C-State Latency Control2", HEX,
Help "TimeUnit for C-State Latency Control2;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3TimeUnit, "TimeUnit for C-State Latency Control3", HEX,
Help "TimeUnit for C-State Latency Control3;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4TimeUnit, "TimeUnit for C-State Latency Control4", HEX,
Help "Time - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5TimeUnit, "TimeUnit for C-State Latency Control5", HEX,
Help "TimeUnit for C-State Latency Control5;Valid values 0 - 1ns , 1 - 32ns , 2 - 1024ns , 3 - 32768ns , 4 - 1048576ns , 5 - 33554432ns"
"Valid range: 0x00 ~ 0x5"
EditNum $gPlatformFspPkgTokenSpaceGuid_PpmIrmSetting, "Interrupt Redirection Mode Select", HEX,
Help "Interrupt Redirection Mode Select.0: Fixed priority; 1: Round robin;2: Hash vector;7: No change."
"Valid range: 0x00 ~ 0x7"
Combo $gPlatformFspPkgTokenSpaceGuid_ProcHotLock, "Lock prochot configuration", &EN_DIS,
Help "Lock prochot configuration Enable/Disable; 0: Disable;<b> 1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_ConfigTdpLevel, "Configuration for boot TDP selection", HEX,
Help "Deprecated. Move to premem."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_MaxRatio, "Max P-State Ratio", HEX,
Help "Max P-State Ratio, Valid Range 0 to 0x7F"
"Valid range: 0x00 ~ 0x7F"
EditNum $gPlatformFspPkgTokenSpaceGuid_StateRatio, "P-state ratios for custom P-state table", HEX,
Help "P-state ratios for custom P-state table. NumberOfEntries has valid range between 0 to 40. For no. of P-States supported(NumberOfEntries) , StateRatio[NumberOfEntries] are configurable. Valid Range of each entry is 0 to 0x7F"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_StateRatioMax16, "P-state ratios for max 16 version of custom P-state table", HEX,
Help "P-state ratios for max 16 version of custom P-state table. This table is used for OS versions limited to a max of 16 P-States. If the first entry of this table is 0, or if Number of Entries is 16 or less, then this table will be ignored, and up to the top 16 values of the StateRatio table will be used instead. Valid Range of each entry is 0 to 0x7F"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPmax, "Platform Power Pmax", HEX,
Help "PCODE MMIO Mailbox: Platform Power Pmax. <b>0 - Auto</b> Specified in 1/8 Watt increments. Range 0-1024 Watts. Value of 800 = 100W"
"Valid range: 0x00 ~ 0x400"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl1Irtl, "Interrupt Response Time Limit of C-State LatencyContol1", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol1.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl2Irtl, "Interrupt Response Time Limit of C-State LatencyContol2", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol2.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl3Irtl, "Interrupt Response Time Limit of C-State LatencyContol3", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol3.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl4Irtl, "Interrupt Response Time Limit of C-State LatencyContol4", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol4.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CstateLatencyControl5Irtl, "Interrupt Response Time Limit of C-State LatencyContol5", HEX,
Help "Interrupt Response Time Limit of C-State LatencyContol5.Range of value 0 to 0x3FF. 0 is Auto."
"Valid range: 0x00 ~ 0x3FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit1, "Package Long duration turbo mode power limit", HEX,
Help "Package Long duration turbo mode power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit. Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit2Power, "Package Short duration turbo mode power limit", HEX,
Help "Package Short duration turbo mode power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit3, "Package PL3 power limit", HEX,
Help "Package PL3 power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PowerLimit4, "Package PL4 power limit", HEX,
Help "Package PL4 power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_TccOffsetTimeWindowForRatl, "Tcc Offset Time Window for RATL", HEX,
Help "Package PL4 power limit. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit1, "Short term Power Limit value for custom cTDP level 1", HEX,
Help "Short term Power Limit value for custom cTDP level 1. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom1PowerLimit2, "Long term Power Limit value for custom cTDP level 1", HEX,
Help "Long term Power Limit value for custom cTDP level 1. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit1, "Short term Power Limit value for custom cTDP level 2", HEX,
Help "Short term Power Limit value for custom cTDP level 2. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom2PowerLimit2, "Long term Power Limit value for custom cTDP level 2", HEX,
Help "Long term Power Limit value for custom cTDP level 2. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit1, "Short term Power Limit value for custom cTDP level 3", HEX,
Help "Short term Power Limit value for custom cTDP level 3. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_Custom3PowerLimit2, "Long term Power Limit value for custom cTDP level 3", HEX,
Help "Long term Power Limit value for custom cTDP level 3. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit1Power, "Platform PL1 power", HEX,
Help "Platform PL1 power. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
EditNum $gPlatformFspPkgTokenSpaceGuid_PsysPowerLimit2Power, "Platform PL2 power", HEX,
Help "Platform PL2 power. Units are based on POWER_MGMT_CONFIG.CustomPowerUnit.Valid Range 0 to 4095875 in Step size of 125"
"Valid range: 0x00 ~ 0x3E7F83"
Combo $gPlatformFspPkgTokenSpaceGuid_RaceToHalt, "Race To Halt", &EN_DIS,
Help "Enable/Disable Race To Halt feature. RTH will dynamically increase CPU frequency in order to enter pkg C-State faster to reduce overall power. (RTH is controlled through MSR 1FC bit 20)Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable, "Set Three Strike Counter Disable", &gPlatformFspPkgTokenSpaceGuid_ThreeStrikeCounterDisable,
Help "False (default): Three Strike counter will be incremented and True: Prevents Three Strike counter from incrementing; <b>0: False</b>; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_HwpInterruptControl, "Set HW P-State Interrupts Enabled for for MISC_PWR_MGMT", &EN_DIS,
Help "Set HW P-State Interrupts Enabled for for MISC_PWR_MGMT; <b>0: Disable</b>; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMem2, "ReservedCpuPostMem2", &EN_DIS,
Help "Reserved for CPU Post-Mem 2"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableItbm, "Intel Turbo Boost Max Technology 3.0", &EN_DIS,
Help "Intel Turbo Boost Max Technology 3.0. 0: Disabled; <b>1: Enabled</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_C1StateAutoDemotion, "Enable or Disable C1 Cstate Demotion", &EN_DIS,
Help "Enable or Disable C1 Cstate Demotion. Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_C1StateUnDemotion, "Enable or Disable C1 Cstate UnDemotion", &EN_DIS,
Help "Enable or Disable C1 Cstate UnDemotion. Disable; <b>1: Enable</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_MinRingRatioLimit, "Minimum Ring ratio limit override", HEX,
Help "Minimum Ring ratio limit override. <b>0: Hardware defaults.</b> Range: 0 - Max turbo ratio limit"
"Valid range: 0x00 ~ 0x53"
EditNum $gPlatformFspPkgTokenSpaceGuid_MaxRingRatioLimit, "Maximum Ring ratio limit override", HEX,
Help "Maximum Ring ratio limit override. <b>0: Hardware defaults.</b> Range: 0 - Max turbo ratio limit"
"Valid range: 0x00 ~ 0x53"
Combo $gPlatformFspPkgTokenSpaceGuid_EnablePerCorePState, "Enable or Disable Per Core P State OS control", &EN_DIS,
Help "Enable or Disable Per Core P State OS control. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoPerCorePstate, "Enable or Disable HwP Autonomous Per Core P State OS control", &EN_DIS,
Help "Enable or Disable HwP Autonomous Per Core P State OS control. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableHwpAutoEppGrouping, "Enable or Disable HwP Autonomous EPP Grouping", &EN_DIS,
Help "Enable or Disable HwP Autonomous EPP Grouping. 0: Disable; <b>1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableEpbPeciOverride, "Enable or Disable EPB override over PECI", &EN_DIS,
Help "Enable or Disable EPB override over PECI. <b>0: Disable;</b> 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableFastMsrHwpReq, "Enable or Disable Fast MSR for IA32_HWP_REQUEST", &EN_DIS,
Help "Enable or Disable Fast MSR for IA32_HWP_REQUEST. 0: Disable;<b> 1: Enable</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_ApplyConfigTdp, "Enable Configurable TDP", &EN_DIS,
Help "Applies TDP initialization settings based on non-cTDP or cTDP.; 0: Applies to non-cTDP; <b>1: Applies to cTDP</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_HwpLock, "Misc Power Management MSR Lock", &EN_DIS,
Help "Lock Misc Power Management MSR. Enable/Disable; 0: Disable , <b> 1: Enable </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_DualTauBoost, "Dual Tau Boost", &EN_DIS,
Help "Enable, Disable Dual Tau Boost feature. This is only applicable for Desktop; <b>0: Disable</b>; 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedCpuPostMemTest, "ReservedCpuPostMemTest", &EN_DIS,
Help "Reserved for CPU Post-Mem Test"
EndPage
Page "System Agent (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuCrashLogDevice, "Enable/Disable CrashLog Device 10", &EN_DIS,
Help "Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog"
Combo $gPlatformFspPkgTokenSpaceGuid_X2ApicOptOut, "State of X2APIC_OPT_OUT bit in the DMAR table", &EN_DIS,
Help "0=Disable/Clear, 1=Enable/Set"
Combo $gPlatformFspPkgTokenSpaceGuid_DmaControlGuarantee, "State of DMA_CONTROL_GUARANTEE bit in the DMAR table", &EN_DIS,
Help "0=Disable/Clear, 1=Enable/Set"
EditNum $gPlatformFspPkgTokenSpaceGuid_VtdBaseAddress, "Base addresses for VT-d function MMIO access", HEX,
Help "Base addresses for VT-d MMIO access per VT-d engine"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdDisable, "Disable VT-d", &EN_DIS,
Help "0=Enable/FALSE(VT-d enabled), 1=Disable/TRUE (VT-d disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIgdEnable, "Vtd Programming for Igd", &EN_DIS,
Help "1=Enable/TRUE (Igd VT-d Bar programming enabled), 0=Disable/FLASE (Igd VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIpuEnable, "Vtd Programming for Ipu", &EN_DIS,
Help "1=Enable/TRUE (Ipu VT-d Bar programming enabled), 0=Disable/FLASE (Ipu VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdIopEnable, "Vtd Programming for Iop", &EN_DIS,
Help "1=Enable/TRUE (Iop VT-d Bar programming enabled), 0=Disable/FLASE (Iop VT-d Bar programming disabled)"
Combo $gPlatformFspPkgTokenSpaceGuid_VtdItbtEnable, "Vtd Programming for ITbt", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc, "Internal Graphics Pre-allocated Memory", &gPlatformFspPkgTokenSpaceGuid_IgdDvmt50PreAlloc,
Help "Size of memory preallocated for internal graphics."
Combo $gPlatformFspPkgTokenSpaceGuid_InternalGfx, "Internal Graphics", &EN_DIS,
Help "Enable/disable internal graphics."
Combo $gPlatformFspPkgTokenSpaceGuid_ApertureSize, "Aperture Size", &gPlatformFspPkgTokenSpaceGuid_ApertureSize,
Help "Select the Aperture Size."
EditNum $gPlatformFspPkgTokenSpaceGuid_HgDelayAfterPwrEn, "HG dGPU Power Delay", HEX,
Help "HG dGPU delay interval after power enabling: 0=Minimal, 1000=Maximum, default is 300=300 microseconds"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_HgDelayAfterHoldReset, "HG dGPU Reset Delay", HEX,
Help "HG dGPU delay interval for Reset complete: 0=Minimal, 1000=Maximum, default is 100=100 microseconds"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_MmioSizeAdjustment, "MMIO size adjustment for AUTO mode", HEX,
Help "Positive number means increasing MMIO size, Negative value means decreasing MMIO size: 0 (Default)=no change to AUTO mode MMIO size"
"Valid range: 0 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom, "PCIe ASPM programming will happen in relation to the Oprom", &gPlatformFspPkgTokenSpaceGuid_InitPcieAspmAfterOprom,
Help "Select when PCIe ASPM programming will happen in relation to the Oprom. Before(0x0)(Default): Do PCIe ASPM programming before Oprom, After(0x1): Do PCIe ASPM programming after Oprom, requires an SMI handler to save/restore ASPM settings during S3 resume"
Combo $gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay, "Selection of the primary display device", &gPlatformFspPkgTokenSpaceGuid_PrimaryDisplay,
Help "0=iGFX, 1=PEG, 2=PCIe Graphics on PCH, 3(Default)=AUTO, 4=Hybrid Graphics"
Combo $gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize, "Selection of PSMI Region size", &gPlatformFspPkgTokenSpaceGuid_PsmiRegionSize,
Help "0=32MB, 1=288MB, 2=544MB, 3=800MB, 4=1024MB Default is 0"
EditNum $gPlatformFspPkgTokenSpaceGuid_GmAdr, "Temporary MMIO address for GMADR", HEX,
Help "Obsolete field now and it has been extended to 64 bit address, used GmAdr64 "
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GttMmAdr, "Temporary MMIO address for GTTMMADR", HEX,
Help "The reference code will use this as Temporary MMIO address space to access GTTMMADR Registers.Platform should provide conflict free Temporary MMIO Range: GttMmAdr to (GttMmAdr + 2MB MMIO + 6MB Reserved + GttSize). Default is (GmAdr - (2MB MMIO + 6MB Reserved + GttSize)) to (GmAdr - 0x1) (Where GttSize = 8MB)"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_GttSize, "Selection of iGFX GTT Memory size", &gPlatformFspPkgTokenSpaceGuid_GttSize,
Help "1=2MB, 2=4MB, 3=8MB, Default is 3"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie0Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 0", HEX,
Help "Hybrid Graphics GPIO information for PEG 0, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaOcSupport, "Enable/Disable SA OcSupport", &EN_DIS,
Help "Enable: Enable SA OcSupport, Disable(Default): Disable SA OcSupport"
Combo $gPlatformFspPkgTokenSpaceGuid_GtVoltageMode, "GT slice Voltage Mode", &gPlatformFspPkgTokenSpaceGuid_GtVoltageMode,
Help "0(Default): Adaptive, 1: Override"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtMaxOcRatio, "Maximum GTs turbo ratio override", HEX,
Help "0(Default)=Minimal/Auto, 60=Maximum"
"Valid range: 0x00 ~ 0x3C"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVoltageOffset, "The voltage offset applied to GT slice", HEX,
Help "0(Default)=Minimal, 1000=Maximum"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtVoltageOverride, "The GT slice voltage override which is applied to the entire range of GT frequencies", HEX,
Help "0(Default)=Minimal, 2000=Maximum"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtExtraTurboVoltage, "adaptive voltage applied during turbo frequencies", HEX,
Help "0(Default)=Minimal, 2000=Maximum"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaVoltageOffset, "voltage offset applied to the SA", HEX,
Help "0(Default)=Minimal, 1000=Maximum"
"Valid range: 0x00 ~ 0x3E8"
EditNum $gPlatformFspPkgTokenSpaceGuid_RootPortIndex, "PCIe root port Function number for Hybrid Graphics dGPU", HEX,
Help "Root port Index number to indicate which PCIe root port has dGPU"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SaIpuEnable, "Enable/Disable SA IPU", &EN_DIS,
Help "Enable(Default): Enable SA IPU, Disable: Disable SA IPU"
Combo $gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed, "Lane Used of CSI port", &gPlatformFspPkgTokenSpaceGuid_IpuLaneUsed,
Help " Lane Used of each CSI port"
Combo $gPlatformFspPkgTokenSpaceGuid_CsiSpeed, "Lane Used of CSI port", &gPlatformFspPkgTokenSpaceGuid_CsiSpeed,
Help " Speed of each CSI port"
Combo $gPlatformFspPkgTokenSpaceGuid_ImguClkOutEn, "IMGU CLKOUT Configuration", &EN_DIS,
Help "The configuration of IMGU CLKOUT, 0: Disable;<b>1: Enable</b>."
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableMask, "Enable PCIE RP Mask", HEX,
Help "Enable/disable PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios, "Assertion on Link Down GPIOs", &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLinkDownGpios,
Help "GPIO Assertion on Link Down. Disabled(0x0)(Default): Disable assertion on Link Down GPIOs, Enabled(0x1): Enable assertion on Link Down GPIOs"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable, "Enable ClockReq Messaging ", &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpClockReqMsgEnable,
Help "ClockReq Messaging. Disabled(0x0): Disable ClockReq Messaging, Enabled(0x1)(Default): Enable ClockReq Messaging"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPcieSpeed, "PCIE RP Pcie Speed", HEX,
Help "Determines each PCIE Port speed capability. 0: Auto; 1: Gen1; 2: Gen2; 3: Gen3; 4: Gen4 (see: CPU_PCIE_SPEED)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_GtPsmiSupport, "Selection of PSMI Support On/Off", &EN_DIS,
Help "0(Default) = FALSE, 1 = TRUE. When TRUE, it will allow the PSMI Support"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig, "Program GPIOs for LFP on DDI port-A device", &gPlatformFspPkgTokenSpaceGuid_DdiPortAConfig,
Help "0=Disabled,1(Default)=eDP, 2=MIPI DSI"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig, "Program GPIOs for LFP on DDI port-B device", &gPlatformFspPkgTokenSpaceGuid_DdiPortBConfig,
Help "0(Default)=Disabled,1=eDP, 2=MIPI DSI"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortAHpd, "Enable or disable HPD of DDI port A", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBHpd, "Enable or disable HPD of DDI port B", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortCHpd, "Enable or disable HPD of DDI port C", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort1Hpd, "Enable or disable HPD of DDI port 1", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort2Hpd, "Enable or disable HPD of DDI port 2", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort3Hpd, "Enable or disable HPD of DDI port 3", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort4Hpd, "Enable or disable HPD of DDI port 4", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortADdc, "Enable or disable DDC of DDI port A", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortBDdc, "Enable or disable DDC of DDI port B", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPortCDdc, "Enable or disable DDC of DDI port C", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort1Ddc, "Enable DDC setting of DDI Port 1", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort2Ddc, "Enable DDC setting of DDI Port 2", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort3Ddc, "Enable DDC setting of DDI Port 3", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_DdiPort4Ddc, "Enable DDC setting of DDI Port 4", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_GmAdr64, "Temporary MMIO address for GMADR", HEX,
Help "The reference code will use this as Temporary MMIO address space to access GMADR Registers.Platform should provide conflict free Temporary MMIO Range: GmAdr to (GmAdr + ApertureSize). Default is (PciExpressBaseAddress - ApertureSize) to (PciExpressBaseAddress - 0x1) (Where ApertureSize = 256MB, 512MB, 1024MB and 2048MB)"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PerCoreHtDisable, "Per-core HT Disable", HEX,
Help "Defines the per-core HT disable mask where: 1 - Disable selected logical core HT, 0 - is ignored. Input is in HEX and each bit maps to a logical core. Ex. A value of '1F' would disable HT for cores 4,3,2,1 and 0. Default is 0, all cores have HT enabled. Range is 0 - 0x7F for max 8 cores. You can only disable up to MAX_CORE_COUNT - 1."
"Valid range: 0x00 ~ 0x7F"
Combo $gPlatformFspPkgTokenSpaceGuid_SaVoltageMode, "SA/Uncore voltage mode", &EN_DIS,
Help "SA/Uncore voltage mode; <b>0: Adaptive</b>; 1: Override."
EditNum $gPlatformFspPkgTokenSpaceGuid_SaVoltageOverride, "SA/Uncore Voltage Override", HEX,
Help "The SA/Uncore voltage override applicable when SA/Uncore voltage mode is in Override mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaExtraTurboVoltage, "SA/Uncore Extra Turbo voltage", HEX,
Help "Extra Turbo voltage applicable when SA/Uncore voltage mode is in Adaptive mode. Valid Range 0 to 2000"
"Valid range: 0x00 ~ 0x7D0"
Combo $gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping, "Thermal Velocity Boost Ratio clipping", &gPlatformFspPkgTokenSpaceGuid_TvbRatioClipping,
Help "0(Default): Disabled, 1: Enabled. This service controls Core frequency reduction caused by high package temperatures for processors that implement the Intel Thermal Velocity Boost (TVB) feature"
Combo $gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization, "Thermal Velocity Boost voltage optimization", &gPlatformFspPkgTokenSpaceGuid_TvbVoltageOptimization,
Help "0: Disabled, 1: Enabled(Default). This service controls thermal based voltage optimizations for processors that implement the Intel Thermal Velocity Boost (TVB) feature."
Combo $gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink, "Enable/Disable Display Audio Link in Pre-OS", &gPlatformFspPkgTokenSpaceGuid_DisplayAudioLink,
Help "0(Default)= Disable, 1 = Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_GtPllVoltageOffset, "GT PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_RingPllVoltageOffset, "Ring PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPllVoltageOffset, "System Agent PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_McPllVoltageOffset, "Memory Controller PLL voltage offset", HEX,
Help "Core PLL voltage offset. <b>0: No offset</b>. Range 0-15"
"Valid range: 0x00 ~ 0x0F"
Combo $gPlatformFspPkgTokenSpaceGuid_CridEnable, "Enable/Disable SA CRID", &EN_DIS,
Help "Enable: SA CRID, Disable (Default): SA CRID"
Combo $gPlatformFspPkgTokenSpaceGuid_WrcFeatureEnable, "WRC Feature", &EN_DIS,
Help "Enable/Disable WRC (Write Cache) feature of IOP. When feature is enabled, supports IO devices allocating onto the ring and into LLC. WRC is fused on by default."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieImrSize, "Size of PCIe IMR.", HEX,
Help "Size of PCIe IMR in megabytes"
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieImrEnabled, "Enable PCIe IMR", &EN_DIS,
Help "0: Disable(AUTO), 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieImrRpLocation, "Enable PCIe IMR", &EN_DIS,
Help "1: PCH PCIE, 2: SA PCIE. If PCIeImrEnabled is TRUE then this will use to select the Root port location from PCH PCIe or SA PCIe"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieImrRpSelection, "Root port number for IMR.", HEX,
Help "Root port number for IMR.If PCieImrRpLocation is PCH PCIe then select root port from 0 to 23 and if it is SA PCIe then select root port from 0 to 3"
"Valid range: 0x00 ~ 0x17"
Combo $gPlatformFspPkgTokenSpaceGuid_SkipExtGfxScan, "Skip external display device scanning", &EN_DIS,
Help "Enable: Do not scan for external display device, Disable (Default): Scan external display devices"
EditNum $gPlatformFspPkgTokenSpaceGuid_DmaBufferSize, "PMR Size", HEX,
Help "Size of PMR memory buffer. 0x400000 for normal boot and 0x200000 for S3 boot"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PreBootDmaMask, "VT-d/IOMMU Boot Policy", HEX,
Help "BIT0: Enable IOMMU during boot, BIT1: Enable IOMMU when transfer control to OS"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay, "Delta T12 Power Cycle Delay required in ms", &gPlatformFspPkgTokenSpaceGuid_DeltaT12PowerCycleDelay,
Help "Select the value for delay required. 0= No delay, 0xFFFF(Default) = Auto calculate T12 Delay to max 500ms"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie1Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 1", HEX,
Help "Hybrid Graphics GPIO information for PEG 1, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie2Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 2", HEX,
Help "Hybrid Graphics GPIO information for PEG 2, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcie3Rtd3Gpio, "Hybrid Graphics GPIO information for PEG 3", HEX,
Help "Hybrid Graphics GPIO information for PEG 3, for Reset, power and wake GPIOs"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx2VoltageScaleFactor, "Avx2 Voltage Guardband Scaling Factor", HEX,
Help "AVX2 Voltage Guardband Scale factor applied to AVX2 workloads. Range is 0-200 in 1/100 units, where a value of 125 would apply a 1.25 scale factor."
"Valid range: 0x00 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_Avx512VoltageScaleFactor, "Avx512 Voltage Guardband Scaling Factor", HEX,
Help "DEPRECATED"
"Valid range: 0x00 ~ 0xC8"
EndPage
Page "System Agent (Post-Mem)"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPtr, "Logo Pointer", HEX,
Help "Points to PEI Display Logo Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoSize, "Logo Size", HEX,
Help "Size of PEI Display Logo Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BltBufferAddress, "Blt Buffer Address", HEX,
Help "Address of Blt buffer"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BltBufferSize, "Blt Buffer Size", HEX,
Help "Size of Blt Buffer, is equal to PixelWidth * PixelHeight * 4 bytes (the size of EFI_GRAPHICS_OUTPUT_BLT_PIXEL)"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GraphicsConfigPtr, "Graphics Configuration Ptr", HEX,
Help "Points to VBT"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Device4Enable, "Enable Device 4", &EN_DIS,
Help "Enable/disable Device 4"
Combo $gPlatformFspPkgTokenSpaceGuid_PavpEnable, "Enable/Disable PavpEnable", &EN_DIS,
Help "Enable(Default): Enable PavpEnable, Disable: Disable PavpEnable"
Combo $gPlatformFspPkgTokenSpaceGuid_CdClock, "CdClock Frequency selection", &gPlatformFspPkgTokenSpaceGuid_CdClock,
Help "0 (Default) Auto (Max based on reference clock frequency), 0: 192, 1: 307.2, 2: 312 Mhz, 3: 324Mhz, 4: 326.4 Mhz, 5: 552 Mhz, 6: 556.8 Mhz, 7: 648 Mhz, 8: 652.8 Mhz"
Combo $gPlatformFspPkgTokenSpaceGuid_PeiGraphicsPeimInit, "Enable/Disable PeiGraphicsPeimInit", &EN_DIS,
Help "<b>Enable(Default):</b> FSP will initialize the framebuffer and provide it via EFI_PEI_GRAPHICS_INFO_HOB. Disable: FSP will NOT initialize the framebuffer."
Combo $gPlatformFspPkgTokenSpaceGuid_GnaEnable, "Enable or disable GNA device", &EN_DIS,
Help "0=Disable, 1(Default)=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SkipFspGop, "Enable/Disable SkipFspGop", &EN_DIS,
Help "Enable: Skip FSP provided GOP driver, Disable(Default): Use FSP provided GOP driver"
Combo $gPlatformFspPkgTokenSpaceGuid_SaPostMemRsvd, "SaPostMemRsvd", &EN_DIS,
Help "Reserved for PCH Post-Mem"
EditNum $gPlatformFspPkgTokenSpaceGuid_SendEcCmd, "SendEcCmd", HEX,
Help "SendEcCmd function pointer. \n @code typedef EFI_STATUS (EFIAPI *PLATFORM_SEND_EC_COMMAND) (IN EC_COMMAND_TYPE EcCmdType, IN UINT8 EcCmd, IN UINT8 SendData, IN OUT UINT8 *ReceiveData); @endcode"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcCmdProvisionEav, "EcCmdProvisionEav", HEX,
Help "Ephemeral Authorization Value default values. Provisions an ephemeral shared secret to the EC"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_EcCmdLock, "EcCmdLock", HEX,
Help "EcCmdLock default values. Locks Ephemeral Authorization Value sent previously"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SiSkipSsidProgramming, "Skip Ssid Programming.", &EN_DIS,
Help "When set to TRUE, silicon code will not do any SSID programming and platform code needs to handle that by itself properly."
EditNum $gPlatformFspPkgTokenSpaceGuid_SiCustomizedSvid, "Change Default SVID", HEX,
Help "Change the default SVID used in FSP to programming internal devices. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiCustomizedSsid, "Change Default SSID", HEX,
Help "Change the default SSID used in FSP to programming internal devices. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiSsidTablePtr, "SVID SDID table Poniter.", HEX,
Help "The address of the table of SVID SDID to customize each SVID SDID entry. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SiNumberOfSsidTableEntry, "Number of ssid table.", HEX,
Help "SiNumberOfSsidTableEntry should match the table entries created in SiSsidTablePtr. This is only valid when SkipSsidProgramming is FALSE."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortResetMessageEnable, "USB2 Port Reset Message Enable", HEX,
Help "0: Disable USB2 Port Reset Message; 1: Enable USB2 Port Reset Message; This must be enable for USB2 Port those are paired with CPU XHCI Port"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt, "SATA RST Interrupt Mode", &gPlatformFspPkgTokenSpaceGuid_SataRstInterrupt,
Help "Allowes to choose which interrupts will be implemented by SATA controller in RAID mode."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipPamLock, "Skip PAM regsiter lock", &EN_DIS,
Help "Enable: PAM register will not be locked by RC, platform code should lock it, Disable(Default): PAM registers will be locked by RC"
Combo $gPlatformFspPkgTokenSpaceGuid_EdramTestMode, "EDRAM Test Mode", &gPlatformFspPkgTokenSpaceGuid_EdramTestMode,
Help "Enable: PAM register will not be locked by RC, platform code should lock it, Disable(Default): PAM registers will be locked by RC"
Combo $gPlatformFspPkgTokenSpaceGuid_RenderStandby, "Enable/Disable IGFX RenderStandby", &EN_DIS,
Help "Enable(Default): Enable IGFX RenderStandby, Disable: Disable IGFX RenderStandby"
Combo $gPlatformFspPkgTokenSpaceGuid_PmSupport, "Enable/Disable IGFX PmSupport", &EN_DIS,
Help "Enable(Default): Enable IGFX PmSupport, Disable: Disable IGFX PmSupport"
Combo $gPlatformFspPkgTokenSpaceGuid_CdynmaxClampEnable, "Enable/Disable CdynmaxClamp", &EN_DIS,
Help "Enable: Enable CdynmaxClamp, Disable(Default): Disable CdynmaxClamp"
Combo $gPlatformFspPkgTokenSpaceGuid_GtFreqMax, "GT Frequency Limit", &gPlatformFspPkgTokenSpaceGuid_GtFreqMax,
Help "0xFF: Auto(Default), 2: 100 Mhz, 3: 150 Mhz, 4: 200 Mhz, 5: 250 Mhz, 6: 300 Mhz, 7: 350 Mhz, 8: 400 Mhz, 9: 450 Mhz, 0xA: 500 Mhz, 0xB: 550 Mhz, 0xC: 600 Mhz, 0xD: 650 Mhz, 0xE: 700 Mhz, 0xF: 750 Mhz, 0x10: 800 Mhz, 0x11: 850 Mhz, 0x12:900 Mhz, 0x13: 950 Mhz, 0x14: 1000 Mhz, 0x15: 1050 Mhz, 0x16: 1100 Mhz, 0x17: 1150 Mhz, 0x18: 1200 Mhz"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableTurboGt, "Disable Turbo GT", &EN_DIS,
Help " 0=Disable: GT frequency is not limited, 1=Enable: Disables Turbo GT frequency"
Combo $gPlatformFspPkgTokenSpaceGuid_SkipCdClockInit, "Enable/Disable CdClock Init", &EN_DIS,
Help "Enable: Skip Full CD clock initializaton, Disable(Default): Initialize the full CD clock if not initialized by Gfx PEIM"
Combo $gPlatformFspPkgTokenSpaceGuid_RC1pFreqEnable, "Enable RC1p frequency request to PMA (provided all other conditions are met)", &EN_DIS,
Help "0(Default)=Disable, 1=Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnMultiVcEnable, "Enable TSN Multi-VC", &EN_DIS,
Help "Enable/disable Multi Virtual Channels(VC) in TSN."
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPixelHeight, "LogoPixelHeight Address", HEX,
Help "Address of LogoPixelHeight"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LogoPixelWidth, "LogoPixelWidth Address", HEX,
Help "Address of LogoPixelWidth"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb4CmMode, "ITbt Usb4CmMode value", HEX,
Help "ITbt Usb4CmMode value. 0:Firmware CM, 1:Software CM"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieResizableBarSupport, "PCIE Resizable BAR Support", &EN_DIS,
Help "Enable/Disable PCIE Resizable BAR Support.0: Disable; 1: Enable; 2: Auto(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_SaPostMemTestRsvd, "SaPostMemTestRsvd", &EN_DIS,
Help "Reserved for SA Post-Mem Test"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxSnoopLatency, "PCIE RP Ltr Max Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrMaxNoSnoopLatency, "PCIE RP Ltr Max No Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Non-Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMode, "PCIE RP Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideMultiplier, "PCIE RP Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSnoopLatencyOverrideValue, "PCIE RP Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMode, "PCIE RP Non Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideMultiplier, "PCIE RP Non Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNonSnoopLatencyOverrideValue, "PCIE RP Non Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Uptp, "PCIE RP Upstream Port Transmiter Preset", HEX,
Help "Used during Gen3 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3Dptp, "PCIE RP Downstream Port Transmiter Preset", HEX,
Help "Used during Gen3 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Uptp, "PCIE RP Upstream Port Transmiter Preset", HEX,
Help "Used during Gen4 Link Equalization. Used for all lanes. Default is 8."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4Dptp, "PCIE RP Downstream Port Transmiter Preset", HEX,
Help "Used during Gen4 Link Equalization. Used for all lanes. Default is 9."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Uptp, "PCIE RP Upstream Port Transmiter Preset", HEX,
Help "Used during Gen5 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen5Dptp, "PCIE RP Downstream Port Transmiter Preset", HEX,
Help "Used during Gen5 Link Equalization. Used for all lanes. Default is 7."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp, "FOMS Control Policy", &gPlatformFspPkgTokenSpaceGuid_CpuPcieFomsCp,
Help "Choose the Foms Control Policy, <b>Default = 0 </b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcC10DynamicThresholdAdjustment, "PMC C10 dynamic threshold dajustment enable", &EN_DIS,
Help "Set if you want to enable PMC C10 dynamic threshold adjustment. Only works on supported SKUs"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode, "P2P mode for PCIE RP", &gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPeerToPeerMode,
Help "Enable/disable peer to peer mode for PCIE Root Ports. 0: Disable, 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitRatio, "Turbo Ratio Limit Ratio array", HEX,
Help "TurboRatioLimitRatio[7-0] will pair with TurboRatioLimitNumCore[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TurboRatioLimitNumCore, "Turbo Ratio Limit Num Core array", HEX,
Help "TurboRatioLimitNumCore[7-0] will pair with TurboRatioLimitRatio[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitRatio, "ATOM Turbo Ratio Limit Ratio array", HEX,
Help "AtomTurboRatioLimitRatio[7-0] will pair with AtomTurboRatioLimitNumCore[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_AtomTurboRatioLimitNumCore, "ATOM Turbo Ratio Limit Num Core array", HEX,
Help "AtomTurboRatioLimitNumCore[7-0] will pair with AtomTurboRatioLimitRatio[7-0] to determine the active core ranges for each frequency point."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_FspEventHandler, "FspEventHandler", HEX,
Help "<b>Optional</b> pointer to the boot loader's implementation of FSP_EVENT_HANDLER."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdGlobalMapping, "Enable VMD Global Mapping", &EN_DIS,
Help "Enable/disable to VMD controller.0: Disable; 1: Enable(Default)"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieFunc0LinkDisable, "CPU PCIE Port0 Link Disable", &EN_DIS,
Help "CPU PCIE Port0 Link Disable while Device attached into Port0 and Port1.0: Disable(Default); 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcSkipVccInConfig, "Skip VccIn Configuration", &EN_DIS,
Help "Skips VccIn configuration when enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_CseDataResilience, "CSE Data Resilience Support", &EN_DIS,
Help "0: Disable CSE Data Resilience Support. <b>; 1: Enable CSE Data Resilience Support.</b>"
EditNum $gPlatformFspPkgTokenSpaceGuid_HorizontalResolution, "HorizontalResolution for PEI Logo", HEX,
Help "HorizontalResolution from PEIm Gfx for PEI Logo"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VerticalResolution, "VerticalResolution for PEI Logo", HEX,
Help "VerticalResolution from PEIm Gfx for PEI Logo"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcActiveLtr, "Touch Host Controller Active Ltr", HEX,
Help "Expose Active Ltr for OS driver to set"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcIdleLtr, "Touch Host Controller Idle Ltr", HEX,
Help "Expose Idle Ltr for OS driver to set"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidResetPad, "Touch Host Controller Hid Over Spi ResetPad", HEX,
Help "Hid Over Spi ResetPad 0x0 - Use THC HW default Pad, For other pad setting refer to GpioPins"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidResetPadTrigger, "Touch Host Controller Hid Over Spi ResetPad Trigger", HEX,
Help "Hid Over Spi Reset Pad Trigger 0x0:Low, 0x1:High"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidConnectionSpeed, "Touch Host Controller Hid Over Spi Connection Speed", HEX,
Help "Hid Over Spi Connection Speed - SPI Frequency"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcLimitPacketSize, "Touch Host Controller Hid Over Spi Limit PacketSize", HEX,
Help "When set, limits SPI read & write packet size to 64B. Otherwise, THC uses Max Soc packet size for SPI Read and Write 0x0- Max Soc Packet Size, 0x11 - 64 Bytes"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPerformanceLimitation, "Touch Host Controller Hid Over Spi Limit PacketSize", HEX,
Help "Minimum amount of delay the THC/QUICKSPI driver must wait between end of write operation and begin of read operation. This value shall be in 10us multiples 0x0: Disabled, 1-65535 (0xFFFF) - up to 655350 us"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportHeaderAddress, "Touch Host Controller Hid Over Spi Input Report Header Address", HEX,
Help "Hid Over Spi Input Report Header Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidInputReportBodyAddress, "Touch Host Controller Hid Over Spi Input Report Body Address", HEX,
Help "Hid Over Spi Input Report Body Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidOutputReportAddress, "Touch Host Controller Hid Over Spi Output Report Address", HEX,
Help "Hid Over Spi Output Report Address"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidReadOpcode, "Touch Host Controller Hid Over Spi Read Opcode", HEX,
Help "Hid Over Spi Read Opcode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidWriteOpcode, "Touch Host Controller Hid Over Spi Write Opcode", HEX,
Help "Hid Over Spi Write Opcode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcHidFlags, "Touch Host Controller Hid Over Spi Flags", HEX,
Help "Hid Over Spi Flags 0x0:Single SPI Mode, 0x4000:Dual SPI Mode, 0x8000:Quad SPI Mode"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EndPage
Page "PCH (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusEnable, "Enable SMBus", &EN_DIS,
Help "Enable/disable SMBus controller."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode, "PCH Trace Hub Mode", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMode,
Help "Select 'Host Debugger' if Trace Hub is used with host debugger tool or 'Target Debugger' if Trace Hub is used by target debugger software or 'Disable' trace hub functionality."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size, "PCH Trace Hub Memory Region 0 buffer Size", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg0Size,
Help "Specify size of Pch trace memory region 0 buffer, the size can be 0, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size, "PCH Trace Hub Memory Region 1 buffer Size", &gPlatformFspPkgTokenSpaceGuid_PchTraceHubMemReg1Size,
Help "Specify size of Pch trace memory region 1 buffer, the size can be 0, 1MB, 8MB, 64MB, 128MB, 256MB, 512MB"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect, "HD Audio DMIC Link Clock Select", &gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClockSelect,
Help "Determines DMIC<N> Clock Source. 0: Both, 1: ClkA, 2: ClkB"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPreMemRsvd, "PchPreMemRsvd", &EN_DIS,
Help "Reserved for PCH Pre-Mem Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaEnable, "Enable Intel HD Audio (Azalia)", &EN_DIS,
Help "0: Disable, 1: Enable (Default) Azalia controller"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIshEnable, "Enable PCH ISH Controller", &EN_DIS,
Help "0: Disable, 1: Enable (Default) ISH Controller"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtleEnable, "Enable PCH HSIO PCIE Rx Set Ctle", HEX,
Help "Enable PCH PCIe Gen 3 Set CTLE Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioRxSetCtle, "PCH HSIO PCIE Rx Set Ctle Value", HEX,
Help "PCH PCIe Gen 3 Set CTLE Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmpEnable, "Enble PCH HSIO PCIE TX Gen 1 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DownscaleAmp, "PCH HSIO PCIE Gen 2 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmpEnable, "Enable PCH HSIO PCIE TX Gen 2 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DownscaleAmp, "PCH HSIO PCIE Gen 2 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmpEnable, "Enable PCH HSIO PCIE TX Gen 3 Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen3DownscaleAmp, "PCH HSIO PCIE Gen 3 TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH PCIe Gen 3 TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmphEnable, "Enable PCH HSIO PCIE Gen 1 TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen1DeEmph, "PCH HSIO PCIE Gen 1 TX Output De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 1 TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5Enable, "Enable PCH HSIO PCIE Gen 2 TX Output -3.5dB De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph3p5, "PCH HSIO PCIE Gen 2 TX Output -3.5dB De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output -3.5dB De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0Enable, "Enable PCH HSIO PCIE Gen 2 TX Output -6.0dB De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPcieHsioTxGen2DeEmph6p0, "PCH HSIO PCIE Gen 2 TX Output -6.0dB De-Emphasis Adjustment value", HEX,
Help "PCH PCIe Gen 2 TX Output -6.0dB De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen1EqBoostMag, "PCH HSIO SATA 1.5 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 1.5 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen2EqBoostMag, "PCH HSIO SATA 3.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 3.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMagEnable, "Enable PCH HSIO SATA Receiver Equalization Boost Magnitude Adjustment Value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioRxGen3EqBoostMag, "PCH HSIO SATA 6.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value", HEX,
Help "PCH HSIO SATA 6.0 Gb/s Receiver Equalization Boost Magnitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmpEnable, "Enable PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DownscaleAmp, "PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 1.5 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmpEnable, "Enable PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DownscaleAmp, "PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 3.0 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmpEnable, "Enable PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DownscaleAmp, "PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value", HEX,
Help "PCH HSIO SATA 6.0 Gb/s TX Output Downscale Amplitude Adjustment value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmphEnable, "Enable PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen1DeEmph, "PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 1.5 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmphEnable, "Enable PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen2DeEmph, "PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 3.0 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmphEnable, "Enable PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting value override", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSataHsioTxGen3DeEmph, "PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting", HEX,
Help "PCH HSIO SATA 6.0 Gb/s TX Output De-Emphasis Adjustment Setting."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusArpEnable, "Enable SMBus ARP support", &EN_DIS,
Help "Enable SMBus ARP support."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchNumRsvdSmbusAddresses, "Number of RsvdSmbusAddressTable.", HEX,
Help "The number of elements in the RsvdSmbusAddressTable."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSmbusIoBase, "SMBUS Base Address", HEX,
Help "SMBUS Base Address (IO space)."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchSmbAlertEnable, "Enable SMBus Alert Pin", &EN_DIS,
Help "Enable SMBus Alert Pin."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkSrcUsage, "Usage type for ClkSrc", HEX,
Help "0-23: PCH rootport, 0x40-0x43: PEG port, 0x70:LAN, 0x80: unspecified but in use (free running), 0xFF: not used"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkSrcClkReq, "ClkReq-to-ClkSrc mapping", HEX,
Help "Number of ClkReq signal assigned to ClkSrc"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieClkReqGpioMux, "Clk Req GPIO Pin", HEX,
Help "Select Clk Req Pin. Refer to GPIO_*_MUXING_SRC_CLKREQ_x* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_RsvdSmbusAddressTablePtr, "Point of RsvdSmbusAddressTable", HEX,
Help "Array of addresses reserved for non-ARP-capable SMBus devices."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpEnableMask, "Enable PCIE RP Mask", HEX,
Help "Enable/disable PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaVcType, "VC Type", &gPlatformFspPkgTokenSpaceGuid_PchHdaVcType,
Help "Virtual Channel Type Select: 0: VC0, 1: VC1."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaDspUaaCompliance, "Universal Audio Architecture compliance for DSP enabled system", &EN_DIS,
Help "0: Not-UAA Compliant (Intel SST driver supported only), 1: UAA Compliant (HDA Inbox driver or SST driver supported)."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkHdaEnable, "Enable HD Audio Link", &EN_DIS,
Help "Enable/disable HD Audio Link. Muxed with SSP0/SSP1/SNDW1."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaSdiEnable, "Enable HDA SDI lanes", HEX,
Help "Enable/disable HDA SDI lanes."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating, "HDA Power/Clock Gating (PGD/CGD)", &gPlatformFspPkgTokenSpaceGuid_PchHdaTestPowerClockGating,
Help "Enable/Disable HD Audio Power and Clock Gating(POR: Enable). 0: PLATFORM_POR, 1: FORCE_ENABLE, 2: FORCE_DISABLE."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicEnable, "Enable HD Audio DMIC_N Link", HEX,
Help "Enable/disable HD Audio DMIC1 link. Muxed with SNDW3."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkAPinMux, "DMIC<N> ClkA Pin Muxing (N - DMIC number)", HEX,
Help "Determines DMIC<N> ClkA Pin muxing. See GPIO_*_MUXING_DMIC<N>_CLKA_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicClkBPinMux, "DMIC<N> ClkB Pin Muxing", HEX,
Help "Determines DMIC<N> ClkA Pin muxing. See GPIO_*_MUXING_DMIC<N>_CLKB_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaDspEnable, "Enable HD Audio DSP", &EN_DIS,
Help "Enable/disable HD Audio DSP feature."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkDmicDataPinMux, "DMIC<N> Data Pin Muxing", HEX,
Help "Determines DMIC<N> Data Pin muxing. See GPIO_*_MUXING_DMIC<N>_DATA_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSspEnable, "Enable HD Audio SSP0 Link", HEX,
Help "Enable/disable HD Audio SSP_N/I2S link. Muxed with HDA. N-number 0-5"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaAudioLinkSndwEnable, "Enable HD Audio SoundWire#N Link", HEX,
Help "Enable/disable HD Audio SNDW#N link. Muxed with HDA."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency, "iDisp-Link Frequency", &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkFrequency,
Help "iDisp-Link Freq (PCH_HDAUDIO_LINK_FREQUENCY enum): 4: 96MHz, 3: 48MHz."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode, "iDisp-Link T-mode", &gPlatformFspPkgTokenSpaceGuid_PchHdaIDispLinkTmode,
Help "iDisp-Link T-Mode (PCH_HDAUDIO_IDISP_TMODE enum): 0: 2T, 2: 4T, 3: 8T, 4: 16T"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaIDispCodecDisconnect, "iDisplay Audio Codec disconnection", &EN_DIS,
Help "0: Not disconnected, enumerable, 1: Disconnected SDI, not enumerable."
Combo $gPlatformFspPkgTokenSpaceGuid_CnviDdrRfim, "CNVi DDR RFI Mitigation", &EN_DIS,
Help "Enable/Disable DDR RFI Mitigation. Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase, "ISA Serial Base selection", &gPlatformFspPkgTokenSpaceGuid_PcdIsaSerialUartBase,
Help "Select ISA Serial Base address. Default is 0x3F8."
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusDynamicPowerGating, "Smbus dynamic power gating", &EN_DIS,
Help "Disable or Enable Smbus dynamic power gating."
Combo $gPlatformFspPkgTokenSpaceGuid_WdtDisableAndLock, "Disable and Lock Watch Dog Register", &EN_DIS,
Help "Set 1 to clear WDT status, then disable and lock WDT registers."
Combo $gPlatformFspPkgTokenSpaceGuid_SmbusSpdWriteDisable, "SMBUS SPD Write Disable", &EN_DIS,
Help "Set/Clear Smbus SPD Write Disable. 0: leave SPD Write Disable bit; 1: set SPD Write Disable bit. For security recommendations, SPD write disable bit must be set."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode, "Serial Io Uart Debug Mode", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMode,
Help "Select SerialIo Uart Controller mode"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRxPinMux, "SerialIoUartDebugRxPinMux - FSPT", HEX,
Help "Select RX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugTxPinMux, "SerialIoUartDebugTxPinMux - FSPM", HEX,
Help "Select TX pin muxing for SerialIo UART used for debug"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugRtsPinMux, "SerialIoUartDebugRtsPinMux - FSPM", HEX,
Help "Select SerialIo Uart used for debug Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugCtsPinMux, "SerialIoUartDebugCtsPinMux - FSPM", HEX,
Help "Select SerialIo Uart used for debug Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PprEnable, "Ppr Enable Type", &gPlatformFspPkgTokenSpaceGuid_PprEnable,
Help "Enable Soft or Hard PPR <b>0:Disable</b>, 2:Hard PPR"
EndPage
Page "PCH (Post-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_ShowSpiController, "Show SPI controller", &EN_DIS,
Help "Enable/disable to show SPI controller."
Combo $gPlatformFspPkgTokenSpaceGuid_SataSalpSupport, "Enable SATA SALP Support", &EN_DIS,
Help "Enable/disable SATA Aggressive Link Power Management."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsEnable, "Enable SATA ports", HEX,
Help "Enable/disable SATA ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlp, "Enable SATA DEVSLP Feature", HEX,
Help "Enable/disable SATA DEVSLP per port. 0 is disable, 1 is enable. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortDevSlpPinMux, "SATA DEVSLP GPIO Pin", HEX,
Help "Select SATA DEVSLP Pin. Refer to GPIO_*_MUXING_SATA_DEVSLP_x* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortUsb20Enable, "Enable USB2 ports", HEX,
Help "Enable/disable per USB2 ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PortUsb30Enable, "Enable USB3 ports", HEX,
Help "Enable/disable per USB3 ports. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_XdciEnable, "Enable xDCI controller", &EN_DIS,
Help "Enable/disable to xDCI controller."
EditNum $gPlatformFspPkgTokenSpaceGuid_DevIntConfigPtr, "Address of PCH_DEVICE_INTERRUPT_CONFIG table.", HEX,
Help "The address of the table of PCH_DEVICE_INTERRUPT_CONFIG."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_NumOfDevIntConfig, "Number of DevIntConfig Entry", HEX,
Help "Number of Device Interrupt Configuration Entry. If this is not zero, the DevIntConfigPtr must not be NULL."
"Valid range: 0x00 ~ 0x40"
EditNum $gPlatformFspPkgTokenSpaceGuid_PxRcConfig, "PIRQx to IRQx Map Config", HEX,
Help "PIRQx to IRQx mapping. The valid value is 0x00 to 0x0F for each. First byte is for PIRQA, second byte is for PIRQB, and so on. The setting is only available in Legacy 8259 PCI mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_GpioIrqRoute, "Select GPIO IRQ Route", HEX,
Help "GPIO IRQ Select. The valid value is 14 or 15."
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_SciIrqSelect, "Select SciIrqSelect", HEX,
Help "SCI IRQ Select. The valid value is 9, 10, 11, and 20, 21, 22, 23 for APIC only."
"Valid range: 0x00 ~ 0x17"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcoIrqSelect, "Select TcoIrqSelect", HEX,
Help "TCO IRQ Select. The valid value is 9, 10, 11, 20, 21, 22, 23."
"Valid range: 0x00 ~ 0x17"
Combo $gPlatformFspPkgTokenSpaceGuid_TcoIrqEnable, "Enable/Disable Tco IRQ", &EN_DIS,
Help "Enable/disable TCO IRQ"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTableEntryNum, "PCH HDA Verb Table Entry Number", HEX,
Help "Number of Entries in Verb Table."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchHdaVerbTablePtr, "PCH HDA Verb Table Pointer", HEX,
Help "Pointer to Array of pointers to Verb Table."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataEnable, "Enable SATA", &EN_DIS,
Help "Enable/disable SATA controller."
Combo $gPlatformFspPkgTokenSpaceGuid_SataMode, "SATA Mode", &gPlatformFspPkgTokenSpaceGuid_SataMode,
Help "Select SATA controller working mode."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiMode, "SPIn Device Mode", HEX,
Help "Selects SPI operation mode. N represents controller index: SPI0, SPI1, ... Available modes: 0:SerialIoSpiDisabled, 1:SerialIoSpiPci, 2:SerialIoSpiHidden"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsPolarity, "SPI<N> Chip Select Polarity", HEX,
Help "Sets polarity for each chip Select. Available options: 0:SerialIoSpiCsActiveLow, 1:SerialIoSpiCsActiveHigh"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsEnable, "SPI<N> Chip Select Enable", HEX,
Help "0:Disabled, 1:Enabled. Enables GPIO for CS0 or CS1 if it is Enabled"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiDefaultCsOutput, "SPIn Default Chip Select Output", HEX,
Help "Sets Default CS as Output. N represents controller index: SPI0, SPI1, ... Available options: 0:CS0, 1:CS1"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsMode, "SPIn Default Chip Select Mode HW/SW", HEX,
Help "Sets Default CS Mode Hardware or Software. N represents controller index: SPI0, SPI1, ... Available options: 0:HW, 1:SW"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoSpiCsState, "SPIn Default Chip Select State Low/High", HEX,
Help "Sets Default CS State Low or High. N represents controller index: SPI0, SPI1, ... Available options: 0:Low, 1:High"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartMode, "UARTn Device Mode", HEX,
Help "Selects Uart operation mode. N represents controller index: Uart0, Uart1, ... Available modes: 0:SerialIoUartDisabled, 1:SerialIoUartPci, 2:SerialIoUartHidden, 3:SerialIoUartCom, 4:SerialIoUartSkipInit"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartBaudRate, "Default BaudRate for each Serial IO UART", HEX,
Help "Set default BaudRate Supported from 0 - default to 6000000"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartParity, "Default ParityType for each Serial IO UART", HEX,
Help "Set default Parity. 0: DefaultParity, 1: NoParity, 2: EvenParity, 3: OddParity"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDataBits, "Default DataBits for each Serial IO UART", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartStopBits, "Default StopBits for each Serial IO UART", HEX,
Help "Set default stop bits. 0: DefaultStopBits, 1: OneStopBit, 2: OneFiveStopBits, 3: TwoStopBits"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartPowerGating, "Power Gating mode for each Serial IO UART that works in COM mode", HEX,
Help "Set Power Gating. 0: Disabled, 1: Enabled, 2: Auto"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDmaEnable, "Enable Dma for each Serial IO UART that supports it", HEX,
Help "Set DMA/PIO mode. 0: Disabled, 1: Enabled"
"Valid range: 0x0 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartAutoFlow, "Enables UART hardware flow control, CTS and RTS lines", HEX,
Help "Enables UART hardware flow control, CTS and RTS lines."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartRtsPinMuxPolicy, "SerialIoUartRtsPinMuxPolicy", HEX,
Help "Select SerialIo Uart Rts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartCtsPinMuxPolicy, "SerialIoUartCtsPinMuxPolicy", HEX,
Help "Select SerialIo Uart Cts pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_CTS* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartRxPinMuxPolicy, "SerialIoUartRxPinMuxPolicy", HEX,
Help "Select SerialIo Uart Rx pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_RX* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartTxPinMuxPolicy, "SerialIoUartTxPinMuxPolicy", HEX,
Help "Select SerialIo Uart Tx pin muxing. Refer to GPIO_*_MUXING_SERIALIO_UARTx_TX* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoI2cMode, "I2Cn Device Mode", HEX,
Help "Selects I2c operation mode. N represents controller index: I2c0, I2c1, ... Available modes: 0:SerialIoI2cDisabled, 1:SerialIoI2cPci, 2:SerialIoI2cHidden"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSdaPinMux, "Serial IO I2C SDA Pin Muxing", HEX,
Help "Select SerialIo I2c Sda pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I2Cx_SDA* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cSclPinMux, "Serial IO I2C SCL Pin Muxing", HEX,
Help "Select SerialIo I2c Scl pin muxing. Refer to GPIO_*_MUXING_SERIALIO_I2Cx_SCL* for possible values."
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSerialIoI2cPadsTermination, "PCH SerialIo I2C Pads Termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C0,I2C1,... pads termination respectively. One byte for each controller, byte0 for I2C0, byte1 for I2C1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshGpGpioPinMuxing, "ISH GP GPIO Pin Muxing", HEX,
Help "Determines ISH GP GPIO Pin muxing. See GPIO_*_MUXING_ISH_GP_x_GPIO_*. 'x' are GP_NUMBER"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRxPinMuxing, "ISH UART Rx Pin Muxing", HEX,
Help "Determines ISH UART Rx Pin muxing. See GPIO_*_MUXING_ISH_UARTx_TXD_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartTxPinMuxing, "ISH UART Tx Pin Muxing", HEX,
Help "Determines ISH UART Tx Pin muxing. See GPIO_*_MUXING_ISH_UARTx_RXD_*"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRtsPinMuxing, "ISH UART Rts Pin Muxing", HEX,
Help "Select ISH UART Rts Pin muxing. Refer to GPIO_*_MUXING_ISH_UARTx_RTS_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartCtsPinMuxing, "ISH UART Rts Pin Muxing", HEX,
Help "Select ISH UART Cts Pin muxing. Refer to GPIO_*_MUXING_ISH_UARTx_CTS_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPinMuxing, "ISH I2C SDA Pin Muxing", HEX,
Help "Select ISH I2C SDA Pin muxing. Refer to GPIO_*_MUXING_ISH_I2Cx_SDA_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSclPinMuxing, "ISH I2C SCL Pin Muxing", HEX,
Help "Select ISH I2C SCL Pin muxing. Refer to GPIO_*_MUXING_ISH_I2Cx_SCL_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPinMuxing, "ISH SPI MOSI Pin Muxing", HEX,
Help "Select ISH SPI MOSI Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_MOSI_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPinMuxing, "ISH SPI MISO Pin Muxing", HEX,
Help "Select ISH SPI MISO Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_MISO_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiClkPinMuxing, "ISH SPI CLK Pin Muxing", HEX,
Help "Select ISH SPI CLK Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_CLK_* for possible values."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiCsPinMuxing, "ISH SPI CS#N Pin Muxing", HEX,
Help "Select ISH SPI CS#N Pin muxing. Refer to GPIO_*_MUXING_ISH_SPIx_CS<N>_* for possible values. N-SPI number, 0-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshGpGpioPadTermination, "ISH GP GPIO Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo GP#N GPIO pads termination respectively. #N are GP_NUMBER, not strictly relate to indexes of this table. Index 0-23 -> ISH_GP_0-23, Index 24-25 -> ISH_GP_30-31"
"Valid range: 0 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRxPadTermination, "ISH UART Rx Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Rx pads termination respectively. #N-byte for each controller, byte0 for UART0 Rx, byte1 for UART1 Rx, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartTxPadTermination, "ISH UART Tx Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Tx pads termination respectively. #N-byte for each controller, byte0 for UART0 Tx, byte1 for UART1 Tx, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartRtsPadTermination, "ISH UART Rts Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Rts pads termination respectively. #N-byte for each controller, byte0 for UART0 Rts, byte1 for UART1 Rts, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshUartCtsPadTermination, "ISH UART Rts Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo UART#N Cts pads termination respectively. #N-byte for each controller, byte0 for UART0 Cts, byte1 for UART1 Cts, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSdaPadTermination, "ISH I2C SDA Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Sda pads termination respectively. #N-byte for each controller, byte0 for I2C0 Sda, byte1 for I2C1 Sda, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshI2cSclPadTermination, "ISH I2C SCL Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo I2C#N Scl pads termination respectively. #N-byte for each controller, byte0 for I2C0 Scl, byte1 for I2C1 Scl, and so on."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMosiPadTermination, "ISH SPI MOSI Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Mosi pads termination respectively. #N-byte for each controller, byte0 for SPI0 Mosi, byte1 for SPI1 Mosi, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiMisoPadTermination, "ISH SPI MISO Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Miso pads termination respectively. #N-byte for each controller, byte0 for SPI0 Miso, byte1 for SPI1 Miso, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiClkPadTermination, "ISH SPI CLK Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Clk pads termination respectively. #N-byte for each controller, byte0 for SPI0 Clk, byte1 for SPI1 Clk, and so on."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IshSpiCsPadTermination, "ISH SPI CS#N Pad termination", HEX,
Help "0x0: Hardware default, 0x1: None, 0x13: 1kOhm weak pull-up, 0x15: 5kOhm weak pull-up, 0x19: 20kOhm weak pull-up - Enable/disable SerialIo SPI#N Cs#M pads termination respectively. N*M-byte for each controller, byte0 for SPI0 Cs0, byte1 for SPI1 Cs1, SPI1 Cs0, byte2, SPI1 Cs1, byte3"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiCsEnable, "Enable PCH ISH SPI Cs#N pins assigned", HEX,
Help "Set if ISH SPI Cs#N pins are to be enabled by BIOS. 0: Disable; 1: Enable. N-Cs number: 0-1"
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPetxiset, "USB Per Port HS Preemphasis Bias", HEX,
Help "USB Per Port HS Preemphasis Bias. 000b-0mV, 001b-11.25mV, 010b-16.9mV, 011b-28.15mV, 100b-28.15mV, 101b-39.35mV, 110b-45mV, 111b-56.3mV. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyTxiset, "USB Per Port HS Transmitter Bias", HEX,
Help "USB Per Port HS Transmitter Bias. 000b-0mV, 001b-11.25mV, 010b-16.9mV, 011b-28.15mV, 100b-28.15mV, 101b-39.35mV, 110b-45mV, 111b-56.3mV, One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPredeemp, "USB Per Port HS Transmitter Emphasis", HEX,
Help "USB Per Port HS Transmitter Emphasis. 00b - Emphasis OFF, 01b - De-emphasis ON, 10b - Pre-emphasis ON, 11b - Pre-emphasis & De-emphasis ON. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2PhyPehalfbit, "USB Per Port Half Bit Pre-emphasis", HEX,
Help "USB Per Port Half Bit Pre-emphasis. 1b - half-bit pre-emphasis, 0b - full-bit pre-emphasis. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmphEnable, "Enable the write to USB 3.0 TX Output -3.5dB De-Emphasis Adjustment", HEX,
Help "Enable the write to USB 3.0 TX Output -3.5dB De-Emphasis Adjustment. Each value in arrary can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDeEmph, "USB 3.0 TX Output -3.5dB De-Emphasis Adjustment Setting", HEX,
Help "USB 3.0 TX Output -3.5dB De-Emphasis Adjustment Setting, HSIO_TX_DWORD5[21:16], <b>Default = 29h</b> (approximately -3.5dB De-Emphasis). One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmpEnable, "Enable the write to USB 3.0 TX Output Downscale Amplitude Adjustment", HEX,
Help "Enable the write to USB 3.0 TX Output Downscale Amplitude Adjustment, Each value in arrary can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxDownscaleAmp, "USB 3.0 TX Output Downscale Amplitude Adjustment", HEX,
Help "USB 3.0 TX Output Downscale Amplitude Adjustment, HSIO_TX_DWORD8[21:16], <b>Default = 00h</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLanEnable, "Enable LAN", &EN_DIS,
Help "Enable/disable LAN controller."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnEnable, "Enable PCH TSN", &EN_DIS,
Help "Enable/disable TSN on the PCH."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed, "TSN Link Speed", &gPlatformFspPkgTokenSpaceGuid_PchTsnLinkSpeed,
Help "Set TSN Link Speed."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressHigh, "PCH TSN MAC Address High Bits", HEX,
Help "Set TSN MAC Address High."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTsnMacAddressLow, "PCH TSN MAC Address Low Bits", HEX,
Help "Set TSN MAC Address Low."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PciePtm, "PCIe PTM enable/disable", HEX,
Help "Enable/disable Precision Time Measurement for PCIE Root Ports."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieDpc, "PCIe DPC enable/disable", HEX,
Help "Enable/disable Downstream Port Containment for PCIE Root Ports."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEdpc, "PCIe DPC extensions enable/disable", HEX,
Help "Enable/disable Downstream Port Containment Extensions for PCIE Root Ports."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UsbPdoProgramming, "USB PDO Programming", &EN_DIS,
Help "Enable/disable PDO programming for USB in PEI phase. Disabling will allow for programming during later phase. 1: enable, 0: disable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcPowerButtonDebounce, "Power button debounce configuration", HEX,
Help "Debounce time for PWRBTN in microseconds. For values not supported by HW, they will be rounded down to closest supported on. 0: disable, 250-1024000us: supported range"
"Valid range: 0x00 ~ 0x009C4000"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiBmeMasterSlaveEnabled, "PCH eSPI Host and Device BME enabled", &EN_DIS,
Help "PCH eSPI Host and Device BME enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiLockLinkConfiguration, "PCH eSPI Link Configuration Lock (SBLCL)", &EN_DIS,
Help "Enable/Disable lock of communication through SET_CONFIG/GET_CONFIG to eSPI slaves addresseses from range 0x0 - 0x7FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailEnabledStates, "Mask to enable the usage of external V1p05 VR rail in specific S0ix or Sx states", HEX,
Help "Enable External V1P05 Rail in: BIT0:S0i1/S0i2, BIT1:S0i3, BIT2:S3, BIT3:S4, BIT4:S5, BIT5:S0"
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailSupportedVoltageStates, "Mask to enable the platform configuration of external V1p05 VR rail", HEX,
Help "External V1P05 Rail Supported Configuration"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailVoltage, "External V1P05 Voltage Value that will be used in S0i2/S0i3 states", HEX,
Help "Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...)"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMax, "External V1P05 Icc Max Value", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailEnabledStates, "Mask to enable the usage of external Vnn VR rail in specific S0ix or Sx states", HEX,
Help "Enable External Vnn Rail in: BIT0:S0i1/S0i2, BIT1:S0i3, BIT2:S3, BIT3:S4, BIT5:S5"
"Valid range: 0x00 ~ 0x1F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSupportedVoltageStates, "Mask to enable the platform configuration of external Vnn VR rail", HEX,
Help "External Vnn Rail Supported Configuration"
"Valid range: 0x00 ~ 0x0F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailVoltage, "External Vnn Voltage Value that will be used in S0ix/Sx states", HEX,
Help "Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...), Default is set to 420"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMax, "External Vnn Icc Max Value that will be used in S0ix/Sx states", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxEnabledStates, "Mask to enable the usage of external Vnn VR rail in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Enable External Vnn Rail in Sx: BIT0-1:Reserved, BIT2:S3, BIT3:S4, BIT4:S5, BIT5:S0"
"Valid range: 0x00 ~ 0x3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxVoltage, "External Vnn Voltage Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Value is given in 2.5mV increments (0=0mV, 1=2.5mV, 2=5mV...)"
"Valid range: 0x0 ~ 0x07FF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMax, "External Vnn Icc Max Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Granularity of this setting is 1mA and maximal possible value is 200mA"
"Valid range: 0x0 ~ 0xC8"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxLowToHighCurModeVolTranTime, "Transition time in microseconds from Low Current Mode Voltage to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to low current mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToHighCurModeVolTranTime, "Transition time in microseconds from Retention Mode Voltage to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to retention mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxRetToLowCurModeVolTranTime, "Transition time in microseconds from Retention Mode Voltage to Low Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 PCH will not transition VCCIN_AUX to retention mode voltage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrVccinAuxOffToHighCurModeVolTranTime, "Transition time in microseconds from Off (0V) to High Current Mode Voltage", HEX,
Help "This field has 1us resolution. When value is 0 Transition to 0V is disabled."
"Valid range: 0x0 ~ 0x7FF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcDbgMsgEn, "PMC Debug Message Enable", &EN_DIS,
Help "When Enabled, PMC HW will send debug messages to trace hub; When Disabled, PMC HW will never send debug meesages to trace hub. Noted: When Enabled, may not enter S0ix"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinPtr, "Pointer of ChipsetInit Binary", HEX,
Help "ChipsetInit Binary Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ChipsetInitBinLen, "Length of ChipsetInit Binary", HEX,
Help "ChipsetInit Binary Length."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchFivrDynPm, "FIVR Dynamic Power Management", &EN_DIS,
Help "Enable/Disable FIVR Dynamic Power Management."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailIccMaximum, "External V1P05 Icc Max Value", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailIccMaximum, "External Vnn Icc Max Value that will be used in S0ix/Sx states", HEX,
Help "Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailSxIccMaximum, "External Vnn Icc Max Value that will be used in Sx states", HEX,
Help "Use only if Ext Vnn Rail config is different in Sx. Granularity of this setting is 1mA and maximal possible value is 500mA"
"Valid range: 0x0 ~ 0x1F4"
Combo $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable, "Extented BIOS Direct Read Decode enable", &EN_DIS,
Help "Enable/Disable access to bigger than 16MB BIOS Region through Direct Memory Reads. 0: disabled (default), 1: enabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase, "Extended BIOS Direct Read Decode Range base", HEX,
Help "Bits of 31:16 of a memory address that'll be a base for Extended BIOS Direct Read Decode."
"Valid range: 0x0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeLimit, "Extended BIOS Direct Read Decode Range limit", HEX,
Help "Bits of 31:16 of a memory address that'll be a limit for Extended BIOS Direct Read Decode."
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciUaolEnable, "USB Audio Offload enable", &EN_DIS,
Help "Enable/Disable USB Audio Offload capabilites. 0: disabled, 1: enabled (default)"
EditNum $gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinPtr, "Pointer of SYNPS PHY Binary", HEX,
Help "ChipsetInit Binary Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SynpsPhyBinLen, "Length of SYNPS PHY Binary", HEX,
Help "ChipsetInit Binary Length."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviMode, "CNVi Configuration", &gPlatformFspPkgTokenSpaceGuid_CnviMode,
Help "This option allows for automatic detection of Connectivity Solution. [Auto Detection] assumes that CNVi will be enabled when available, [Disable] allows for disabling CNVi."
Combo $gPlatformFspPkgTokenSpaceGuid_CnviWifiCore, "CNVi Wi-Fi Core", &EN_DIS,
Help "Enable/Disable CNVi Wi-Fi Core, Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviBtCore, "CNVi BT Core", &EN_DIS,
Help "Enable/Disable CNVi BT Core, Default is ENABLE. 0: DISABLE, 1: ENABLE"
Combo $gPlatformFspPkgTokenSpaceGuid_CnviBtAudioOffload, "CNVi BT Audio Offload", &EN_DIS,
Help "Enable/Disable BT Audio Offload, Default is DISABLE. 0: DISABLE, 1: ENABLE"
EditNum $gPlatformFspPkgTokenSpaceGuid_CnviRfResetPinMux, "CNVi RF_RESET pin muxing", HEX,
Help "Select CNVi RF_RESET# pin depending on board routing. ADP-P/M: GPP_A8 = 0x2942E408(default) or GPP_F4 = 0x194CE404. ADP-S: 0. Refer to GPIO_*_MUXING_CNVI_RF_RESET_* in GpioPins*.h."
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CnviClkreqPinMux, "CNVi CLKREQ pin muxing", HEX,
Help "Select CNVi CLKREQ pin depending on board routing. ADP-P/M: GPP_A9 = 0x3942E609(default) or GPP_F5 = 0x394CE605. ADP-S: 0. Refer to GPIO_*_MUXING_CNVI_CRF_XTAL_CLKREQ_* in GpioPins*.h."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiHostC10ReportEnable, "Enable Host C10 reporting through eSPI", &EN_DIS,
Help "Enable/disable Host C10 reporting to Device via eSPI Virtual Wire."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcUsb2PhySusPgEnable, "PCH USB2 PHY Power Gating enable", &EN_DIS,
Help "1: Will enable USB2 PHY SUS Well Power Gating, 0: Will not enable PG of USB2 PHY Sus Well PG"
Combo $gPlatformFspPkgTokenSpaceGuid_PchUsbOverCurrentEnable, "PCH USB OverCurrent mapping enable", &EN_DIS,
Help "1: Will program USB OC pin mapping in xHCI controller memory, 0: Will clear OC pin mapping allow for NOA usage of OC pins"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEspiLgmrEnable, "Espi Lgmr Memory Range decode ", &EN_DIS,
Help "This option enables or disables espi lgmr "
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtV1p05RailCtrlRampTmr, "External V1P05 Control Ramp Timer value", HEX,
Help "Hold off time to be used when changing the v1p05_ctrl for external bypass value in us"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchFivrExtVnnRailCtrlRampTmr, "External VNN Control Ramp Timer value", HEX,
Help "Hold off time to be used when changing the vnn_ctrl for external bypass value in us"
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDevSlpResetConfig, "Set SATA DEVSLP GPIO Reset Config", HEX,
Help "Set SATA DEVSLP GPIO Reset Config per port. 0x00 - GpioResetDefault, 0x01 - GpioResumeReset, 0x03 - GpioHostDeepReset, 0x05 - GpioPlatformReset, 0x07 - GpioDswReset. One byte for each port, byte0 for port0, byte1 for port1, and so on."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHotEnable, "PCHHOT# pin", &EN_DIS,
Help "Enable PCHHOT# pin assertion when temperature is higher than PchHotLevel. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SataLedEnable, "SATA LED", &EN_DIS,
Help "SATA LED indicating SATA controller activity. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmVrAlert, "VRAlert# Pin", &EN_DIS,
Help "When VRAlert# feature pin is enabled and its state is '0', the PMC requests throttling to a T3 Tstate to the PCH throttling unit.. 0: disable, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotImplemented, "PCH PCIe root port connection type", HEX,
Help "0: built-in device, 1:slot"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAcsEnabled, "PCIE RP Access Control Services Extended Capability", HEX,
Help "Enable/Disable PCIE RP Access Control Services Extended Capability"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpEnableCpm, "PCIE RP Clock Power Management", HEX,
Help "Enable/Disable PCIE RP Clock Power Management, even if disabled, CLKREQ# signal can still be controlled by L1 PM substates mechanism"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpDetectTimeoutMs, "PCIE RP Detect Timeout Ms", HEX,
Help "The number of milliseconds within 0~65535 in reference code will wait for link to exit Detect state for enabled ports before assuming there is no device and potentially disabling the port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcModPhySusPgEnable, "ModPHY SUS Power Domain Dynamic Gating", &EN_DIS,
Help "Enable/Disable ModPHY SUS Power Domain Dynamic Gating. Setting not supported on PCH-H. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcV1p05PhyExtFetControlEn, "V1p05-PHY supply external FET control", &EN_DIS,
Help "Enable/Disable control using EXT_PWR_GATE# pin of external FET to power gate v1p05-PHY supply. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcV1p05IsExtFetControlEn, "V1p05-IS supply external FET control", &EN_DIS,
Help "Enable/Disable control using EXT_PWR_GATE2# pin of external FET to power gate v1p05-IS supply. 0: disable, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable, "PCH xHCI enable HS Interrupt IN Alarm", &EN_DIS,
Help "PCH xHCI enable HS Interrupt IN Alarm. 0: disabled (default), 1: enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPwrOptEnable, "Enable Power Optimizer", &EN_DIS,
Help "Enable DMI Power Optimizer on PCH side."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchWriteProtectionEnable, "PCH Flash Protection Ranges Write Enble", HEX,
Help "Write or erase is blocked by hardware."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchReadProtectionEnable, "PCH Flash Protection Ranges Read Enble", HEX,
Help "Read is blocked by hardware."
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeLimit, "PCH Protect Range Limit", HEX,
Help "Left shifted address by 12 bits with address bits 11:0 are assumed to be FFFh for limit comparison."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchProtectedRangeBase, "PCH Protect Range Base", HEX,
Help "Left shifted address by 12 bits with address bits 11:0 are assumed to be 0."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaPme, "Enable Pme", &EN_DIS,
Help "Enable Azalia wake-on-ring."
Combo $gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency, "HD Audio Link Frequency", &gPlatformFspPkgTokenSpaceGuid_PchHdaLinkFrequency,
Help "HDA Link Freq (PCH_HDAUDIO_LINK_FREQUENCY enum): 0: 6MHz, 1: 12MHz, 2: 24MHz."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiCs0Enable, "Enable PCH ISH SPI Cs0 pins assigned", HEX,
Help "Set if ISH SPI Cs0 pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIoApicEntry24_119, "Enable PCH Io Apic Entry 24-119", &EN_DIS,
Help "0: Disable; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIoApicId, "PCH Io Apic ID", HEX,
Help "This member determines IOAPIC ID. Default is 0x02."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshSpiEnable, "Enable PCH ISH SPI pins assigned", HEX,
Help "Set if ISH SPI native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshUartEnable, "Enable PCH ISH UART pins assigned", HEX,
Help "Set if ISH UART native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshI2cEnable, "Enable PCH ISH I2C pins assigned", HEX,
Help "Set if ISH I2C native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x0 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchIshGpEnable, "Enable PCH ISH GP pins assigned", HEX,
Help "Set if ISH GP native pins are to be enabled by BIOS. 0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchIshPdtUnlock, "PCH ISH PDT Unlock Msg", &EN_DIS,
Help "0: False; 1: True."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLanLtrEnable, "Enable PCH Lan LTR capabilty of PCH internal LAN", &EN_DIS,
Help "0: Disable; 1: Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosLock, "Enable LOCKDOWN BIOS LOCK", &EN_DIS,
Help "Enable the BIOS Lock feature and set EISS bit (D31:F5:RegDCh[5]) for the BIOS region protection."
Combo $gPlatformFspPkgTokenSpaceGuid_PchCrid, "PCH Compatibility Revision ID", &EN_DIS,
Help "This member describes whether or not the CRID feature of PCH should be enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_RtcBiosInterfaceLock, "RTC BIOS Interface Lock", &EN_DIS,
Help "Enable RTC BIOS interface lock. When set, prevents RTC TS (BUC.TS) from being changed."
Combo $gPlatformFspPkgTokenSpaceGuid_RtcMemoryLock, "RTC Cmos Memory Lock", &EN_DIS,
Help "Enable RTC lower and upper 128 byte Lock bits to lock Bytes 38h-3Fh in the upper and and lower 128-byte bank of RTC RAM."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpHotPlug, "Enable PCIE RP HotPlug", HEX,
Help "Indicate whether the root port is hot plug available."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPmSci, "Enable PCIE RP Pm Sci", HEX,
Help "Indicate whether the root port power manager SCI is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpTransmitterHalfSwing, "Enable PCIE RP Transmitter Half Swing", HEX,
Help "Indicate whether the Transmitter Half Swing is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpClkReqDetect, "Enable PCIE RP Clk Req Detect", HEX,
Help "Probe CLKREQ# signal before enabling CLKREQ# based power management."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAdvancedErrorReporting, "PCIE RP Advanced Error Report", HEX,
Help "Indicate whether the Advanced Error Reporting is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpUnsupportedRequestReport, "PCIE RP Unsupported Request Report", HEX,
Help "Indicate whether the Unsupported Request Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpFatalErrorReport, "PCIE RP Fatal Error Report", HEX,
Help "Indicate whether the Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNoFatalErrorReport, "PCIE RP No Fatal Error Report", HEX,
Help "Indicate whether the No Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpCorrectableErrorReport, "PCIE RP Correctable Error Report", HEX,
Help "Indicate whether the Correctable Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnFatalError, "PCIE RP System Error On Fatal Error", HEX,
Help "Indicate whether the System Error on Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnNonFatalError, "PCIE RP System Error On Non Fatal Error", HEX,
Help "Indicate whether the System Error on Non Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSystemErrorOnCorrectableError, "PCIE RP System Error On Correctable Error", HEX,
Help "Indicate whether the System Error on Correctable Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpMaxPayload, "PCIE RP Max Payload", HEX,
Help "Max Payload Size supported, Default 128B, see enum PCH_PCIE_MAX_PAYLOAD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment, "Touch Host Controller Port 0 Assignment", &gPlatformFspPkgTokenSpaceGuid_ThcPort0Assignment,
Help "Assign THC Port 0"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPort0InterruptPinMuxing, "Touch Host Controller Port 0 Interrupt Pin Mux", HEX,
Help "Set THC Port 0 Pin Muxing Value if signal can be enabled on multiple pads. Refer to GPIO_*_MUXING_THC_SPIx_INTB_* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort0WakeOnTouch, "Touch Host Controller Port 0 Wake On Touch", &EN_DIS,
Help "Based on this setting vGPIO for given THC will be in native mode, and additional _CRS for wake will be exposed in ACPI"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment, "Touch Host Controller Port 1 Assignment", &gPlatformFspPkgTokenSpaceGuid_ThcPort1Assignment,
Help "Assign THC Port 1"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcPort1InterruptPinMuxing, "Touch Host Controller Port 1 Interrupt Pin Mux", HEX,
Help "Set THC Port 1 Pin Muxing Value if signal can be enabled on multiple pads. Refer to GPIO_*_MUXING_THC_SPIx_INTB_* for possible values."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ThcPort1WakeOnTouch, "Touch Host Controller Port 1 Wake On Touch", &EN_DIS,
Help "Based on this setting vGPIO for given THC will be in native mode, and additional _CRS for wake will be exposed in ACPI"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPcieSpeed, "PCIE RP Pcie Speed", HEX,
Help "Determines each PCIE Port speed capability. 0: Auto; 1: Gen1; 2: Gen2; 3: Gen3; 4: Gen4 (see: PCIE_SPEED)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpPhysicalSlotNumber, "PCIE RP Physical Slot Number", HEX,
Help "Indicates the slot number for the root port. Default is the value as root port index."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpCompletionTimeout, "PCIE RP Completion Timeout", HEX,
Help "The root port completion timeout(see: PCIE_COMPLETION_TIMEOUT). Default is PchPcieCompletionTO_Default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpAspm, "PCIE RP Aspm", HEX,
Help "The ASPM configuration of the root port (see: PCH_PCIE_ASPM_CONTROL). Default is PchPcieAspmAutoConfig."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpL1Substates, "PCIE RP L1 Substates", HEX,
Help "The L1 Substates configuration of the root port (see: PCH_PCIE_L1SUBSTATES_CONTROL). Default is PchPcieL1SubstatesL1_1_2."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpL1Low, "PCIE RP L1 Low Substate", HEX,
Help "The L1 Low Substate configuration of the root port. 0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrEnable, "PCIE RP Ltr Enable", HEX,
Help "Latency Tolerance Reporting Mechanism."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrConfigLock, "PCIE RP Ltr Config Lock", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqOverrideDefault, "PCIe override default settings for EQ", &EN_DIS,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqMethod, "PCIe choose EQ method", &gPlatformFspPkgTokenSpaceGuid_PcieEqMethod,
Help "Choose PCIe EQ method"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqMode, "PCIe choose EQ mode", &gPlatformFspPkgTokenSpaceGuid_PcieEqMode,
Help "Choose PCIe EQ mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEqLocalTransmitterOverrideEnable, "PCIe EQ local transmitter override", &EN_DIS,
Help "Enable/Disable local transmitter override"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3NumberOfPresetsOrCoefficients, "PCIe number of valid list entries", HEX,
Help "Select number of presets or coefficients depending on the mode"
"Valid range: 0 ~ 11"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PreCursorList, "PCIe pre-cursor coefficient list", HEX,
Help "Provide a list of pre-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0x0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PostCursorList, "PCIe post-cursor coefficient list", HEX,
Help "Provide a list of post-cursor coefficients to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh3PresetList, "PCIe preset list", HEX,
Help "Provide a list of presets to be used during phase 3 EQ"
"Valid range: 0 ~ 0x3F3F3F3F3F3F3F3F3F3F3F"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh1DownstreamPortTransmitterPreset, "PCIe EQ phase 1 downstream transmitter port preset", HEX,
Help "Allows to select the downstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh1UpstreamPortTransmitterPreset, "PCIe EQ phase 1 upstream tranmitter port preset", HEX,
Help "Allows to select the upstream port preset value that will be used during phase 1 of equalization"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieEqPh2LocalTransmitterOverridePreset, "PCIe EQ phase 2 local transmitter override preset", HEX,
Help "Allows to select the value of the preset used during phase 2 local transmitter override"
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEnablePeerMemoryWrite, "PCIE Enable Peer Memory Write", &EN_DIS,
Help "This member describes whether Peer Memory Writes are enabled on the platform."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieComplianceTestMode, "PCIE Compliance Test Mode", &EN_DIS,
Help "Compliance Test Mode shall be enabled when using Compliance Load Board."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpFunctionSwap, "PCIE Rp Function Swap", &EN_DIS,
Help "DEPRECATED. Allows BIOS to use root port function number swapping when root port of function 0 is disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3ProgramStaticEq, "Enable/Disable PEG GEN3 Static EQ Phase1 programming", &EN_DIS,
Help "Program Gen3 EQ Phase1 Static Presets. Disabled(0x0): Disable EQ Phase1 Static Presets Programming, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4ProgramStaticEq, "Enable/Disable GEN4 Static EQ Phase1 programming", &EN_DIS,
Help "Program Gen4 EQ Phase1 Static Presets. Disabled(0x0): Disable EQ Phase1 Static Presets Programming, Enabled(0x1)(Default): Enable EQ Phase1 Static Presets Programming"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmPmeB0S5Dis, "PCH Pm PME_B0_S5_DIS", &EN_DIS,
Help "When cleared (default), wake events from PME_B0_STS are allowed in S5 if PME_B0_EN = 1."
Combo $gPlatformFspPkgTokenSpaceGuid_PcieRpImrEnabled, "PCIE IMR", &EN_DIS,
Help "Enables Isolated Memory Region for PCIe."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpImrSelection, "PCIE IMR port number", HEX,
Help "Selects PCIE root port number for IMR feature."
"Valid range: 0x0 ~ 23"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWolEnableOverride, "PCH Pm Wol Enable Override", &EN_DIS,
Help "Corresponds to the WOL Enable Override bit in the General PM Configuration B (GEN_PMCON_B) register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmPcieWakeFromDeepSx, "PCH Pm Pcie Wake From DeepSx", &EN_DIS,
Help "Determine if enable PCIe to wake from deep Sx."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanEnable, "PCH Pm WoW lan Enable", &EN_DIS,
Help "Determine if WLAN wake from Sx, corresponds to the HOST_WLAN_PP_EN bit in the PWRM_CFG3 register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWoWlanDeepSxEnable, "PCH Pm WoW lan DeepSx Enable", &EN_DIS,
Help "Determine if WLAN wake from DeepSx, corresponds to the DSX_WLAN_PP_EN bit in the PWRM_CFG3 register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmLanWakeFromDeepSx, "PCH Pm Lan Wake From DeepSx", &EN_DIS,
Help "Determine if enable LAN to wake from deep Sx."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDeepSxPol, "PCH Pm Deep Sx Pol", &EN_DIS,
Help "Deep Sx Policy."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpS3MinAssert, "PCH Pm Slp S3 Min Assert", HEX,
Help "SLP_S3 Minimum Assertion Width Policy. Default is PchSlpS350ms."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpS4MinAssert, "PCH Pm Slp S4 Min Assert", HEX,
Help "SLP_S4 Minimum Assertion Width Policy. Default is PchSlpS44s."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpSusMinAssert, "PCH Pm Slp Sus Min Assert", HEX,
Help "SLP_SUS Minimum Assertion Width Policy. Default is PchSlpSus4s."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmSlpAMinAssert, "PCH Pm Slp A Min Assert", HEX,
Help "SLP_A Minimum Assertion Width Policy. Default is PchSlpA2s."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchEnableDbcObs, "USB Overcurrent Override for VISA", &EN_DIS,
Help "This option overrides USB Over Current enablement state that USB OC will be disabled after enabling this option. Enable when VISA pin is muxed with USB OC"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmSlpStrchSusUp, "PCH Pm Slp Strch Sus Up", &EN_DIS,
Help "Enable SLP_X Stretching After SUS Well Power Up."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmSlpLanLowDc, "PCH Pm Slp Lan Low Dc", &EN_DIS,
Help "Enable/Disable SLP_LAN# Low on DC Power."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPwrBtnOverridePeriod, "PCH Pm Pwr Btn Override Period", HEX,
Help "PCH power button override period. 000b-4s, 001b-6s, 010b-8s, 011b-10s, 100b-12s, 101b-14s."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableDsxAcPresentPulldown, "PCH Pm Disable Dsx Ac Present Pulldown", &EN_DIS,
Help "When Disable, PCH will internal pull down AC_PRESENT in deep SX and during G3 exit."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableNativePowerButton, "PCH Pm Disable Native Power Button", &EN_DIS,
Help "Power button native mode disable."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmMeWakeSts, "PCH Pm ME_WAKE_STS", &EN_DIS,
Help "Clear the ME_WAKE_STS bit in the Power and Reset Status (PRSTS) register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmWolOvrWkSts, "PCH Pm WOL_OVR_WK_STS", &EN_DIS,
Help "Clear the WOL_OVR_WK_STS bit in the Power and Reset Status (PRSTS) register."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPwrCycDur, "PCH Pm Reset Power Cycle Duration", HEX,
Help "Could be customized in the unit of second. Please refer to EDS for all support settings. 0 is default, 1 is 1 second, 2 is 2 seconds, ..."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPmPciePllSsc, "PCH Pm Pcie Pll Ssc", HEX,
Help "Specifies the Pcie Pll Spread Spectrum Percentage. The default is 0xFF: AUTO - No BIOS override."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLegacyIoLowLatency, "PCH Legacy IO Low Latency Enable", &EN_DIS,
Help "Set to enable low latency of legacy IO. <b>0: Disable</b>, 1: Enable"
Combo $gPlatformFspPkgTokenSpaceGuid_SataPwrOptEnable, "PCH Sata Pwr Opt Enable", &EN_DIS,
Help "SATA Power Optimizer on PCH side."
Combo $gPlatformFspPkgTokenSpaceGuid_EsataSpeedLimit, "PCH Sata eSATA Speed Limit", &EN_DIS,
Help "When enabled, BIOS will configure the PxSCTL.SPD to 2 to limit the eSATA port speed."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataSpeedLimit, "PCH Sata Speed Limit", HEX,
Help "Indicates the maximum speed the SATA controller can support 0h: PchSataSpeedDefault."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsHotPlug, "Enable SATA Port HotPlug", HEX,
Help "Enable SATA Port HotPlug."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsInterlockSw, "Enable SATA Port Interlock Sw", HEX,
Help "Enable SATA Port Interlock Sw."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsExternal, "Enable SATA Port External", HEX,
Help "Enable SATA Port External."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsSpinUp, "Enable SATA Port SpinUp", HEX,
Help "Enable the COMRESET initialization Sequence to the device."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsSolidStateDrive, "Enable SATA Port Solid State Drive", HEX,
Help "0: HDD; 1: SSD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsEnableDitoConfig, "Enable SATA Port Enable Dito Config", HEX,
Help "Enable DEVSLP Idle Timeout settings (DmVal, DitoVal)."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDmVal, "Enable SATA Port DmVal", HEX,
Help "DITO multiplier. Default is 15."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsDitoVal, "Enable SATA Port DmVal", HEX,
Help "DEVSLP Idle Timeout (DITO), Default is 625."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataPortsZpOdd, "Enable SATA Port ZpOdd", HEX,
Help "Support zero power ODD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataRstRaidDeviceId, "PCH Sata Rst Raid Alternate Id", &EN_DIS,
Help "Enable RAID Alternate ID."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieEnable, "PCH Sata Rst Pcie Storage Remap enable", HEX,
Help "Enable Intel RST for PCIe Storage remapping."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieStoragePort, "PCH Sata Rst Pcie Storage Port", HEX,
Help "Intel RST for PCIe Storage remapping - PCIe Port Selection (1-based, 0 = autodetect)."
"Valid range: 0x00 ~ 0xFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataRstPcieDeviceResetDelay, "PCH Sata Rst Pcie Device Reset Delay", HEX,
Help "PCIe Storage Device Reset Delay in milliseconds. Default value is 100ms"
"Valid range: 0x00 ~ 0xFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UfsEnable, "UFS enable/disable", &EN_DIS,
Help "PCIe Storage Device Reset Delay in milliseconds. Default value is 100ms"
Combo $gPlatformFspPkgTokenSpaceGuid_IehMode, "IEH Mode", &gPlatformFspPkgTokenSpaceGuid_IehMode,
Help "Integrated Error Handler Mode, 0: Bypass, 1: Enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT0Level, "Thermal Throttling Custimized T0Level Value", HEX,
Help "Custimized T0Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT1Level, "Thermal Throttling Custimized T1Level Value", HEX,
Help "Custimized T1Level value."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchT2Level, "Thermal Throttling Custimized T2Level Value", HEX,
Help "Custimized T2Level value."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTEnable, "Enable The Thermal Throttle", &EN_DIS,
Help "Enable the thermal throttle function."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTState13Enable, "PMSync State 13", &EN_DIS,
Help "When set to 1 and the programmed GPIO pin is a 1, then PMSync state 13 will force at least T2 state."
Combo $gPlatformFspPkgTokenSpaceGuid_PchTTLock, "Thermal Throttle Lock", &EN_DIS,
Help "Thermal Throttle Lock."
Combo $gPlatformFspPkgTokenSpaceGuid_TTSuggestedSetting, "Thermal Throttling Suggested Setting", &EN_DIS,
Help "Thermal Throttling Suggested Setting."
Combo $gPlatformFspPkgTokenSpaceGuid_TTCrossThrottling, "Enable PCH Cross Throttling", &EN_DIS,
Help "Enable/Disable PCH Cross Throttling"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiTsawEn, "DMI Thermal Sensor Autonomous Width Enable", &EN_DIS,
Help "DMI Thermal Sensor Autonomous Width Enable."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiSuggestedSetting, "DMI Thermal Sensor Suggested Setting", &EN_DIS,
Help "DMT thermal sensor suggested representative values."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS0TW, "Thermal Sensor 0 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS0TW,
Help "Thermal Sensor 0 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS1TW, "Thermal Sensor 1 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS1TW,
Help "Thermal Sensor 1 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS2TW, "Thermal Sensor 2 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS2TW,
Help "Thermal Sensor 2 Target Width."
Combo $gPlatformFspPkgTokenSpaceGuid_DmiTS3TW, "Thermal Sensor 3 Target Width", &gPlatformFspPkgTokenSpaceGuid_DmiTS3TW,
Help "Thermal Sensor 3 Target Width."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T1M, "Port 0 T1 Multipler", HEX,
Help "Port 0 T1 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T2M, "Port 0 T2 Multipler", HEX,
Help "Port 0 T2 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0T3M, "Port 0 T3 Multipler", HEX,
Help "Port 0 T3 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0TDisp, "Port 0 Tdispatch", HEX,
Help "Port 0 Tdispatch."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T1M, "Port 1 T1 Multipler", HEX,
Help "Port 1 T1 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T2M, "Port 1 T2 Multipler", HEX,
Help "Port 1 T2 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1T3M, "Port 1 T3 Multipler", HEX,
Help "Port 1 T3 Multipler."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1TDisp, "Port 1 Tdispatch", HEX,
Help "Port 1 Tdispatch."
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP0Tinact, "Port 0 Tinactive", HEX,
Help "Port 0 Tinactive."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataP0TDispFinit, "Port 0 Alternate Fast Init Tdispatch", &EN_DIS,
Help "Port 0 Alternate Fast Init Tdispatch."
EditNum $gPlatformFspPkgTokenSpaceGuid_SataP1Tinact, "Port 1 Tinactive", HEX,
Help "Port 1 Tinactive."
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SataP1TDispFinit, "Port 1 Alternate Fast Init Tdispatch", &EN_DIS,
Help "Port 1 Alternate Fast Init Tdispatch."
Combo $gPlatformFspPkgTokenSpaceGuid_SataThermalSuggestedSetting, "Sata Thermal Throttling Suggested Setting", &EN_DIS,
Help "Sata Thermal Throttling Suggested Setting."
Combo $gPlatformFspPkgTokenSpaceGuid_PchMemoryThrottlingEnable, "Enable Memory Thermal Throttling", &EN_DIS,
Help "Enable Memory Thermal Throttling."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchMemoryPmsyncEnable, "Memory Thermal Throttling", HEX,
Help "Enable Memory Thermal Throttling."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchMemoryC0TransmitEnable, "Enable Memory Thermal Throttling", HEX,
Help "Enable Memory Thermal Throttling."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchMemoryPinSelection, "Enable Memory Thermal Throttling", HEX,
Help "Enable Memory Thermal Throttling."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchTemperatureHotLevel, "Thermal Device Temperature", HEX,
Help "Decides the temperature."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb2OverCurrentPin, "USB2 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USB 2.0 Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3OverCurrentPin, "USB3 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USB 3.0 Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrOverrideEnable, "Enable xHCI LTR override", &EN_DIS,
Help "Enables override of recommended LTR values for xHCI"
EditNum $gPlatformFspPkgTokenSpaceGuid_ThcMode, "Touch Host Controller Mode", HEX,
Help "Switch between Intel THC protocol and Industry standard HID Over SPI protocol. 0x0:Thc, 0x1:Hid"
"Valid range: 0 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrHighIdleTimeOverride, "xHCI High Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI High Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrMediumIdleTimeOverride, "xHCI Medium Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI Medium Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchUsbLtrLowIdleTimeOverride, "xHCI Low Idle Time LTR override", HEX,
Help "Value used for overriding LTR recommendation for xHCI Low Idle Time LTR setting"
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGating, "Enable 8254 Static Clock Gating", &EN_DIS,
Help "Set 8254CGE=1 is required for SLP_S0 support. However, set 8254CGE=1 in POST time might fail to boot legacy OS using 8254 timer. Make sure it is disabled to support legacy OS using 8254 timer. Also enable this while S0ix is enabled."
Combo $gPlatformFspPkgTokenSpaceGuid_Enable8254ClockGatingOnS3, "Enable 8254 Static Clock Gating On S3", &EN_DIS,
Help "This is only applicable when Enable8254ClockGating is disabled. FSP will do the 8254 CGE programming on S3 resume when Enable8254ClockGatingOnS3 is enabled. This avoids the SMI requirement for the programming."
Combo $gPlatformFspPkgTokenSpaceGuid_EnableTcoTimer, "Enable TCO timer.", &EN_DIS,
Help "When FALSE, it disables PCH ACPI timer, and stops TCO timer. NOTE: This will have huge power impact when it's enabled. If TCO timer is disabled, uCode ACPI timer emulation must be enabled, and WDAT table must not be exposed to the OS."
Combo $gPlatformFspPkgTokenSpaceGuid_HybridStorageMode, "Hybrid Storage Detection and Configuration Mode", &gPlatformFspPkgTokenSpaceGuid_HybridStorageMode,
Help "Enables support for Hybrid storage devices. 0: Disabled; 1: Dynamic Configuration. Default is 0: Disabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuRootportUsedForHybridStorage, "CPU Root Port used for Hybrid Storage", HEX,
Help "Specifies the CPU root port used for Hybrid storage."
"Valid range: 0x0 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PchRootportUsedForCpuAttach, "PCH Root Port used for Hybrid Storage when two lanes are connected to CPU", HEX,
Help "Specifies PCH Root Port used for Hybrid Storage when two lanes are connected to CPU."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchAcpiL6dPmeHandling, "PCH GPE event handler", &EN_DIS,
Help "Enabled _L6D ACPI handler. PME GPE is shared by multiple devices So BIOS must verify the same in the ASL handler by reading offset for PMEENABLE and PMESTATUS bit"
Combo $gPlatformFspPkgTokenSpaceGuid_PsOnEnable, "Enable PS_ON.", &EN_DIS,
Help "PS_ON is a new C10 state from the CPU on desktop SKUs that enables a lower power target that will be required by the California Energy Commission (CEC). When FALSE, PS_ON is to be disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_PmcCpuC10GatePinEnable, "Pmc Cpu C10 Gate Pin Enable", &EN_DIS,
Help "Enable/Disable platform support for CPU_C10_GATE# pin to control gating of CPU VccIO and VccSTG rails instead of SLP_S0# pin."
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl, "Pch Dmi Aspm Ctrl", &gPlatformFspPkgTokenSpaceGuid_PchDmiAspmCtrl,
Help "ASPM configuration on the PCH side of the DMI/OPI Link. Default is <b>PchPcieAspmL1</b>"
Combo $gPlatformFspPkgTokenSpaceGuid_PchDmiCwbEnable, "PchDmiCwbEnable", &EN_DIS,
Help "Central Write Buffer feature configurable and enabled by default"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcOsIdleEnable, "OS IDLE Mode Enable", &EN_DIS,
Help "Enable/Disable OS Idle Mode"
Combo $gPlatformFspPkgTokenSpaceGuid_PchS0ixAutoDemotion, "S0ix Auto-Demotion", &EN_DIS,
Help "Enable/Disable the Low Power Mode Auto-Demotion Host Control feature."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmLatchEventsC10Exit, "Latch Events C10 Exit", &EN_DIS,
Help "When this bit is set to 1, SLP_S0# entry events in SLP_S0_DEBUG_REGx registers are captured on C10 exit (instead of C10 entry which is default)"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrEn, "PMC ADR enable", &EN_DIS,
Help "Enable/disable asynchronous DRAM refresh"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrTimerEn, "PMC ADR timer configuration enable", &EN_DIS,
Help "Enable/disable ADR timer configuration"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrTimer1Val, "PMC ADR phase 1 timer value", HEX,
Help "Enable/disable ADR timer configuration"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrMultiplier1Val, "PMC ADR phase 1 timer multiplier value", HEX,
Help "Specify the multiplier value for phase 1 ADR timer"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrHostPartitionReset, "PMC ADR host reset partition enable", &EN_DIS,
Help "Specify whether PMC should set ADR_RST_STS bit after receiving Reset_Warn_Ack DMI message"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcOverride, "PMC ADR source select override enable", &EN_DIS,
Help "Tells the FSP to update the source select with platform value"
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcAdrSrcSel, "PMC ADR source selection", HEX,
Help "Specify which sources should cause ADR flow"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCm, "PCIE Eq Ph3 Lane Param Cm", HEX,
Help "CPU_PCIE_EQ_LANE_PARAM. Coefficient C-1."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieEqPh3LaneParamCp, "PCIE Eq Ph3 Lane Param Cp", HEX,
Help "CPU_PCIE_EQ_LANE_PARAM. Coefficient C+1."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3RootPortPreset, "Gen3 Root port preset values per lane", HEX,
Help "Used for programming Pcie Gen3 preset values per lane. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4RootPortPreset, "Pcie Gen4 Root port preset values per lane", HEX,
Help "Used for programming Pcie Gen4 preset values per lane. Range: 0-9, 8 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointPreset, "Pcie Gen3 End port preset values per lane", HEX,
Help "Used for programming Pcie Gen3 preset values per lane. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointPreset, "Pcie Gen4 End port preset values per lane", HEX,
Help "Used for programming Pcie Gen4 preset values per lane. Range: 0-9, 7 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen3EndPointHint, "Pcie Gen3 End port Hint values per lane", HEX,
Help "Used for programming Pcie Gen3 Hint values per lane. Range: 0-6, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieGen4EndPointHint, "Pcie Gen4 End port Hint values per lane", HEX,
Help "Used for programming Pcie Gen4 Hint values per lane. Range: 0-6, 2 is default for each lane"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieFiaProgramming, "CPU PCIe Fia Programming", &EN_DIS,
Help "Load Fia configuration if enable. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieClockGating, "CPU PCIe RootPort Clock Gating", &EN_DIS,
Help "Describes whether the PCI Express Clock Gating for each root port is enabled by platform modules. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPciePowerGating, "CPU PCIe RootPort Power Gating", &EN_DIS,
Help "Describes whether the PCI Express Power Gating for each root port is enabled by platform modules. 0: Disable; 1: Enable(Default)."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieComplianceTestMode, "PCIE Compliance Test Mode", &EN_DIS,
Help "Compliance Test Mode shall be enabled when using Compliance Load Board."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieEnablePeerMemoryWrite, "PCIE Enable Peer Memory Write", &EN_DIS,
Help "This member describes whether Peer Memory Writes are enabled on the platform."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpFunctionSwap, "PCIE Rp Function Swap", &EN_DIS,
Help "Allows BIOS to use root port function number swapping when root port of function 0 is disabled."
Combo $gPlatformFspPkgTokenSpaceGuid_CpuPcieSlotSelection, "PCI Express Slot Selection", &EN_DIS,
Help "Select the PCIe M2 or CEMx4 slot.0: CEMx4 slot; 1: M2 slot(Default)."
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieDeviceOverrideTablePtr, "CPU PCIE device override table pointer", HEX,
Help "The PCIe device table is being used to override PCIe device ASPM settings. This is a pointer points to a 32bit address. And it's only used in PostMem phase. Please refer to CPU_PCIE_DEVICE_OVERRIDE structure for the table. Last entry VendorId must be 0."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpHotPlug, "Enable PCIE RP HotPlug", HEX,
Help "Indicate whether the root port is hot plug available."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPmSci, "Enable PCIE RP Pm Sci", HEX,
Help "Indicate whether the root port power manager SCI is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpTransmitterHalfSwing, "Enable PCIE RP Transmitter Half Swing", HEX,
Help "Indicate whether the Transmitter Half Swing is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAcsEnabled, "PCIE RP Access Control Services Extended Capability", HEX,
Help "Enable/Disable PCIE RP Access Control Services Extended Capability"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpEnableCpm, "PCIE RP Clock Power Management", HEX,
Help "Enable/Disable PCIE RP Clock Power Management, even if disabled, CLKREQ# signal can still be controlled by L1 PM substates mechanism"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAdvancedErrorReporting, "PCIE RP Advanced Error Report", HEX,
Help "Indicate whether the Advanced Error Reporting is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpUnsupportedRequestReport, "PCIE RP Unsupported Request Report", HEX,
Help "Indicate whether the Unsupported Request Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpFatalErrorReport, "PCIE RP Fatal Error Report", HEX,
Help "Indicate whether the Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpNoFatalErrorReport, "PCIE RP No Fatal Error Report", HEX,
Help "Indicate whether the No Fatal Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpCorrectableErrorReport, "PCIE RP Correctable Error Report", HEX,
Help "Indicate whether the Correctable Error Report is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnFatalError, "PCIE RP System Error On Fatal Error", HEX,
Help "Indicate whether the System Error on Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnNonFatalError, "PCIE RP System Error On Non Fatal Error", HEX,
Help "Indicate whether the System Error on Non Fatal Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSystemErrorOnCorrectableError, "PCIE RP System Error On Correctable Error", HEX,
Help "Indicate whether the System Error on Correctable Error is enabled."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMaxPayload, "PCIE RP Max Payload", HEX,
Help "Max Payload Size supported, Default 128B, see enum CPU_PCIE_MAX_PAYLOAD."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcEnabled, "DPC for PCIE RP Mask", HEX,
Help "Enable/disable Downstream Port Containment for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDpcExtensionsEnabled, "DPC Extensions PCIE RP Mask", HEX,
Help "Enable/disable DPC Extensions for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpSlotImplemented, "CPU PCIe root port connection type", HEX,
Help "0: built-in device, 1:slot"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen3EqPh3Method, "PCIE RP Gen3 Equalization Phase Method", HEX,
Help "PCIe Gen3 Eq Ph3 Method (see CPU_PCIE_EQ_METHOD). 0: DEPRECATED, hardware equalization; 1: hardware equalization; 4: Fixed Coeficients."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpGen4EqPh3Method, "PCIE RP Gen4 Equalization Phase Method", HEX,
Help "PCIe Gen4 Eq Ph3 Method (see CPU_PCIE_EQ_METHOD). 0: DEPRECATED, hardware equalization; 1: hardware equalization; 4: Fixed Coeficients."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPhysicalSlotNumber, "PCIE RP Physical Slot Number", HEX,
Help "Indicates the slot number for the root port. Default is the value as root port index."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpAspm, "PCIE RP Aspm", HEX,
Help "The ASPM configuration of the root port (see: CPU_PCIE_ASPM_CONTROL).0: Disable; 1: CpuPcieAspmL0s; 2: CpuPcieAspmL1; 3:CpuPcieAspmL0sL1(Default)"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpL1Substates, "PCIE RP L1 Substates", HEX,
Help "The L1 Substates configuration of the root port (see: CPU_PCIE_L1SUBSTATES_CONTROL). Default is CpuPcieL1SubstatesL1_1_2."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrEnable, "PCIE RP Ltr Enable", HEX,
Help "Latency Tolerance Reporting Mechanism."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpLtrConfigLock, "PCIE RP Ltr Config Lock", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpPtmEnabled, "PTM for PCIE RP Mask", HEX,
Help "Enable/disable Precision Time Measurement for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpDetectTimeoutMs, "PCIE RP Detect Timeout Ms", HEX,
Help "The number of milliseconds within 0~65535 in reference code will wait for link to exit Detect state for enabled ports before assuming there is no device and potentially disabling the port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuPcieRpMultiVcEnabled, "Multi-VC for PCIE RP Mask", HEX,
Help "Enable/disable Multiple Virtual Channel for PCIE Root Ports. 0: disable, 1: enable. One bit for each port, bit0 for port1, bit1 for port2, and so on."
"Valid range: 0x00 ~ 0x00FFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 3", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 3, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate3UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 3", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 3, HSIO_TX_DWORD9[6:0], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 2", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 2, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate2UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 2", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 2, HSIO_TX_DWORD9[14:8], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 1", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 1, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate1UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 1", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 1, HSIO_TX_DWORD9[22:16], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTranEnable, "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 0", HEX,
Help "Enable the write to USB 3.0 TX Output Unique Transition Bit Mode for rate 0, Each value in array can be between 0-1. One byte for each port."
"Valid range: 0x00 ~ 0x01010101010101010101"
EditNum $gPlatformFspPkgTokenSpaceGuid_Usb3HsioTxRate0UniqTran, "USB 3.0 TX Output Unique Transition Bit Scale for rate 0", HEX,
Help "USB 3.0 TX Output Unique Transition Bit Scale for rate 0, HSIO_TX_DWORD9[30:24], <b>Default = 4Ch</b>. One byte for each port."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownGlobalSmi, "Enable LOCKDOWN SMI", &EN_DIS,
Help "Enable SMI_LOCK bit to prevent writes to the Global SMI Enable bit."
Combo $gPlatformFspPkgTokenSpaceGuid_PchLockDownBiosInterface, "Enable LOCKDOWN BIOS Interface", &EN_DIS,
Help "Enable BIOS Interface Lock Down bit to prevent writes to the Backup Control Register."
Combo $gPlatformFspPkgTokenSpaceGuid_PchUnlockGpioPads, "Unlock all GPIO pads", &EN_DIS,
Help "Force all GPIO pads to be unlocked for debug purpose."
Combo $gPlatformFspPkgTokenSpaceGuid_PchSbAccessUnlock, "PCH Unlock SideBand access", &EN_DIS,
Help "The SideBand PortID mask for certain end point (e.g. PSFx) will be locked before 3rd party code execution. 0: Lock SideBand access; 1: Unlock SideBand access."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxSnoopLatency, "PCIE RP Ltr Max Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpLtrMaxNoSnoopLatency, "PCIE RP Ltr Max No Snoop Latency", HEX,
Help "Latency Tolerance Reporting, Max Non-Snoop Latency."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMode, "PCIE RP Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideMultiplier, "PCIE RP Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSnoopLatencyOverrideValue, "PCIE RP Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMode, "PCIE RP Non Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideMultiplier, "PCIE RP Non Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpNonSnoopLatencyOverrideValue, "PCIE RP Non Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitScale, "PCIE RP Slot Power Limit Scale", HEX,
Help "Specifies scale used for slot power limit value. Leave as 0 to set to default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_PcieRpSlotPowerLimitValue, "PCIE RP Slot Power Limit Value", HEX,
Help "Specifies upper limit on power supplie by slot. Leave as 0 to set to default."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieEnablePort8xhDecode, "PCIE RP Enable Port8xh Decode", &EN_DIS,
Help "This member describes whether PCIE root port Port 8xh Decode is enabled. 0: Disable; 1: Enable."
EditNum $gPlatformFspPkgTokenSpaceGuid_PchPciePort8xhDecodePortIndex, "PCIE Port8xh Decode Port Index", HEX,
Help "The Index of PCIe Port that is selected for Port8xh Decode (0 Based)."
"Valid range: 0x0 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchPmDisableEnergyReport, "PCH Energy Reporting", &EN_DIS,
Help "Disable/Enable PCH to CPU energy report feature."
Combo $gPlatformFspPkgTokenSpaceGuid_SataTestMode, "PCH Sata Test Mode", &EN_DIS,
Help "Allow entrance to the PCH SATA test modes."
Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciOcLock, "PCH USB OverCurrent mapping lock enable", &EN_DIS,
Help "If this policy option is enabled then BIOS will program OCCFDONE bit in xHCI meaning that OC mapping data will be consumed by xHCI and OC mapping registers will be locked."
EditNum $gPlatformFspPkgTokenSpaceGuid_PmcLpmS0ixSubStateEnableMask, "Low Power Mode Enable/Disable config mask", HEX,
Help "Configure if respective S0i2/3 sub-states are to be supported. Each bit corresponds to one sub-state (LPMx - BITx): LPM0-s0i2.0, LPM1-s0i2.1, LPM2-s0i2.2, LPM3-s0i3.0, LPM4-s0i3.1, LPM5-s0i3.2, LPM6-s0i3.3, LPM7-s0i3.4."
"Valid range: 0x00 ~ 0xFF"
EndPage
Page "USB-C/Thunderbolt (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_PcieMultipleSegmentEnabled, "iTBT PCIe Multiple Segment setting", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie0En, "TCSS Thunderbolt PCIE Root Port 0 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 0. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie1En, "TCSS Thunderbolt PCIE Root Port 1 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 1. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie2En, "TCSS Thunderbolt PCIE Root Port 2 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 2. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssItbtPcie3En, "TCSS Thunderbolt PCIE Root Port 3 Enable", &EN_DIS,
Help "Set TCSS Thunderbolt PCIE Root Port 3. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssXhciEn, "TCSS USB HOST (xHCI) Enable", &EN_DIS,
Help "Set TCSS XHCI. 0:Disabled 1:Enabled - Must be enabled if xDCI is enabled below"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssXdciEn, "TCSS USB DEVICE (xDCI) Enable", &EN_DIS,
Help "Set TCSS XDCI. 0:Disabled 1:Enabled - xHCI must be enabled if xDCI is enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssDma0En, "TCSS DMA0 Enable", &EN_DIS,
Help "Set TCSS DMA0. 0:Disabled 1:Enabled"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssDma1En, "TCSS DMA1 Enable", &EN_DIS,
Help "Set TCSS DMA1. 0:Disabled 1:Enabled"
EditNum $gPlatformFspPkgTokenSpaceGuid_UsbTcPortEnPreMem, "TCSS USB Port Enable", HEX,
Help "Bitmap for per port enabling"
"Valid range: 0x0 ~ 0x000F"
EndPage
Page "USB-C/Thunderbolt (Post-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_D3HotEnable, "Enable D3 Hot in TCSS ", &EN_DIS,
Help "This policy will enable/disable D3 hot support in IOM"
EditNum $gPlatformFspPkgTokenSpaceGuid_IomTypeCPortPadCfg, "TypeC port GPIO setting", HEX,
Help "GPIO Ping number for Type C Aux Oritation setting, use the GpioPad that is defined in GpioPinsXXXH.h and GpioPinsXXXLp.h as argument.(XXX is platform name, Ex: Adl = AlderLake)"
"Valid range: 0 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_CpuUsb3OverCurrentPin, "CPU USB3 Port Over Current Pin", HEX,
Help "Describe the specific over current pin number of USBC Port N."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_D3ColdEnable, "Enable D3 Cold in TCSS ", &EN_DIS,
Help "This policy will enable/disable D3 cold support in IOM"
Combo $gPlatformFspPkgTokenSpaceGuid_ITbtPcieTunnelingForUsb4, "Enable/Disable PCIe tunneling for USB4", &EN_DIS,
Help "Enable/Disable PCIe tunneling for USB4, default is enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcCstateLimit, "TC State in TCSS ", HEX,
Help "This TC C-State Limit in IOM"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VbtSize, "Intel Graphics VBT (Video BIOS Table) Size", HEX,
Help "Size of Internal Graphics VBT Image"
"Valid range: 0x0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_LidStatus, "Platform LID Status for LFP Displays.", &gPlatformFspPkgTokenSpaceGuid_LidStatus,
Help "LFP Display Lid Status (LID_STATUS enum): 0 (Default): LidClosed, 1: LidOpen."
EditNum $gPlatformFspPkgTokenSpaceGuid_IomStayInTCColdSeconds, "Set Iom stay in TC cold seconds in TCSS ", HEX,
Help "Set Iom stay in TC cold seconds in IOM"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IomBeforeEnteringTCColdSeconds, "Set Iom before entering TC cold seconds in TCSS ", HEX,
Help "Set Iom before entering TC cold seconds in IOM"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdEnable, "Enable VMD controller", &EN_DIS,
Help "Enable/disable to VMD controller.0: Disable; 1: Enable(Default)"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdPort, "Map port under VMD", &EN_DIS,
Help "Map/UnMap port under VMD"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdPortDev, "VMD Port Device", DEC,
Help "VMD Root port device number."
"Valid range: 0 ~ 31"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdPortFunc, "VMD Port Func", DEC,
Help "VMD Root port function number."
"Valid range: 0 ~ 7"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarSize, "VMD Config Bar size", DEC,
Help "Set The VMD Config Bar Size."
"Valid range: 20 ~ 28"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr, "VMD Config Bar Attributes", &gPlatformFspPkgTokenSpaceGuid_VmdCfgBarAttr,
Help "0: VMD_32BIT_NONPREFETCH, 1: VMD_64BIT_NONPREFETCH(Default), 2: VMD_64BIT_PREFETCH"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize1, "VMD Mem Bar1 size", DEC,
Help "Set The VMD Mem Bar1 Size."
"Valid range: 12 ~ 47"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr, "VMD Mem Bar1 Attributes", &gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Attr,
Help "0: VMD_32BIT_NONPREFETCH(Default), 1: VMD_64BIT_NONPREFETCH, 2: VMD_64BIT_PREFETCH"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBarSize2, "VMD Mem Bar2 size", DEC,
Help "Set The VMD Mem Bar2 Size."
"Valid range: 12 ~ 47"
Combo $gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr, "VMD Mem Bar2 Attributes", &gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Attr,
Help "0: VMD_32BIT_NONPREFETCH, 1: VMD_64BIT_NONPREFETCH(Default), 2: VMD_64BIT_PREFETCH"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdVariablePtr, "VMD Variable", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdCfgBarBase, "Temporary CfgBar address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar1Base, "Temporary MemBar1 address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_VmdMemBar2Base, "Temporary MemBar2 address for VMD", HEX,
Help "VMD Variable Pointer."
"Valid range: 0x00 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_TcssCpuUsbPdoProgramming, "TCSS CPU USB PDO Programming", &EN_DIS,
Help "Enable/disable PDO programming for TCSS CPU USB in PEI phase. Disabling will allow for programming during later phase. 1: enable, 0: disable"
Combo $gPlatformFspPkgTokenSpaceGuid_PmcPdEnable, "Enable/Disable PMC-PD Solution ", &EN_DIS,
Help "This policy will enable/disable PMC-PD Solution vs EC-TCPC Solution"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssAuxOri, "TCSS Aux Orientation Override Enable", HEX,
Help "Bits 0, 2, ... 10 control override enables, bits 1, 3, ... 11 control overrides"
"Valid range: 0x0 ~ 0x0FFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TcssHslOri, "TCSS HSL Orientation Override Enable", HEX,
Help "Bits 0, 2, ... 10 control override enables, bits 1, 3, ... 11 control overrides"
"Valid range: 0x0 ~ 0x0FFF"
Combo $gPlatformFspPkgTokenSpaceGuid_UsbOverride, "USB override in IOM ", &EN_DIS,
Help "This policy will enable/disable USB Connect override in IOM"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtPcieRootPortEn, "ITBT Root Port Enable", HEX,
Help "ITBT Root Port Enable, 0:Disable, 1:Enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_UsbTcPortEn, "TCSS USB Port Enable", HEX,
Help "Bits 0, 1, ... max Type C port control enables"
"Valid range: 0x0 ~ 0x000F"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtForcePowerOnTimeoutInMs, "ITBTForcePowerOn Timeout value", HEX,
Help "ITBTForcePowerOn value. Specified increment values in miliseconds. Range is 0-1000. 100 = 100 ms."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtConnectTopologyTimeoutInMs, "ITbtConnectTopology Timeout value", HEX,
Help "ITbtConnectTopologyTimeout value. Specified increment values in miliseconds. Range is 0-10000. 100 = 100 ms."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_VccSt, "VCCST request for IOM ", &EN_DIS,
Help "This policy will enable/disable VCCST and also decides if message would be replayed in S4/S5"
EditNum $gPlatformFspPkgTokenSpaceGuid_ITbtDmaLtr, "ITBT DMA LTR", HEX,
Help "TCSS DMA1, DMA2 LTR value"
"Valid range: 0x0 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PtmEnabled, "Enable/Disable PTM", &EN_DIS,
Help "This policy will enable/disable Precision Time Measurement for TCSS PCIe Root Ports"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrEnable, "PCIE RP Ltr Enable", HEX,
Help "Latency Tolerance Reporting Mechanism."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMode, "PCIE RP Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideMultiplier, "PCIE RP Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpSnoopLatencyOverrideValue, "PCIE RP Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMode, "PCIE RP Non Snoop Latency Override Mode", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Mode."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideMultiplier, "PCIE RP Non Snoop Latency Override Multiplier", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Multiplier."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpNonSnoopLatencyOverrideValue, "PCIE RP Non Snoop Latency Override Value", HEX,
Help "Latency Tolerance Reporting, Non-Snoop Latency Override Value."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpForceLtrOverride, "Force LTR Override", HEX,
Help "Force LTR Override."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SaPcieItbtRpLtrConfigLock, "PCIE RP Ltr Config Lock", HEX,
Help "0: Disable; 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_EnableTcssCovTypeA, "Type C Port x Convert to TypeA", &EN_DIS,
Help "Enable / Disable(default) Type C Port x Convert to TypeA"
EditNum $gPlatformFspPkgTokenSpaceGuid_MappingPchXhciUsbA, "PCH xhci port x for Type C Port x mapping", HEX,
Help "input PCH xhci port x for Type C Port 0 mapping."
"Valid range: 0x0 ~ 0xFF"
EndPage
Page "Security (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_BiosGuard, "BiosGuard", &EN_DIS,
Help "Enable/Disable. 0: Disable, Enable/Disable BIOS Guard feature, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_Txt, "Txt", &EN_DIS,
Help "Enable/Disable. 0: Disable, Enable/Disable Txt feature, 1: enable"
EditNum $gPlatformFspPkgTokenSpaceGuid_PrmrrSize, "PrmrrSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of PrmrrSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_SinitMemorySize, "SinitMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of SinitMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtDprMemoryBase, "TxtDprMemoryBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtDprMemoryBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtHeapMemorySize, "TxtHeapMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtHeapMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtDprMemorySize, "TxtDprMemorySize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtDprMemorySize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosAcmBase, "BiosAcmBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosAcmSize, "BiosAcmSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_ApStartupBase, "ApStartupBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of BiosAcmBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TgaSize, "TgaSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TgaSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtLcpPdBase, "TxtLcpPdBase", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtLcpPdBase , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_TxtLcpPdSize, "TxtLcpPdSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TxtLcpPdSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_IsTPMPresence, "IsTPMPresence", HEX,
Help "IsTPMPresence default values"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ReservedSecurityPreMem, "ReservedSecurityPreMem", &EN_DIS,
Help "Reserved for Security Pre-Mem"
EditNum $gPlatformFspPkgTokenSpaceGuid_TotalFlashSize, "TotalFlashSize", HEX,
Help "Enable/Disable. 0: Disable, define default value of TotalFlashSize , 1: enable"
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_BiosSize, "BiosSize", HEX,
Help "The size of the BIOS region of the IFWI. Used if FspmUpd->FspmConfig.BiosGuard != 0. If BiosGuard is enabled, MRC will increase the size of the DPR (DMA Protected Range) so that a BIOS Update Script can be stored in the DPR."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SecurityTestRsvd, "SecurityTestRsvd", &EN_DIS,
Help "Reserved for SA Pre-Mem Test"
EndPage
Page "ME (Pre-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_HeciTimeouts, "HECI Timeouts", &EN_DIS,
Help "0: Disable, 1: Enable (Default) timeout check for HECI"
EditNum $gPlatformFspPkgTokenSpaceGuid_Heci1BarAddress, "HECI1 BAR address", HEX,
Help "BAR address of HECI1"
"Valid range: 0x00 ~ 0xFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Heci2BarAddress, "HECI2 BAR address", HEX,
Help "BAR address of HECI2"
"Valid range: 0x00 ~ 0xFFFFFFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_Heci3BarAddress, "HECI3 BAR address", HEX,
Help "BAR address of HECI3"
"Valid range: 0x00 ~ 0xFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_DidInitStat, "Force ME DID Init Status", &EN_DIS,
Help "Test, 0: disable, 1: Success, 2: No Memory in Channels, 3: Memory Init Error, Set ME DID init stat value"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableCpuReplacedPolling, "CPU Replaced Polling Disable", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option disables CPU replacement polling loop"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableMessageCheck, "Check HECI message before send", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable/Disable message check."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipMbpHob, "Skip MBP HOB", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable/Disable MOB HOB."
Combo $gPlatformFspPkgTokenSpaceGuid_HeciCommunication2, "HECI2 Interface Communication", &EN_DIS,
Help "Test, 0: disable, 1: enable, Adds or Removes HECI2 Device from PCI space."
Combo $gPlatformFspPkgTokenSpaceGuid_KtDeviceEnable, "Enable KT device", &EN_DIS,
Help "Test, 0: disable, 1: enable, Enable or Disable KT device."
Combo $gPlatformFspPkgTokenSpaceGuid_SkipCpuReplacementCheck, "Skip CPU replacement check", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option to skip CPU replacement check"
EndPage
Page "ME (Post-Mem)"
Combo $gPlatformFspPkgTokenSpaceGuid_AmtEnabled, "AMT Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable or disable AMT functionality."
Combo $gPlatformFspPkgTokenSpaceGuid_WatchDogEnabled, "WatchDog Timer Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable or disable WatchDog timer. Setting is invalid if AmtEnabled is 0."
Combo $gPlatformFspPkgTokenSpaceGuid_FwProgress, "PET Progress", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Enable/Disable PET Events Progress to receive PET Events. Setting is invalid if AmtEnabled is 0."
Combo $gPlatformFspPkgTokenSpaceGuid_AmtSolEnabled, "SOL Switch", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Serial Over Lan enable/disable state by Mebx. Setting is invalid if AmtEnabled is 0."
EditNum $gPlatformFspPkgTokenSpaceGuid_WatchDogTimerOs, "OS Timer", HEX,
Help "16 bits Value, Set OS watchdog timer. Setting is invalid if AmtEnabled is 0."
"Valid range: 0x00 ~ 0xFFFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_WatchDogTimerBios, "BIOS Timer", HEX,
Help "16 bits Value, Set BIOS watchdog timer. Setting is invalid if AmtEnabled is 0."
"Valid range: 0x00 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_ForcMebxSyncUp, "Force MEBX execution", &EN_DIS,
Help "Enable/Disable. 0: Disable, 1: enable, Force MEBX execution."
Combo $gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear, "ME Unconfig on RTC clear", &gPlatformFspPkgTokenSpaceGuid_MeUnconfigOnRtcClear,
Help "0: Disable ME Unconfig On Rtc Clear. <b>1: Enable ME Unconfig On Rtc Clear</b>. 2: Cmos is clear, status unkonwn. 3: Reserved"
Combo $gPlatformFspPkgTokenSpaceGuid_EnforceEDebugMode, "Enforce Enhanced Debug Mode", &EN_DIS,
Help "Determine if ME should enter Enhanced Debug Mode. <b>0: disable</b>, 1: enable"
Combo $gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage, "End of Post message", &gPlatformFspPkgTokenSpaceGuid_EndOfPostMessage,
Help "Test, Send End of Post message. Disable(0x0): Disable EOP message, Send in PEI(0x1): EOP send in PEI, Send in DXE(0x2)(Default): EOP send in DXE"
Combo $gPlatformFspPkgTokenSpaceGuid_DisableD0I3SettingForHeci, "D0I3 Setting for HECI Disable", &EN_DIS,
Help "Test, 0: disable, 1: enable, Setting this option disables setting D0I3 bit for all HECI devices"
Combo $gPlatformFspPkgTokenSpaceGuid_MctpBroadcastCycle, "Mctp Broadcast Cycle", &EN_DIS,
Help "Test, Determine if MCTP Broadcast is enabled <b>0: Disable</b>; 1: Enable."
EndPage
Page "Debug"
Combo $gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent, "Platform Debug Consent", &gPlatformFspPkgTokenSpaceGuid_PlatformDebugConsent,
Help "Enabled(All Probes+TraceHub) supports all probes with TraceHub enabled and blocks s0ix\n\nEnabled(Low Power) does not support DCI OOB 4-wire and Tracehub is powergated by default, s0ix is viable\n\nManual:user needs to configure Advanced Debug Settings manually, aimed at advanced users"
Combo $gPlatformFspPkgTokenSpaceGuid_DciEn, "DCI Enable", &EN_DIS,
Help "Determine if to enable DCI debug from host"
Combo $gPlatformFspPkgTokenSpaceGuid_DciDbcMode, "DCI DbC Mode", &gPlatformFspPkgTokenSpaceGuid_DciDbcMode,
Help "Disabled: Clear both USB2/3DBCEN; USB2: set USB2DBCEN; USB3: set USB3DBCEN; Both: Set both USB2/3DBCEN; No Change: Comply with HW value"
Combo $gPlatformFspPkgTokenSpaceGuid_DciModphyPg, "Enable DCI ModPHY Power Gate", &EN_DIS,
Help "DEPRECATED"
Combo $gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg, "USB3 Type-C UFP2DFP Kernel/Platform Debug Support", &gPlatformFspPkgTokenSpaceGuid_DciUsb3TypecUfpDbg,
Help "This BIOS option enables kernel and platform debug for USB3 interface over a UFP Type-C receptacle, select 'No Change' will do nothing to UFP2DFP setting."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber, "UART Number For Debug Purpose", &gPlatformFspPkgTokenSpaceGuid_SerialIoDebugUartNumber,
Help "UART number for debug purpose. 0:UART0, 1:UART1, 2:UART2, 3:UART3, 4:UART4, 5:UART5, 6:UART6. Note: If UART0 is selected as CNVi BT Core interface, it cannot be used for debug purpose."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDbg2, "Serial IO UART DBG2 table", HEX,
Help "Enable or disable Serial Io UART DBG2 table, default is Disable; <b>0: Disable;</b> 1: Enable."
"Valid range: 0x00 ~ 0xFFFFFFFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_CpuCrashLogEnable, "Enable/Disable CrashLog", &EN_DIS,
Help "Enable(Default): Enable CPU CrashLog, Disable: Disable CPU CrashLog"
EditNum $gPlatformFspPkgTokenSpaceGuid_ProcessorTraceMemSize, "Memory size per thread allocated for Processor Trace", HEX,
Help "Memory size per thread for Processor Trace. Processor Trace requires 2^N alignment and size in bytes per thread, from 4KB to 128MB.\n<b> 0xff:none </b>, 0:4k, 0x1:8k, 0x2:16k, 0x3:32k, 0x4:64k, 0x5:128k, 0x6:256k, 0x7:512k, 0x8:1M, 0x9:2M, 0xa:4M. 0xb:8M, 0xc:16M, 0xd:32M, 0xe:64M, 0xf:128M"
"Valid range: 0x00 ~ 0xFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PchLpcEnhancePort8xhDecoding, "PCH LPC Enhanced Port 80 Decoding", &EN_DIS,
Help "Original LPC only decodes one byte of port 80h."
Combo $gPlatformFspPkgTokenSpaceGuid_PchPort80Route, "PCH Port80 Route", &gPlatformFspPkgTokenSpaceGuid_PchPort80Route,
Help "Control where the Port 80h cycles are sent, 0: LPC; 1: PCI."
EditNum $gPlatformFspPkgTokenSpaceGuid_PcdDebugInterfaceFlags, "Debug Interfaces", HEX,
Help "Debug Interfaces. BIT0-RAM, BIT1-UART, BIT3-USB3, BIT4-Serial IO, BIT5-TraceHub, BIT2 - Not used."
"Valid range: 0x00 ~ 0x3F"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber, "Serial Io Uart Debug Controller Number", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugControllerNumber,
Help "Select SerialIo Uart Controller for debug. Note: If UART0 is selected as CNVi BT Core interface, it cannot be used for debug purpose."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugAutoFlow, "Serial Io Uart Debug Auto Flow", &EN_DIS,
Help "Enables UART hardware flow control, CTS and RTS lines."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugBaudRate, "Serial Io Uart Debug BaudRate", DEC,
Help "Set default BaudRate Supported from 0 - default to 6000000. Recommended values 9600, 19200, 57600, 115200, 460800, 921600, 1500000, 1843200, 3000000, 3686400, 6000000"
"Valid range: 0 ~ 6000000"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity, "Serial Io Uart Debug Parity", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugParity,
Help "Set default Parity."
Combo $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits, "Serial Io Uart Debug Stop Bits", &gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugStopBits,
Help "Set default stop bits."
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugDataBits, "Serial Io Uart Debug Data Bits", HEX,
Help "Set default word length. 0: Default, 5,6,7,8"
"Valid range: 0x0 ~ 0x08"
EditNum $gPlatformFspPkgTokenSpaceGuid_SerialIoUartDebugMmioBase, "Serial Io Uart Debug Mmio Base", HEX,
Help "Select SerialIo Uart default MMIO resource in SEC/PEI phase when PcdSerialIoUartMode = SerialIoUartPci."
"Valid range: 0 ~ 0xFFFFFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate, "PcdSerialDebugBaudRate", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugBaudRate,
Help "Baud Rate for Serial Debug Messages. 3:9600, 4:19200, 6:56700, 7:115200."
Combo $gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel, "PcdSerialDebugLevel", &gPlatformFspPkgTokenSpaceGuid_PcdSerialDebugLevel,
Help "Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
EditNum $gPlatformFspPkgTokenSpaceGuid_PostCodeOutputPort, "Post Code Output Port", HEX,
Help "This option configures Post Code Output Port"
"Valid range: 0x0 ~ 0xFFFF"
Combo $gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel, "SerialDebugMrcLevel", &gPlatformFspPkgTokenSpaceGuid_SerialDebugMrcLevel,
Help "MRC Serial Debug Message Level. 0:Disable, 1:Error Only, 2:Error & Warnings, 3:Load, Error, Warnings & Info, 4:Load, Error, Warnings, Info & Event, 5:Load, Error, Warnings, Info & Verbose."
Combo $gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc, "Ddr4OneDpc", &gPlatformFspPkgTokenSpaceGuid_Ddr4OneDpc,
Help "DDR4 1DPC performance feature for 2R DIMMs. Can be enabled on DIMM0 or DIMM1 only, or on both (default)"
EditNum $gPlatformFspPkgTokenSpaceGuid_Lfsr1Mask, "RH pTRR LFSR1 Mask", HEX,
Help "Row Hammer pTRR LFSR1 Mask, 1/2^(value)"
"Valid range: 0x01 ~ 0xF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LpddrRttWr, "LPDDR ODT RttWr", HEX,
Help "Initial RttWr for LP4/5 in Ohms. 0x0 - Auto"
"Valid range: 0x00 ~ 0xFF"
EditNum $gPlatformFspPkgTokenSpaceGuid_LpddrRttCa, "LPDDR ODT RttCa", HEX,
Help "Initial RttCa for LP4/5 in Ohms. 0x0 - Auto"
"Valid range: 0x00 ~ 0xFF"
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