Tiger Lake - IoT FSP 5143_01_MR6

TigerLakeFspBinPkg/TGL_IOT/Fsp.bsf

@@ -829,7 +829,7 @@ StructDef
         $gPlatformFspPkgTokenSpaceGuid_PchEspiLockLinkConfiguration    1 bytes    $_DEFAULT_ = 0x01
         $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable   1 bytes    $_DEFAULT_ = 0x00
         $gPlatformFspPkgTokenSpaceGuid_EnforceEDebugMode               1 bytes    $_DEFAULT_ = 0x00
-        $gPlatformFspPkgTokenSpaceGuid_PchPostMemRsvd                  1 bytes    $_DEFAULT_ = 0x00
+        $gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable               1 bytes    $_DEFAULT_ = 0x0
         $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase   4 bytes    $_DEFAULT_ = 0xF8000000
         $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeLimit   4 bytes    $_DEFAULT_ = 0xF9FFFFFF
         $gPlatformFspPkgTokenSpaceGuid_CnviMode                        1 bytes    $_DEFAULT_ = 0x01
@@ -1663,6 +1663,7 @@ List &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit
     Selection 2400 , "2400"
     Selection 2667 , "2667"
     Selection 2933 , "2933"
+    Selection 3200 , "3200"
     Selection 0 , "Auto"
 EndList
 
@@ -2758,7 +2759,7 @@ Page "Memory Reference Code"
     Combo $gPlatformFspPkgTokenSpaceGuid_UserBd, "Board Type", &gPlatformFspPkgTokenSpaceGuid_UserBd,
         Help "MrcBoardType, Options are 0=Mobile/Mobile Halo, 1=Desktop/DT Halo, 5=ULT/ULX/Mobile Halo, 7=UP Server"
     Combo $gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit, "DDR Frequency Limit", &gPlatformFspPkgTokenSpaceGuid_DdrFreqLimit,
-        Help "Maximum Memory Frequency Selections in Mhz. Options are 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933 and 0 for Auto."
+        Help "Maximum Memory Frequency Selections in Mhz. Options are 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933, 3200 and 0 for Auto."
     Combo $gPlatformFspPkgTokenSpaceGuid_SaGv, "SA GV", &gPlatformFspPkgTokenSpaceGuid_SaGv,
         Help "System Agent dynamic frequency support and when enabled memory will be training at three different frequencies."
     Combo $gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot, "Memory Test on Warm Boot", &gPlatformFspPkgTokenSpaceGuid_MemTestOnWarmBoot,
@@ -5001,8 +5002,8 @@ Page "PCH (Post-Mem)"
         Help "Enable/Disable lock of communication through SET_CONFIG/GET_CONFIG to eSPI slaves addresseses from range 0x0 - 0x7FF"
     Combo $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeEnable, "Extented BIOS Direct Read Decode enable", &EN_DIS,
         Help "Enable/Disable access to bigger than 16MB BIOS Region through Direct Memory Reads. 0: disabled (default), 1: enabled"
-    Combo $gPlatformFspPkgTokenSpaceGuid_PchPostMemRsvd, "PchPostMemRsvd", &EN_DIS,
-        Help "Reserved for PCH Post-Mem"
+    Combo $gPlatformFspPkgTokenSpaceGuid_PchXhciHsiiEnable, "PCH xHCI enable HS Interrupt IN Alarm", &EN_DIS,
+        Help "PCH xHCI enable HS Interrupt IN Alarm. 0: disabled (default), 1: enabled"
     EditNum $gPlatformFspPkgTokenSpaceGuid_PchSpiExtendedBiosDecodeRangeBase, "Extended BIOS Direct Read Decode Range base", HEX,
         Help "Bits of 31:16 of a memory address that'll be a base for Extended BIOS Direct Read Decode."
              "Valid range: 0x0 ~ 0xFFFFFFFF"

TigerLakeFspBinPkg/TGL_IOT/Include/FirmwareVersionInfoHob.h

@@ -1,69 +0,0 @@
-/** @file
-  Header file for Firmware Version Information
-
- @copyright
-  INTEL CONFIDENTIAL
-  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
-
-  This program and the accompanying materials are licensed and made available under
-  the terms and conditions of the BSD License which accompanies this distribution.
-  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _FIRMWARE_VERSION_INFO_HOB_H_
-#define _FIRMWARE_VERSION_INFO_HOB_H_
-
-#include <Uefi/UefiMultiPhase.h>
-#include <Pi/PiBootMode.h>
-#include <Pi/PiHob.h>
-
-#pragma pack(1)
-///
-/// Firmware Version Structure
-///
-typedef struct {
-  UINT8                          MajorVersion;
-  UINT8                          MinorVersion;
-  UINT8                          Revision;
-  UINT16                         BuildNumber;
-} FIRMWARE_VERSION;
-
-///
-/// Firmware Version Information Structure
-///
-typedef struct {
-  UINT8                          ComponentNameIndex;        ///< Offset 0   Index of Component Name
-  UINT8                          VersionStringIndex;        ///< Offset 1   Index of Version String
-  FIRMWARE_VERSION               Version;                   ///< Offset 2-6 Firmware version
-} FIRMWARE_VERSION_INFO;
-
-#ifndef __SMBIOS_STANDARD_H__
-///
-/// The Smbios structure header.
-///
-typedef struct {
-  UINT8                          Type;
-  UINT8                          Length;
-  UINT16                         Handle;
-} SMBIOS_STRUCTURE;
-#endif
-
-///
-/// Firmware Version Information HOB Structure
-///
-typedef struct {
-  EFI_HOB_GUID_TYPE              Header;                    ///< Offset 0-23  The header of FVI HOB
-  SMBIOS_STRUCTURE               SmbiosData;                ///< Offset 24-27  The SMBIOS header of FVI HOB
-  UINT8                          Count;                     ///< Offset 28    Number of FVI elements included.
-///
-/// FIRMWARE_VERSION_INFO structures followed by the null terminated string buffer
-///
-} FIRMWARE_VERSION_INFO_HOB;
-#pragma pack()
-
-#endif // _FIRMWARE_VERSION_INFO_HOB_H_

TigerLakeFspBinPkg/TGL_IOT/Include/FspmUpd.h

@@ -510,8 +510,9 @@ typedef struct {
 
 /** Offset 0x018E - DDR Frequency Limit
   Maximum Memory Frequency Selections in Mhz. Options are 1067, 1333, 1600, 1867,
-  2133, 2400, 2667, 2933 and 0 for Auto.
-  1067:1067, 1333:1333, 1600:1600, 1867:1867, 2133:2133, 2400:2400, 2667:2667, 2933:2933, 0:Auto
+  2133, 2400, 2667, 2933, 3200 and 0 for Auto.
+  1067:1067, 1333:1333, 1600:1600, 1867:1867, 2133:2133, 2400:2400, 2667:2667, 2933:2933,
+  3200:3200, 0:Auto
 **/
   UINT16                      DdrFreqLimit;
 

TigerLakeFspBinPkg/TGL_IOT/Include/FspsUpd.h

@@ -877,11 +877,11 @@ typedef struct {
 **/
   UINT8                       EnforceEDebugMode;
 
-/** Offset 0x03DF - PchPostMemRsvd
-  Reserved for PCH Post-Mem
+/** Offset 0x03DF - PCH xHCI enable HS Interrupt IN Alarm
+  PCH xHCI enable HS Interrupt IN Alarm. 0: disabled (default), 1: enabled
   $EN_DIS
 **/
-  UINT8                       PchPostMemRsvd[1];
+  UINT8                       PchXhciHsiiEnable;
 
 /** Offset 0x03E0 - Extended BIOS Direct Read Decode Range base
   Bits of 31:16 of a memory address that'll be a base for Extended BIOS Direct Read Decode.

TigerLakeFspBinPkg/TGL_IOT/Include/MemInfoHob.h

@@ -9,8 +9,8 @@
   the terms and conditions of the BSD License that accompanies this distribution.
   The full text of the license may be found at
   http://opensource.org/licenses/bsd-license.php.
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
 
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
 @par Specification Reference: