coreboot-mirror
/
fsp
mirror of https://review.coreboot.org/fsp.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Braswell FSP 1.1.8.0

This commit is contained in:
ClientSysFWGit 2017-04-10 00:44:32 -08:00
parent 3f2569c81a
commit 1d2b7e1a94
8 changed files with 22 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

BIN
BraswellFspBinPkg/Docs/Braswell_FSP_Integration_Guide.pdf
View File

Binary file not shown.

BIN
BraswellFspBinPkg/FspBin/BSWFSP.fd
View File

Binary file not shown.

4
BraswellFspBinPkg/FspBin/BraswellFsp.bsf
View File

@ -2,7 +2,7 @@
Boot Setting File for Platform Configuration.
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -70,7 +70,7 @@ StructDef
$gPlatformFspPkgTokenSpaceGuid_PcdSdDetectChk 1 bytes $_DEFAULT_ = 1
Find "$BSWFSP$"
$gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_DEFAULT_ = 0x01010700
$gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_DEFAULT_ = 0x01010800
EndStruct

BIN
BraswellFspBinPkg/FspBin/SecureBootEnabled/BSWFSP.fd
View File

Binary file not shown.

4
BraswellFspBinPkg/FspBin/SecureBootEnabled/BraswellFsp.bsf
View File

@ -2,7 +2,7 @@
Boot Setting File for Platform Configuration.
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@ -70,7 +70,7 @@ StructDef
$gPlatformFspPkgTokenSpaceGuid_PcdSdDetectChk 1 bytes $_DEFAULT_ = 1
Find "BSWSBFSP"
$gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_DEFAULT_ = 0x01010700
$gPlatformFspPkgTokenSpaceGuid_PcdImageRevision 4 bytes $_DEFAULT_ = 0x01010800
Skip 24 bytes
$gPlatformFspPkgTokenSpaceGuid_PcdEnableSecureBoot 1 bytes $_DEFAULT_ = 2

9
BraswellFspBinPkg/Include/FspUpdVpd.h
View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
@ -478,7 +478,10 @@ typedef struct {
UINT8 I2C6Frequency;
/** Offset 0x016A
**/
UINT8 ReservedSiliconInitUpd[411];
UINT16 APTaskTimeoutCnt;
/** Offset 0x016C
**/
UINT8 ReservedSiliconInitUpd[409];
} SILICON_INIT_UPD;
#define FSP_UPD_SIGNATURE 0x2444505557534224 /* '$BSWUPD$' */
@ -516,7 +519,7 @@ typedef struct _UPD_DATA_REGION {
} UPD_DATA_REGION;
#define FSP_IMAGE_ID 0x2450534657534224 /* '$BSWFSP$' */
#define FSP_IMAGE_REV 0x01010700
#define FSP_IMAGE_REV 0x01010800
typedef struct _VPD_DATA_REGION {
/** Offset 0x0000

9
BraswellFspBinPkg/Include/SecureBootEnabled/FspUpdVpd.h
View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
@ -478,7 +478,10 @@ typedef struct {
UINT8 I2C6Frequency;
/** Offset 0x016A
**/
UINT8 ReservedSiliconInitUpd[411];
UINT16 APTaskTimeoutCnt;
/** Offset 0x016C
**/
UINT8 ReservedSiliconInitUpd[409];
} SILICON_INIT_UPD;
#define FSP_UPD_SIGNATURE 0x2444505557534224 /* '$BSWUPD$' */
@ -522,7 +525,7 @@ typedef struct _UPD_DATA_REGION {
} UPD_DATA_REGION;
#define FSP_IMAGE_ID 0x5053464253575342 /* 'BSWSBFSP' */
#define FSP_IMAGE_REV 0x01010700
#define FSP_IMAGE_REV 0x01010800
typedef struct _VPD_DATA_REGION {
/** Offset 0x0000

9
BraswellFspBinPkg/SampleCode/FspUpdVpd.h
View File

@ -1,6 +1,6 @@
/** @file
Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
@ -478,7 +478,10 @@ typedef struct {
UINT8 I2C6Frequency;
/** Offset 0x016A
**/
UINT8 ReservedSiliconInitUpd[411];
UINT16 APTaskTimeoutCnt;
/** Offset 0x016C
**/
UINT8 ReservedSiliconInitUpd[409];
} SILICON_INIT_UPD;
#define FSP_UPD_SIGNATURE 0x2444505557534224 /* '$BSWUPD$' */
@ -516,7 +519,7 @@ typedef struct _UPD_DATA_REGION {
} UPD_DATA_REGION;
#define FSP_IMAGE_ID 0x2450534657534224 /* '$BSWFSP$' */
#define FSP_IMAGE_REV 0x01010700
#define FSP_IMAGE_REV 0x01010800
typedef struct _VPD_DATA_REGION {
/** Offset 0x0000