Lubomir Rintel fd470f7163 vx900: fix format strings for DEBUG_RAM_SETUP=y ... Change-Id: I990969cf1389c19032c4a0fafbdef45b9d6d1e8b Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22257 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2018-01-15 00:44:43 +00:00
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acpi	arch/x86: Add common AMD ACPI hardware definitions	2017-11-10 19:15:38 +00:00
arch	arch/riscv: Remove supervisor_trap_entry	2017-12-02 05:25:16 +00:00
commonlib	commonlib/region: expose subregion helper function	2017-12-15 23:35:05 +00:00
console	console: Ignore loglevel in nvram until ramstage	2017-09-25 13:35:29 +00:00
cpu	cpu/x86: set permanent SMM handler stack to 1KiB	2017-12-20 16:14:13 +00:00
device	device/dram/ddr2.c: Store the checksum in the decoded SPD struct	2017-12-20 16:53:30 +00:00
drivers	intel/fsp2_0: Set boot mode default as per s3wake status	2018-01-11 02:05:16 +00:00
ec	ec/lenovo/h8: Add support for bluetooth on wifi	2018-01-12 18:19:34 +00:00
include	soc/intel/common: Add Intel HDA common block driver	2018-01-12 16:55:33 +00:00
lib	boardid: Add helpers to read sku_id strapping into coreboot tables	2017-12-07 01:19:32 +00:00
mainboard	mb/asrock/g41c-gs: Add IO decode range for SIO HWMON	2018-01-14 21:45:39 +00:00
northbridge	vx900: fix format strings for DEBUG_RAM_SETUP=y	2018-01-15 00:44:43 +00:00
security	security/vboot: Remove unused include of vboot_nvstorage.h	2017-12-07 01:20:51 +00:00
soc	soc/amd/stoneyridge: Add definition for GENINT_DISABLE	2018-01-13 23:45:27 +00:00
southbridge	mb/*/*/romstage.c: Clean up targets with i82801gx	2018-01-14 21:43:25 +00:00
superio	superio/ite/it8623e: add support for SIO chip ITE IT8623E	2018-01-07 18:47:37 +00:00
vendorcode	vendorcode/intel/fsp/fsp2_0/glk: Update header files as per v77_12	2018-01-05 21:12:16 +00:00
Kconfig	boardid: Switch from Kconfig to weak functions	2017-12-07 01:19:27 +00:00