151 lines
3.2 KiB
Plaintext
151 lines
3.2 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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/* This file is included inside a SECTIONS block */
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/* First we place the code and read only data (typically const declared).
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* This could theoretically be placed in rom.
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* The '.' in '.text . : {' is actually significant to prevent missing some
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* SoC's entry points due to artificial alignment restrictions, see
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* https://sourceware.org/binutils/docs/ld/Output-Section-Address.html
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*/
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.text . : {
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_program = .;
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_text = .;
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/*
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* The .rom.* sections are to acommodate x86 romstage. romcc as well
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* as the assembly files put their text and data in these sections.
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*/
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*(.rom.text);
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*(.rom.data);
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*(.text._start);
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*(.text.stage_entry);
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#if (ENV_DECOMPRESSOR || ENV_BOOTBLOCK && \
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!CONFIG(COMPRESS_BOOTBLOCK)) && \
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!(CONFIG(ARCH_BOOTBLOCK_X86_32) || \
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CONFIG(ARCH_BOOTBLOCK_X86_64))
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KEEP(*(.id));
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#endif
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*(.text);
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*(.text.*);
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#if ENV_RAMSTAGE || ENV_ROMSTAGE || ENV_POSTCAR
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_cbmem_init_hooks = .;
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KEEP(*(.rodata.cbmem_init_hooks));
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_ecbmem_init_hooks = .;
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_rsbe_init_begin = .;
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KEEP(*(.rsbe_init));
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_ersbe_init_begin = .;
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#if ENV_RAMSTAGE
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_pci_drivers = .;
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KEEP(*(.rodata.pci_driver));
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_epci_drivers = .;
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_cpu_drivers = .;
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KEEP(*(.rodata.cpu_driver));
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_ecpu_drivers = .;
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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*(.rodata);
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*(.rodata.*);
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_etext = .;
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} : to_load
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#if ENV_RAMSTAGE && CONFIG(COVERAGE)
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.ctors . : {
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. = ALIGN(0x100);
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__CTOR_LIST__ = .;
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KEEP(*(.ctors));
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LONG(0);
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LONG(0);
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__CTOR_END__ = .;
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}
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#endif
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/* Include data, bss, and heap in that order. Not defined for all stages. */
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#if ENV_STAGE_HAS_DATA_SECTION
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.data . : {
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. = ALIGN(ARCH_CACHELINE_ALIGN_SIZE);
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_data = .;
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/*
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* The postcar phase uses a stack value that is located in the relocatable
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* module section. While the postcar stage could be linked like smm and
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* other rmodules the postcar stage needs similar semantics of the more
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* traditional stages in the coreboot infrastructure. Therefore it's easier
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* to specialize this case.
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*/
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#if ENV_RMODULE || ENV_POSTCAR
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_rmodule_params = .;
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KEEP(*(.module_parameters));
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_ermodule_params = .;
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#endif
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*(.data);
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*(.data.*);
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*(.sdata);
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*(.sdata.*);
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#if ENV_ROMSTAGE_OR_BEFORE
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PROVIDE(_preram_cbmem_console = .);
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PROVIDE(_epreram_cbmem_console = _preram_cbmem_console);
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#elif ENV_RAMSTAGE
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_bs_init_begin = .;
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KEEP(*(.bs_init));
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LONG(0);
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LONG(0);
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_ebs_init_begin = .;
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_edata = .;
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}
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#endif
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#if !ENV_CACHE_AS_RAM
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.bss . : {
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_bss = .;
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*(.bss)
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*(.bss.*)
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*(.sbss)
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*(.sbss.*)
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_ebss = .;
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}
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#endif
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#if ENV_STAGE_HAS_HEAP_SECTION
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.heap . : {
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_heap = .;
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. += (ENV_RMODULE ? __heap_size : CONFIG_HEAP_SIZE);
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_eheap = .;
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}
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#endif
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_eprogram = .;
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/* Discard the sections we don't need/want */
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zeroptr = 0;
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/DISCARD/ : {
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*(.comment)
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*(.comment.*)
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*(.note)
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*(.note.*)
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*(.eh_frame);
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}
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