196 lines
5.0 KiB
C
196 lines
5.0 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <types.h>
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#include <console/uart.h>
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#include <device/mmio.h>
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#include <boot/coreboot_tables.h>
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#include <cpu/ti/am335x/uart.h>
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#define EFR_ENHANCED_EN (1 << 4)
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#define FCR_FIFO_EN (1 << 0)
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#define MCR_TCR_TLR (1 << 6)
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#define SYSC_SOFTRESET (1 << 1)
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#define SYSS_RESETDONE (1 << 0)
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#define LSR_RXFIFOE (1 << 0)
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#define LSR_TXFIFOE (1 << 5)
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/*
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* Initialise the serial port with the given baudrate divisor. The settings
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* are always 8 data bits, no parity, 1 stop bit, no start bits.
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*/
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static void am335x_uart_init(struct am335x_uart *uart, uint16_t div)
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{
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uint16_t lcr_orig, efr_orig, mcr_orig;
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/* reset the UART */
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write16(&uart->sysc, uart->sysc | SYSC_SOFTRESET);
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while (!(read16(&uart->syss) & SYSS_RESETDONE))
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;
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/* 1. switch to register config mode B */
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lcr_orig = read16(&uart->lcr);
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write16(&uart->lcr, 0xbf);
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/*
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* 2. Set EFR ENHANCED_EN bit. To access this bit, registers must
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* be in TCR_TLR submode, meaning EFR[4] = 1 and MCR[6] = 1.
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*/
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efr_orig = read16(&uart->efr);
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write16(&uart->efr, efr_orig | EFR_ENHANCED_EN);
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/* 3. Switch to register config mode A */
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write16(&uart->lcr, 0x80);
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/* 4. Enable register submode TCR_TLR to access the UARTi.UART_TLR */
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mcr_orig = read16(&uart->mcr);
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write16(&uart->mcr, mcr_orig | MCR_TCR_TLR);
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/* 5. Enable the FIFO. For now we'll ignore FIFO triggers and DMA */
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write16(&uart->fcr, FCR_FIFO_EN);
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/* 6. Switch to configuration mode B */
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write16(&uart->lcr, 0xbf);
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/* Skip steps 7 and 8 (setting up FIFO triggers for DMA) */
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/* 9. Restore original EFR value */
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write16(&uart->efr, efr_orig);
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/* 10. Switch to config mode A */
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write16(&uart->lcr, 0x80);
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/* 11. Restore original MCR value */
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write16(&uart->mcr, mcr_orig);
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/* 12. Restore original LCR value */
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write16(&uart->lcr, lcr_orig);
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/* Protocol, baud rate and interrupt settings */
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/* 1. Disable UART access to DLL and DLH registers */
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write16(&uart->mdr1, read16(&uart->mdr1) | 0x7);
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/* 2. Switch to config mode B */
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write16(&uart->lcr, 0xbf);
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/* 3. Enable access to IER[7:4] */
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write16(&uart->efr, efr_orig | EFR_ENHANCED_EN);
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/* 4. Switch to operational mode */
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write16(&uart->lcr, 0x0);
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/* 5. Clear IER */
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write16(&uart->ier, 0x0);
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/* 6. Switch to config mode B */
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write16(&uart->lcr, 0xbf);
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/* 7. Set dll and dlh to the desired values (table 19-25) */
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write16(&uart->dlh, (div >> 8));
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write16(&uart->dll, (div & 0xff));
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/* 8. Switch to operational mode to access ier */
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write16(&uart->lcr, 0x0);
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/* 9. Clear ier to disable all interrupts */
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write16(&uart->ier, 0x0);
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/* 10. Switch to config mode B */
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write16(&uart->lcr, 0xbf);
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/* 11. Restore efr */
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write16(&uart->efr, efr_orig);
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/* 12. Set protocol formatting 8n1 (8 bit data, no parity, 1 stop bit) */
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write16(&uart->lcr, 0x3);
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/* 13. Load the new UART mode */
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write16(&uart->mdr1, 0x0);
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}
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/*
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* Read a single byte from the serial port. Returns 1 on success, 0
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* otherwise. When the function is successful, the character read is
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* written into its argument c.
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*/
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static unsigned char am335x_uart_rx_byte(struct am335x_uart *uart)
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{
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while (!(read16(&uart->lsr) & LSR_RXFIFOE));
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return read8(&uart->rhr);
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}
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/*
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* Output a single byte to the serial port.
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*/
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static void am335x_uart_tx_byte(struct am335x_uart *uart, unsigned char data)
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{
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while (!(read16(&uart->lsr) & LSR_TXFIFOE));
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return write8(&uart->thr, data);
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}
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unsigned int uart_platform_refclk(void)
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{
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return 48000000;
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}
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uintptr_t uart_platform_base(int idx)
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{
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const unsigned int bases[] = {
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0x44e09000, 0x48022000, 0x48024000,
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0x481a6000, 0x481a8000, 0x481aa000
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};
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if (idx < ARRAY_SIZE(bases))
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return bases[idx];
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return 0;
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}
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void uart_init(int idx)
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{
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struct am335x_uart *uart = uart_platform_baseptr(idx);
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uint16_t div = (uint16_t) uart_baudrate_divisor(
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get_uart_baudrate(), uart_platform_refclk(), 16);
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am335x_uart_init(uart, div);
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}
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unsigned char uart_rx_byte(int idx)
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{
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struct am335x_uart *uart = uart_platform_baseptr(idx);
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return am335x_uart_rx_byte(uart);
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}
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void uart_tx_byte(int idx, unsigned char data)
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{
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struct am335x_uart *uart = uart_platform_baseptr(idx);
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am335x_uart_tx_byte(uart, data);
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}
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void uart_tx_flush(int idx)
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{
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}
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void uart_fill_lb(void *data)
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{
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struct lb_serial serial;
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serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
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serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
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serial.baud = get_uart_baudrate();
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serial.regwidth = 2;
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lb_add_serial(&serial, data);
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lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
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}
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