147 lines
3.6 KiB
Plaintext
147 lines
3.6 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2015-2018 Intel Corp.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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if BOARD_INTEL_GALILEO
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_8192
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select ENABLE_BUILTIN_HSUART1
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select HAVE_ACPI_TABLES
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select SOC_INTEL_QUARK
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select MAINBOARD_HAS_I2C_TPM_ATMEL
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select MAINBOARD_HAS_TPM2
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select PLATFORM_USES_FSP2_0
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select UDK_2015_BINDING
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config MAINBOARD_DIR
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string
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default intel/galileo
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config MAINBOARD_PART_NUMBER
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string
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default "Galileo"
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config MAINBOARD_VENDOR
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string
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default "Intel"
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config GALILEO_GEN2
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bool "Board generation: GEN1 (n) or GEN2 (y)"
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default y
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help
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The coreboot binary will configure only one generation of the Galileo
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board since coreboot can not determine the board generation at
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runtime. Select which generation of the Galileo that coreboot
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should initialize.
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choice
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prompt "FSP binary type"
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default FSP_BUILD_TYPE_DEBUG
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config FSP_BUILD_TYPE_DEBUG
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bool "Debug"
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help
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Use the debug version of FSP
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config FSP_BUILD_TYPE_RELEASE
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bool "Release"
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help
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Use the release version of FSP
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endchoice
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config FSP_BUILD_TYPE
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string
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default "DEBUG" if FSP_BUILD_TYPE_DEBUG
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default "RELEASE" if FSP_BUILD_TYPE_RELEASE
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choice
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prompt "FSP type"
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default FSP_TYPE_2_0_PEI
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config FSP_TYPE_2_0
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bool "MemInit subroutine"
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help
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FSP 2.0 implemented as subroutines, no EDK-II cores
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config FSP_TYPE_2_0_PEI
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bool "SEC + PEI Core + MemInit PEIM"
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help
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FSP 2.0 implemented using SEC and PEI core
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endchoice
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config FSP_TYPE
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string
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default "Fsp2_0" if FSP_TYPE_2_0
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default "Fsp2_0Pei" if FSP_TYPE_2_0_PEI
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config FSP_DEBUG_ALL
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bool "Enable all FSP debug support"
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default y
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# Enable display and verification for coreboot build tests
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select DISPLAY_HOBS
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select DISPLAY_MTRRS
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select DISPLAY_UPD_DATA
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select DISPLAY_ESRAM_LAYOUT
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select DISPLAY_FSP_CALLS_AND_STATUS
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select DISPLAY_FSP_HEADER
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select VERIFY_HOBS
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help
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Turn on debug support to display HOBS, MTRRS, SMM_MEMORY_MAP, UPD_DATA
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also turn on FSP 2.0 debug support for ESRAM_LAYOUT,
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FSP_CALLS_AND_STATUS, FSP_HEADER, POSTCAR_CONSOLE and VERIFY_HOBS
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or FSP 1.1 DISPLAY_FSP_ENTRY_POINTS
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config VBOOT_WITH_CRYPTO_SHIELD
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bool "Verified boot using the Crypto Shield board"
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default n
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select COLLECT_TIMESTAMPS
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select VBOOT_SEPARATE_VERSTAGE
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select VBOOT
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select VBOOT_STARTS_IN_BOOTBLOCK
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select VBOOT_SOFT_REBOOT_WORKAROUND
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select VBOOT_VBNV_CMOS
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help
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Perform a verified boot using the TPM on the Crypto Shield board.
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config DRIVER_TPM_I2C_ADDR
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hex "Address of the I2C TPM chip"
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depends on VBOOT_WITH_CRYPTO_SHIELD
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default 0x29
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help
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I2C address of the TPM chip on the Crypto Shield board.
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config FMDFILE
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string "FMAP description file in fmd format"
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depends on VBOOT
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default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot.fmd"
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help
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The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
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but in some cases more complex setups are required.
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When an FMD descriptionn file is specified, the build system uses it
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instead of creating a default FMAP file.
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config ENABLE_SD_TESTING
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bool "Enable SD card testing"
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default y
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select COMMONLIB_STORAGE_SD
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select SDHC_DEBUG
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select STORAGE_LOG
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select STORAGE_TEST
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endif # BOARD_INTEL_QUARK
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