88 lines
2.4 KiB
Plaintext
88 lines
2.4 KiB
Plaintext
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2010 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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TARGET(binary)
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SECTIONS
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{
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. = ROMSTAGE_BASE;
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.rom . : {
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_rom = .;
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*(.rom.text);
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*(.rom.text.*);
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*(.text);
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*(.text.*);
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*(.rom.data);
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. = ALIGN(4);
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_cbmem_init_hooks = .;
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KEEP(*(.rodata.cbmem_init_hooks));
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_ecbmem_init_hooks = .;
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*(.rodata);
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*(.rodata.*);
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*(.rom.data.*);
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. = ALIGN(16);
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_erom = .;
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}
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/DISCARD/ : {
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*(.comment)
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*(.note)
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*(.comment.*)
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*(.note.*)
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*(.eh_frame);
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}
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. = CONFIG_DCACHE_RAM_BASE;
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.car.data . (NOLOAD) : {
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_car_data_start = .;
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#if IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION)
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_timestamp = .;
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. = . + 0x100;
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_etimestamp = .;
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#endif
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*(.car.global_data);
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_car_data_end = .;
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/* The preram cbmem console area comes last to take advantage
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* of a zero-sized array to hold the memconsole contents.
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* However, collisions within the cache-as-ram region cannot be
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* statically checked because the cache-as-ram region usage is
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* cpu/chipset dependent. */
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_preram_cbmem_console = .;
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_epreram_cbmem_console = . + (CONFIG_LATE_CBMEM_INIT ? 0 : 0xc00);
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}
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/* Global variables are not allowed in romstage
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* This section is checked during stage creation to ensure
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* that there are no global variables present
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*/
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. = 0xffffff00;
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.illegal_globals . : {
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*(EXCLUDE_FILE ("*/libagesa.*.a:" "*/buildOpts.romstage.o" "*/agesawrapper.romstage.o" "*/vendorcode/amd/agesa/*" "*/vendorcode/amd/cimx/*") .data)
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*(EXCLUDE_FILE ("*/libagesa.*.a:" "*/buildOpts.romstage.o" "*/agesawrapper.romstage.o" "*/vendorcode/amd/agesa/*" "*/vendorcode/amd/cimx/*") .data.*)
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*(.bss)
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*(.bss.*)
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*(.sbss)
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*(.sbss.*)
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}
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_bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) + 0xc00 <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full");
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}
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