296 lines
9.8 KiB
C
296 lines
9.8 KiB
C
/* $NoKeywords:$ */
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/**
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* @file
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*
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* Configure Max Payload
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*
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*
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*
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* @xrefitem bom "File Content Label" "Release Content"
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* @e project: AGESA
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* @e sub-project: GNB
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* @e \$Revision:
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*
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*/
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/*
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*****************************************************************************
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*
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* Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Advanced Micro Devices, Inc. nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ***************************************************************************
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*
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*/
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/*----------------------------------------------------------------------------------------
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* M O D U L E S U S E D
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*----------------------------------------------------------------------------------------
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*/
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#include "AGESA.h"
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#include "Ids.h"
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#include "amdlib.h"
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#include "Gnb.h"
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#include "GnbPcie.h"
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#include "GnbCommonLib.h"
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#include "GnbPcieConfig.h"
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#include "GnbPcieInitLibV1.h"
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#include "GnbPcieInitLibV4.h"
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#include "PcieMaxPayloadV4.h"
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#include "GnbRegistersTN.h"
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#include "Filecode.h"
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#define FILECODE PROC_GNB_MODULES_GNBPCIEINITLIBV4_PCIEMAXPAYLOADV4_FILECODE
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/*----------------------------------------------------------------------------------------
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* D E F I N I T I O N S A N D M A C R O S
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*----------------------------------------------------------------------------------------
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*/
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/*----------------------------------------------------------------------------------------
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* T Y P E D E F S A N D S T R U C T U R E S
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*----------------------------------------------------------------------------------------
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*/
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typedef struct {
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GNB_PCI_SCAN_DATA ScanData;
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UINT8 MaxPayload;
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} PCIE_MAX_PAYLOAD_DATA;
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/*----------------------------------------------------------------------------------------
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* P R O T O T Y P E S O F L O C A L F U N C T I O N S
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*----------------------------------------------------------------------------------------
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*/
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SCAN_STATUS
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PcieGetMaxPayloadCallback (
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IN PCI_ADDR Device,
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IN OUT GNB_PCI_SCAN_DATA *ScanData
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);
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SCAN_STATUS
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PcieSetMaxPayloadCallback (
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IN PCI_ADDR Device,
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IN OUT GNB_PCI_SCAN_DATA *ScanData
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);
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AGESA_STATUS
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PciePayloadBlackListFeature (
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IN PCI_ADDR Device,
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IN UINT8 *MaxPayload,
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IN AMD_CONFIG_PARAMS *StdHeader
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);
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/*----------------------------------------------------------------------------------------*/
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/**
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* Determine maximum payload size for PCIe segment
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*
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* Scan through all link in segment to determine maximum payload by EPs.
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*
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* @param[in] DownstreamPort PCI address of PCIe port
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* @param[in] StdHeader Standard configuration header
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*
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*/
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VOID
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PcieSetMaxPayload (
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IN PCI_ADDR DownstreamPort,
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IN AMD_CONFIG_PARAMS *StdHeader
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)
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{
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PCIE_MAX_PAYLOAD_DATA PcieMaxPayloadData;
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IDS_HDT_CONSOLE (GNB_TRACE, " PcieSetMaxPayload for Device = %d:%d:%d\n",
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DownstreamPort.Address.Bus,
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DownstreamPort.Address.Device,
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DownstreamPort.Address.Function
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);
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PcieMaxPayloadData.MaxPayload = MAX_PAYLOAD;
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PcieMaxPayloadData.ScanData.StdHeader = StdHeader;
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PcieMaxPayloadData.ScanData.GnbScanCallback = PcieGetMaxPayloadCallback;
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GnbLibPciScan (DownstreamPort, DownstreamPort, &PcieMaxPayloadData.ScanData);
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PcieMaxPayloadData.ScanData.GnbScanCallback = PcieSetMaxPayloadCallback;
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GnbLibPciScan (DownstreamPort, DownstreamPort, &PcieMaxPayloadData.ScanData);
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IDS_HDT_CONSOLE (GNB_TRACE, " PcieSetMaxPayloadExit\n");
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}
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/*----------------------------------------------------------------------------------------*/
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/**
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* Evaluate device Max Payload - save SMALLEST Max Payload for PCIe Segment
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*
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*
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*
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* @param[in] Device PCI Address
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* @param[in,out] ScanData Scan configuration data
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* @retval Scan Status of 0
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*/
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SCAN_STATUS
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PcieGetMaxPayloadCallback (
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IN PCI_ADDR Device,
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IN OUT GNB_PCI_SCAN_DATA *ScanData
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)
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{
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SCAN_STATUS ScanStatus;
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PCIE_MAX_PAYLOAD_DATA *PcieMaxPayloadData;
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PCIE_DEVICE_TYPE DeviceType;
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UINT32 Value;
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UINT8 PcieCapPtr;
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UINT8 DeviceMaxPayload;
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PcieMaxPayloadData = (PCIE_MAX_PAYLOAD_DATA*) ScanData;
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ScanStatus = SCAN_SUCCESS;
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IDS_HDT_CONSOLE (GNB_TRACE, " PcieGetMaxPayloadCallback for Device = %d:%d:%d\n",
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Device.Address.Bus,
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Device.Address.Device,
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Device.Address.Function
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);
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PcieCapPtr = GnbLibFindPciCapability (Device.AddressValue, PCIE_CAP_ID, ScanData->StdHeader);
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if (PcieCapPtr != 0) {
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GnbLibPciRead (
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Device.AddressValue | (PcieCapPtr + PCIE_DEVICE_CAP_REGISTER),
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AccessWidth32,
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&Value,
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ScanData->StdHeader
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);
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DeviceMaxPayload = (UINT8) (Value & 0x7);
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PciePayloadBlackListFeature (Device, &DeviceMaxPayload, ScanData->StdHeader);
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IDS_HDT_CONSOLE (GNB_TRACE, " Found DeviceMaxPayload as %d (Value = %x\n", DeviceMaxPayload, Value);
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if (DeviceMaxPayload < PcieMaxPayloadData->MaxPayload) {
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PcieMaxPayloadData->MaxPayload = DeviceMaxPayload;
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}
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}
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DeviceType = GnbLibGetPcieDeviceType (Device, ScanData->StdHeader);
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switch (DeviceType) {
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case PcieDeviceRootComplex:
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case PcieDeviceDownstreamPort:
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case PcieDeviceUpstreamPort:
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GnbLibPciScanSecondaryBus (Device, &PcieMaxPayloadData->ScanData);
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break;
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case PcieDeviceEndPoint:
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case PcieDeviceLegacyEndPoint:
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break;
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default:
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break;
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}
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return SCAN_SUCCESS;
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}
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/*----------------------------------------------------------------------------------------*/
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/**
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* Configure the Max Payload setting to all devices in the PCIe Segment
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*
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*
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*
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* @param[in] Device PCI Address
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* @param[in,out] ScanData Scan configuration data
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* @retval Scan Status of 0
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*/
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SCAN_STATUS
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PcieSetMaxPayloadCallback (
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IN PCI_ADDR Device,
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IN OUT GNB_PCI_SCAN_DATA *ScanData
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)
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{
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SCAN_STATUS ScanStatus;
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PCIE_MAX_PAYLOAD_DATA *PcieMaxPayloadData;
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PCIE_DEVICE_TYPE DeviceType;
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UINT8 PcieCapPtr;
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PcieMaxPayloadData = (PCIE_MAX_PAYLOAD_DATA*) ScanData;
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ScanStatus = SCAN_SUCCESS;
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IDS_HDT_CONSOLE (GNB_TRACE, " PcieSetMaxPayloadCallback for Device = %d:%d:%d to %d\n",
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Device.Address.Bus,
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Device.Address.Device,
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Device.Address.Function,
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PcieMaxPayloadData->MaxPayload
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);
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PcieCapPtr = GnbLibFindPciCapability (Device.AddressValue, PCIE_CAP_ID, ScanData->StdHeader);
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if (PcieCapPtr != 0) {
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GnbLibPciRMW (
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Device.AddressValue | (PcieCapPtr + PCIE_DEVICE_CTRL_REGISTER),
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AccessWidth32,
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~(UINT32) (0x7 << 5),
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((UINT32)PcieMaxPayloadData->MaxPayload << 5),
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ScanData->StdHeader
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);
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}
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DeviceType = GnbLibGetPcieDeviceType (Device, ScanData->StdHeader);
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switch (DeviceType) {
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case PcieDeviceRootComplex:
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case PcieDeviceDownstreamPort:
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case PcieDeviceUpstreamPort:
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GnbLibPciScanSecondaryBus (Device, &PcieMaxPayloadData->ScanData);
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break;
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case PcieDeviceEndPoint:
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case PcieDeviceLegacyEndPoint:
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break;
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default:
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break;
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}
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return SCAN_SUCCESS;
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}
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UINT16 PayloadBlacklistDeviceTable[] = {
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0x1969, 0x1083, (UINT16) MAX_PAYLOAD_128
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};
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/*----------------------------------------------------------------------------------------*/
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/**
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* Pcie Max_Payload_Size Black List
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*
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*
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*
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* @param[in] Device PCI_ADDR of PCIe Device to evaluate
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* @param[in] MaxPayload Pointer to Max_Payload_Size value
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* @param[in] StdHeader Standard configuration header
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* @retval AGESA_STATUS
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*/
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AGESA_STATUS
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PciePayloadBlackListFeature (
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IN PCI_ADDR Device,
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IN UINT8 *MaxPayload,
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IN AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 TargetDeviceId;
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UINTN i;
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UINT32 DeviceId;
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UINT32 VendorId;
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GnbLibPciRead (Device.AddressValue, AccessWidth32, &TargetDeviceId, StdHeader);
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for (i = 0; i < ARRAY_SIZE(PayloadBlacklistDeviceTable); i = i + 3) {
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VendorId = PayloadBlacklistDeviceTable[i];
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DeviceId = PayloadBlacklistDeviceTable[i + 1];
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if (VendorId == (UINT16)TargetDeviceId) {
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if (DeviceId == 0xFFFF || DeviceId == (TargetDeviceId >> 16)) {
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*MaxPayload = (UINT8) PayloadBlacklistDeviceTable[i + 2];
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}
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}
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}
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return AGESA_SUCCESS;
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}
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