64 lines
2.5 KiB
C
64 lines
2.5 KiB
C
/*
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*
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* Copyright (C) 2018 Google LLC
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <libpayload.h>
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#include <arch/apic.h>
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/* The pause instruction can delay 10-140 CPU cycles, so avoid calling it when
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* getting close to finishing. Depending on the timer source, the timer can be
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* running at CPU frequency, bus frequency, or some arbitrary value. We assume
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* that the timer is running at the CPU frequency. */
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#define PAUSE_THRESHOLD_TICKS 150
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/* Let's assume APIC interrupts take at least 100us */
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#define APIC_INTERRUPT_LATENCY_NS (100 * NSECS_PER_USEC)
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void arch_ndelay(uint64_t ns)
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{
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uint64_t delta = ns * timer_hz() / NSECS_PER_SEC;
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uint64_t pause_delta = 0;
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uint64_t apic_us = 0;
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uint64_t start = timer_raw_value();
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if (ns > APIC_INTERRUPT_LATENCY_NS)
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apic_us = (ns - APIC_INTERRUPT_LATENCY_NS) / NSECS_PER_USEC;
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if (CONFIG(LP_ENABLE_APIC) && apic_initialized() && apic_us)
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apic_delay(apic_us);
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if (delta > PAUSE_THRESHOLD_TICKS)
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pause_delta = delta - PAUSE_THRESHOLD_TICKS;
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while (timer_raw_value() - start < pause_delta)
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asm volatile("pause\n\t");
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while (timer_raw_value() - start < delta)
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continue;
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}
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