173 lines
5.9 KiB
ArmAsm
173 lines
5.9 KiB
ArmAsm
/*
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*
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* Copyright 2014 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <arch/asm.h>
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#include <arch/exception.h>
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/* Macro for exception entry
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* Store x30 before any branch
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* Branch to exception_prologue to save rest and switch stacks
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* Move exception id into x1
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* Branch to exception_dispatch (exception C entry point)
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* Branch to exception_return to return from exception
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*/
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.macro eentry lbl id
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.align 7
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\lbl:
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/* Note: SP points to exception_state (see exception_set_state_ptr) */
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str x30, [sp, #EXCEPTION_STATE_REG(30)]
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bl exception_prologue
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mov x1, \id
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bl exception_dispatch
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b exception_return
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.endm
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/* Exception table has 16 entries and each of 128 bytes
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* Hence, 16 * 128 = 2048. Thus, 11 passed as parameter
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* to align
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*/
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.align 11
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.global exception_table
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exception_table:
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eentry sync_sp0,#0
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eentry irq_sp0,#1
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eentry fiq_sp0,#2
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eentry serror_sp0,#3
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eentry sync_spx,#4
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eentry irq_spx,#5
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eentry fiq_spx,#6
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eentry serror_spx,#7
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eentry sync_elx_64,#8
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eentry irq_elx_64,#9
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eentry fiq_elx_64,#10
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eentry serror_elx_64,#11
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eentry sync_elx_32,#12
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eentry irq_elx_32,#13
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eentry fiq_elx_32,#14
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eentry serror_elx_32,#15
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/* This code must match the layout of struct exception_state (minus x30) */
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ENTRY(exception_prologue)
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/* Save registers x0-x29 */
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stp x28, x29, [sp, #EXCEPTION_STATE_REG(28)]
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stp x26, x27, [sp, #EXCEPTION_STATE_REG(26)]
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stp x24, x25, [sp, #EXCEPTION_STATE_REG(24)]
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stp x22, x23, [sp, #EXCEPTION_STATE_REG(22)]
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stp x20, x21, [sp, #EXCEPTION_STATE_REG(20)]
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stp x18, x19, [sp, #EXCEPTION_STATE_REG(18)]
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stp x16, x17, [sp, #EXCEPTION_STATE_REG(16)]
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stp x14, x15, [sp, #EXCEPTION_STATE_REG(14)]
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stp x12, x13, [sp, #EXCEPTION_STATE_REG(12)]
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stp x10, x11, [sp, #EXCEPTION_STATE_REG(10)]
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stp x8, x9, [sp, #EXCEPTION_STATE_REG(8)]
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stp x6, x7, [sp, #EXCEPTION_STATE_REG(6)]
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stp x4, x5, [sp, #EXCEPTION_STATE_REG(4)]
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stp x2, x3, [sp, #EXCEPTION_STATE_REG(2)]
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stp x0, x1, [sp, #EXCEPTION_STATE_REG(0)]
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/* Save the stack pointer and SPSR */
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mrs x1, sp_el0
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mrs x0, spsr_el2
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stp x0, x1, [sp, #EXCEPTION_STATE_SPSR]
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/* Save return address (ELR) and exception syndrome */
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mrs x1, esr_el2
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mrs x0, elr_el2
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stp x0, x1, [sp, #EXCEPTION_STATE_ELR]
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/* Now switch to the actual exception stack. Keep a pointer to the
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exception_state structure in x0 as an argument for dispatch(). */
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mov x0, sp
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adrp x1, exception_stack_end
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ldr x1, [x1, :lo12:exception_stack_end]
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msr SPSel, #0
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mov sp, x1
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ret
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ENDPROC(exception_prologue)
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ENTRY(exception_return)
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/* Switch SP back to the exception_state structure */
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msr SPSel, #1
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/* Restore return address (ELR) -- skip ESR (unneeded for return) */
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ldr x0, [sp, #EXCEPTION_STATE_ELR]
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msr elr_el2, x0
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/* Restore stack pointer and SPSR */
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ldp x0, x1, [sp, #EXCEPTION_STATE_SPSR]
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msr spsr_el2, x0
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msr sp_el0, x1
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/* Restore all registers (x0-x30) */
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ldp x0, x1, [sp, #EXCEPTION_STATE_REG(0)]
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ldp x2, x3, [sp, #EXCEPTION_STATE_REG(2)]
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ldp x4, x5, [sp, #EXCEPTION_STATE_REG(4)]
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ldp x6, x7, [sp, #EXCEPTION_STATE_REG(6)]
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ldp x8, x9, [sp, #EXCEPTION_STATE_REG(8)]
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ldp x10, x11, [sp, #EXCEPTION_STATE_REG(10)]
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ldp x12, x13, [sp, #EXCEPTION_STATE_REG(12)]
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ldp x14, x15, [sp, #EXCEPTION_STATE_REG(14)]
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ldp x16, x17, [sp, #EXCEPTION_STATE_REG(16)]
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ldp x18, x19, [sp, #EXCEPTION_STATE_REG(18)]
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ldp x20, x21, [sp, #EXCEPTION_STATE_REG(20)]
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ldp x22, x23, [sp, #EXCEPTION_STATE_REG(22)]
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ldp x24, x25, [sp, #EXCEPTION_STATE_REG(24)]
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ldp x26, x27, [sp, #EXCEPTION_STATE_REG(26)]
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ldp x28, x29, [sp, #EXCEPTION_STATE_REG(28)]
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ldr x30, [sp, #EXCEPTION_STATE_REG(30)]
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/* Return from exception */
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eret
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ENDPROC(exception_return)
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/*
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* We have two stack pointers on AArch64: SP_EL0 (which despite the
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* naming is used in all ELs) and SP_EL2. We can select which one to
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* use by writing to SPSel. Normally we're using SP_EL0, but on
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* exception entry it automatically switches to SP_EL2.
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*
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* It is important for exception reentrancy to switch back to SP_EL0
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* while handling the exception. We only need SP_EL2 for the assembly
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* exception entry and exit code that stores all register state
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* (including the old SP_EL0, before we switch to the real exception
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* stack). Rather than having yet another stack to push/pop those
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* register values on so that we can later sort them into the
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* exception_state structure, it's much easier to just make SP_EL2 point
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* directly to exception_state and just use it as a normal base register
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* rather than a real stack. This function sets that up.
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*/
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ENTRY(exception_set_state_ptr)
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msr SPSel, #1
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mov sp, x0
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msr SPSel, #0
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ret
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ENDPROC(exception_set_state_ptr)
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