coreboot/util/bucts
Patrick Georgi 8aa087ece6 .gitignore: Ignore .test/.dependencies globally
These were originally ignored only inside util/ but these files
shouldn't be tracked anywhere.

Change-Id: Ie0846bd8bdd6e52f420f9dd2e72a8a922102ff90
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47012
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-10-31 18:21:36 +00:00
..
.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
Makefile util/bucts: Add tool to manipulate BUC.TS bit on Intel targets 2018-11-19 08:19:16 +00:00
bucts.c util/: Replace GPLv2 boiler plate with SPDX header 2020-05-09 21:22:08 +00:00
description.md util/bucts: Add a description.md file 2018-12-18 13:24:56 +00:00
readme.md util/bucts: Add tool to manipulate BUC.TS bit on Intel targets 2018-11-19 08:19:16 +00:00

readme.md

What is bucts?

Many Intel southbridges provide a mechanism called Back Up Control Top Swap (BUC.TS). This functionality allows to have the southbridge fetch the reset vector or the beginning of the bootblock at a 64K/128/256K offset from the usual top of flash.

This can be useful in different ways:

  • Have a backup bootblock in case of bootblock hacking;
  • Some vendor BIOS only write protect their bootblock so this tool makes it possible to circumvent this protection to allow flashing and booting coreboot.

The BUC.TS status is stored in a nvram bit. To clear it one has to remove the RTC battery.

Operation Description

First compile bucts by running make:

$ make

Then you can view the current system settings:

$ ./bucts --print

To flip the decode address of the bootblock, by setting BUC.TS to 1:

$ ./bucts --set

To set the behavior the regular mapping, by setting BUC.TS to 0

$ ./bucts --unset

Details

Example Bootblock size of 64KB (this is only configurable to be something else like 128 or 256K on PCH Intel targets).

    +-------------+ -> 0x200000         +-------------+ -> 0xFFFFFFFF       +-------------+ -> 0xFFFFFFFF
    |             |                     |             |                     |             |
    | bootblock_0 |                     | bootblock_0 |                     | bootblock_1 |
    |             |                     |             |                     |             |
    +-------------+ -> 0x1F0000         +-------------+ -> 0xFFFF0000       +-------------+ -> 0xFFFF0000
    |             |                     |             |                     |             |
    | bootblock_1 |                     | bootblock_1 |                     | bootblock_0 |
    |             |                     |             |                     |             |
    +-------------+ -> 0x1E0000         +-------------+ -> 0xFFFE0000       +-------------+ -> 0xFFFE0000
    |             |                     |             |                     |             |
    |             |                     |             |                     |             |
    Z             Z                     Z             Z                     Z             Z
    Z             Z                     Z             Z                     Z             Z
    |             |                     |             |                     |             |
    |             |                     |             |                     |             |
    FLASH (2M)                          Memory Map BUC.TS=0               Memory Map BUC.TS=1