28 lines
648 B
C
28 lines
648 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <soc/cnl_memcfg_init.h>
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#include <soc/romstage.h>
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static const struct cnl_mb_cfg memcfg = {
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.spd[0] = {
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.read_type = READ_SMBUS,
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.spd_spec = {.spd_smbus_address = 0xa0},
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},
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.spd[2] = {
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.read_type = READ_SMBUS,
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.spd_spec = {.spd_smbus_address = 0xa4},
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},
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.rcomp_resistor = { 121, 75, 100 },
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.rcomp_targets = { 50, 25, 20, 20, 26 },
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.dq_pins_interleaved = 1,
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.vref_ca_config = 2,
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};
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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// Allow memory speeds higher than 2933 MT/s
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memupd->FspmConfig.SaOcSupport = 1;
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cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg);
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}
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