124 lines
3.0 KiB
C
124 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <southbridge/intel/lynxpoint/nvs.h>
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#include <southbridge/intel/lynxpoint/pch.h>
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#include <southbridge/intel/common/gpio.h>
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#include <southbridge/intel/lynxpoint/me.h>
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#include <northbridge/intel/haswell/haswell.h>
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#include <cpu/intel/haswell/haswell.h>
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#include <elog.h>
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/* Include EC functions */
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#include <ec/google/chromeec/ec.h>
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#include "ec.h"
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/* Codec enable: GPIO45 */
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#define GPIO_PP3300_CODEC_EN 45
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/* GPIO46 controls the WLAN_DISABLE_L signal. */
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#define GPIO_WLAN_DISABLE_L 46
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#define GPIO_LTE_DISABLE_L 59
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static u8 mainboard_smi_ec(void)
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{
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u8 cmd = google_chromeec_get_event();
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u32 pm1_cnt;
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/* Log this event */
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if (cmd)
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elog_gsmi_add_event_byte(ELOG_TYPE_EC_EVENT, cmd);
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switch (cmd) {
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case EC_HOST_EVENT_LID_CLOSED:
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printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
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/* Go to S5 */
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pm1_cnt = inl(get_pmbase() + PM1_CNT);
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pm1_cnt |= (0xf << 10);
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outl(pm1_cnt, get_pmbase() + PM1_CNT);
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break;
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}
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return cmd;
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}
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/* gpi_sts is GPIO 47:32 */
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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if (gpi_sts & (1 << (EC_SMI_GPI - 32))) {
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/* Process all pending events */
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while (mainboard_smi_ec() != 0);
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}
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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/* Disable USB charging if required */
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switch (slp_typ) {
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case ACPI_S3:
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if (gnvs->s3u0 == 0)
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google_chromeec_set_usb_charge_mode(
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0, USB_CHARGE_MODE_DISABLED);
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if (gnvs->s3u1 == 0)
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google_chromeec_set_usb_charge_mode(
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1, USB_CHARGE_MODE_DISABLED);
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/* Prevent leak from standby rail to WLAN rail in S3. */
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set_gpio(GPIO_WLAN_DISABLE_L, 0);
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set_gpio(GPIO_PP3300_CODEC_EN, 0);
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/* Disable LTE */
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set_gpio(GPIO_LTE_DISABLE_L, 0);
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/* Enable wake events */
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google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
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break;
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case ACPI_S4:
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case ACPI_S5:
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if (gnvs->s5u0 == 0)
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google_chromeec_set_usb_charge_mode(
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0, USB_CHARGE_MODE_DISABLED);
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if (gnvs->s5u1 == 0)
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google_chromeec_set_usb_charge_mode(
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1, USB_CHARGE_MODE_DISABLED);
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/* Prevent leak from standby rail to WLAN rail in S5. */
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set_gpio(GPIO_WLAN_DISABLE_L, 0);
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set_gpio(GPIO_PP3300_CODEC_EN, 0);
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/* Disable LTE */
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set_gpio(GPIO_LTE_DISABLE_L, 0);
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/* Enable wake events */
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google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
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break;
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}
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/* Disable SCI and SMI events */
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google_chromeec_set_smi_mask(0);
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google_chromeec_set_sci_mask(0);
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/* Clear pending events that may trigger immediate wake */
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while (google_chromeec_get_event() != 0);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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switch (apmc) {
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case APM_CNT_ACPI_ENABLE:
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google_chromeec_set_smi_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != 0);
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google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS);
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break;
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case APM_CNT_ACPI_DISABLE:
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google_chromeec_set_sci_mask(0);
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/* Clear all pending events */
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while (google_chromeec_get_event() != 0);
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google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
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break;
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}
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return 0;
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}
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