109 lines
2.3 KiB
C
109 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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#include <stdint.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <pc80/mc146818rtc.h>
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#include <smp/spinlock.h>
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DECLARE_SPIN_LOCK(cmos_post_lock)
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int cmos_post_previous_boot(u8 *code, u32 *extra)
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{
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*code = 0;
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*extra = 0;
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spin_lock(&cmos_post_lock);
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/* Get post code from other bank */
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switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
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case CMOS_POST_BANK_0_MAGIC:
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*code = cmos_read(CMOS_POST_BANK_1_OFFSET);
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*extra = cmos_read32(CMOS_POST_BANK_1_EXTRA);
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break;
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case CMOS_POST_BANK_1_MAGIC:
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*code = cmos_read(CMOS_POST_BANK_0_OFFSET);
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*extra = cmos_read32(CMOS_POST_BANK_0_EXTRA);
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break;
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}
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spin_unlock(&cmos_post_lock);
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/* Check last post code in previous boot against normal list */
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switch (*code) {
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case POST_OS_BOOT:
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case POST_OS_RESUME:
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case POST_ENTER_ELF_BOOT:
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case 0:
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break;
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default:
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return -1;
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}
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return 0;
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}
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void cmos_post_init(void)
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{
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u8 magic = CMOS_POST_BANK_0_MAGIC;
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/* Switch to the other bank */
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switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
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case CMOS_POST_BANK_1_MAGIC:
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break;
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case CMOS_POST_BANK_0_MAGIC:
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magic = CMOS_POST_BANK_1_MAGIC;
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break;
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default:
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/* Initialize to zero */
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cmos_write(0, CMOS_POST_BANK_0_OFFSET);
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cmos_write(0, CMOS_POST_BANK_1_OFFSET);
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cmos_write32(0, CMOS_POST_BANK_0_EXTRA);
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cmos_write32(0, CMOS_POST_BANK_1_EXTRA);
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}
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cmos_write(magic, CMOS_POST_BANK_OFFSET);
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}
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void cmos_post_code(u8 value)
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{
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spin_lock(&cmos_post_lock);
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switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
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case CMOS_POST_BANK_0_MAGIC:
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cmos_write(value, CMOS_POST_BANK_0_OFFSET);
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break;
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case CMOS_POST_BANK_1_MAGIC:
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cmos_write(value, CMOS_POST_BANK_1_OFFSET);
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break;
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}
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spin_unlock(&cmos_post_lock);
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}
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void cmos_post_extra(u32 value)
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{
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spin_lock(&cmos_post_lock);
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switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
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case CMOS_POST_BANK_0_MAGIC:
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cmos_write32(value, CMOS_POST_BANK_0_EXTRA);
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break;
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case CMOS_POST_BANK_1_MAGIC:
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cmos_write32(value, CMOS_POST_BANK_1_EXTRA);
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break;
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}
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spin_unlock(&cmos_post_lock);
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}
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void cmos_post_path(const struct device *dev)
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{
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/* Encode path into lower 3 bytes */
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u32 path = dev_path_encode(dev);
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/* Upper byte contains the log type */
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path |= CMOS_POST_EXTRA_DEV_PATH << 24;
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cmos_post_extra(path);
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}
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