177 lines
4.7 KiB
C
177 lines
4.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpigen.h>
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#include <arch/smp/mpspec.h>
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#include <assert.h>
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#include <cpu/intel/turbo.h>
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#include <device/mmio.h>
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#include <device/pci.h>
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#include <intelblocks/acpi.h>
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#include <soc/acpi.h>
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#include <soc/cpu.h>
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#include <soc/iomap.h>
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#include <soc/msr.h>
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#include <soc/pci_devs.h>
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#include <soc/pm.h>
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#include <soc/soc_util.h>
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#include <soc/util.h>
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int soc_madt_sci_irq_polarity(int sci)
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{
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if (sci >= 20)
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return MP_IRQ_POLARITY_LOW;
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else
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return MP_IRQ_POLARITY_HIGH;
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}
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uint32_t soc_read_sci_irq_select(void)
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{
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struct device *dev = PCH_DEV_PMC;
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if (!dev)
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return 0;
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return pci_read_config32(dev, PMC_ACPI_CNT);
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}
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void soc_fill_fadt(acpi_fadt_t *fadt)
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{
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const uint16_t pmbase = ACPI_BASE_ADDRESS;
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/* Fix flags set by common/block/acpi/acpi.c acpi_fill_fadt() */
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fadt->flags &= ~(ACPI_FADT_SEALED_CASE);
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fadt->flags |= ACPI_FADT_SLEEP_TYPE;
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fadt->pm2_cnt_blk = pmbase + PM2_CNT;
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fadt->pm_tmr_blk = pmbase + PM1_TMR;
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fadt->pm2_cnt_len = 1;
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fadt->pm_tmr_len = 4;
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fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
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fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
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fadt->duty_width = 0;
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/* RTC Registers */
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fadt->mon_alrm = 0x00;
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fadt->century = 0x00;
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fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
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/* PM2 Control Registers */
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fadt->x_pm2_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm2_cnt_blk.bit_width = 8;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS;
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fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk;
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fadt->x_pm2_cnt_blk.addrh = 0x00;
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/* PM1 Timer Register */
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fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO;
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fadt->x_pm_tmr_blk.bit_width = 32;
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fadt->x_pm_tmr_blk.bit_offset = 0;
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fadt->x_pm_tmr_blk.access_size = ACPI_ACCESS_SIZE_DWORD_ACCESS;
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fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
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fadt->x_pm_tmr_blk.addrh = 0x00;
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}
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void uncore_inject_dsdt(const struct device *device)
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{
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const IIO_UDS *hob = get_iio_uds();
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/* Only add RTxx entries once. */
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if (device->bus->secondary != 0)
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return;
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acpigen_write_scope("\\_SB");
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for (int socket = 0; socket < hob->PlatformData.numofIIO; ++socket) {
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IIO_RESOURCE_INSTANCE iio_resource =
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hob->PlatformData.IIO_resource[socket];
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for (int stack = 0; stack <= PSTACK2; ++stack) {
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const STACK_RES *ri = &iio_resource.StackRes[stack];
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char rtname[16];
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snprintf(rtname, sizeof(rtname), "RT%02x",
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(socket*MAX_IIO_STACK)+stack);
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acpigen_write_name(rtname);
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printk(BIOS_DEBUG, "\tCreating ResourceTemplate %s for socket: %d, stack: %d\n",
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rtname, socket, stack);
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acpigen_write_resourcetemplate_header();
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/* bus resource */
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acpigen_resource_word(2, 0xc, 0, 0, ri->BusBase, ri->BusLimit,
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0x0, (ri->BusLimit - ri->BusBase + 1));
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// additional io resources on socket 0 bus 0
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if (socket == 0 && stack == 0) {
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/* ACPI 6.4.2.5 I/O Port Descriptor */
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acpigen_write_io16(0xCF8, 0xCFF, 0x1, 0x8, 1);
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/* IO decode CF8-CFF */
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acpigen_resource_word(1, 0xc, 0x3, 0, 0x0000, 0x03AF,
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0, 0x03B0);
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acpigen_resource_word(1, 0xc, 0x3, 0, 0x03E0, 0x0CF7,
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0, 0x0918);
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acpigen_resource_word(1, 0xc, 0x3, 0, 0x03B0, 0x03BB,
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0, 0x000C);
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acpigen_resource_word(1, 0xc, 0x3, 0, 0x03C0, 0x03DF,
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0, 0x0020);
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}
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/* IO resource */
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acpigen_resource_word(1, 0xc, 0x3, 0, ri->PciResourceIoBase,
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ri->PciResourceIoLimit, 0x0,
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(ri->PciResourceIoLimit - ri->PciResourceIoBase + 1));
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// additional mem32 resources on socket 0 bus 0
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if (socket == 0 && stack == 0) {
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acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS,
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(VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0,
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VGA_BASE_SIZE);
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acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS,
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(SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0,
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SPI_BASE_SIZE);
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}
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/* Mem32 resource */
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acpigen_resource_dword(0, 0xc, 1, 0, ri->PciResourceMem32Base,
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ri->PciResourceMem32Limit, 0x0,
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(ri->PciResourceMem32Limit - ri->PciResourceMem32Base + 1));
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/* Mem64 resource */
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acpigen_resource_qword(0, 0xc, 1, 0, ri->PciResourceMem64Base,
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ri->PciResourceMem64Limit, 0x0,
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(ri->PciResourceMem64Limit - ri->PciResourceMem64Base + 1));
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acpigen_write_resourcetemplate_footer();
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}
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}
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acpigen_pop_len();
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}
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void soc_power_states_generation(int core, int cores_per_package)
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{
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}
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unsigned long xeonsp_acpi_create_madt_lapics(unsigned long current)
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{
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struct device *cpu;
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uint8_t num_cpus = 0;
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for (cpu = all_devices; cpu; cpu = cpu->next) {
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if ((cpu->path.type != DEVICE_PATH_APIC) ||
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(cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
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continue;
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}
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if (!cpu->enabled)
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continue;
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current += acpi_create_madt_lapic((acpi_madt_lapic_t *)current,
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num_cpus, cpu->path.apic.apic_id);
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num_cpus++;
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}
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return current;
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}
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