From d925ca70d9c0f2f918c578fb0faabfb62b065096 Mon Sep 17 00:00:00 2001 From: Amanda Huang Date: Tue, 2 Mar 2021 14:40:50 +0800 Subject: [PATCH] util: Add new memory part to LP4x list Add memory part MT53E2G32D4NQ-046 to LP4x global list. Attributes are derived from data sheets.Also, regenerate the SPD files for ADL SoC using the newly added parts. BUG=b:181378727 TEST=Compared generated SPD with data sheets and checked in SPD Change-Id: Ic06e9d672a2d3db2b4ea12d15b462843c90db8f6 Signed-off-by: Amanda Huang Reviewed-on: https://review.coreboot.org/c/coreboot/+/51167 Tested-by: build bot (Jenkins) Reviewed-by: EricR Lai Reviewed-by: Tim Wawrzynczak Reviewed-by: Furquan Shaikh --- src/soc/intel/alderlake/spd/lp4x-spd-6.hex | 32 +++++++++++++++++++ src/soc/intel/alderlake/spd/lp4x-spd-7.hex | 32 +++++++++++++++++++ .../spd/lp4x_spd_manifest.generated.txt | 3 ++ .../lp4x/global_lp4x_mem_parts.json.txt | 12 +++++++ 4 files changed, 79 insertions(+) create mode 100644 src/soc/intel/alderlake/spd/lp4x-spd-6.hex create mode 100644 src/soc/intel/alderlake/spd/lp4x-spd-7.hex diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-6.hex b/src/soc/intel/alderlake/spd/lp4x-spd-6.hex new file mode 100644 index 000000000000..9c49a0008743 --- /dev/null +++ b/src/soc/intel/alderlake/spd/lp4x-spd-6.hex @@ -0,0 +1,32 @@ +23 11 11 0E 14 19 94 08 00 00 00 00 02 01 00 00 +00 00 04 0A 80 54 05 00 87 00 90 A8 90 A0 05 D0 +02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 E5 00 E0 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-7.hex b/src/soc/intel/alderlake/spd/lp4x-spd-7.hex new file mode 100644 index 000000000000..cadc3582f3a1 --- /dev/null +++ b/src/soc/intel/alderlake/spd/lp4x-spd-7.hex @@ -0,0 +1,32 @@ +23 11 11 0E 16 29 B4 08 00 00 00 00 0A 01 00 00 +00 00 04 FF 92 54 05 00 87 00 90 A8 90 E0 0B F0 +05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 E5 00 E0 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt index f09a27f7f7bf..347118de12d4 100644 --- a/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt +++ b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt @@ -17,3 +17,6 @@ H9HCNNNCRMBLPR-NEE,lp4x-spd-1.hex H9HCNNNFBMBLPR-NEE,lp4x-spd-3.hex MT53D1G64D4NW-046 WT:A,lp4x-spd-4.hex MT53D512M64D4NW-046 WT:F,lp4x-spd-1.hex +NT6AP256T32AV-J1,lp4x-spd-6.hex +MT53E1G32D4NQ-046 WT:E,lp4x-spd-3.hex +MT53E2G32D4NQ-046 WT:A,lp4x-spd-7.hex diff --git a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt index fcbe624d9b02..2cc1fa49b824 100644 --- a/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt +++ b/util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt @@ -255,6 +255,18 @@ "ranksPerChannel": 2, "speedMbps": 4267 } + }, + { + "name": "MT53E2G32D4NQ-046 WT:A", + "attribs": { + "densityPerChannelGb": 16, + "banks": 8, + "channelsPerDie": 2, + "diesPerPackage": 2, + "bitWidthPerChannel": 16, + "ranksPerChannel": 2, + "speedMbps": 4267 + } } ] }