mb/asus/h61m-cs: Transform into variant setup

To preserve reproducibility, temporarily guard mainboard.c contents.
This will be removed once all boards have become variants.

Tested with BUILD_TIMELESS=1, coreboot.rom for the Asus H61M-CS
remains identical when not adding the .config file in it.

Change-Id: I1ffb41470d24713a4a7f0689958b733d4b1bdf52
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54374
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/mainboard/asus/h61-series/Kconfig

@@ -19,11 +19,13 @@ config MAINBOARD_DIR
 
 config VARIANT_DIR
 	string
+	default "h61m-cs"          if BOARD_ASUS_H61M_CS
 	default "p8h61-m_lx3_r2_0" if BOARD_ASUS_P8H61_M_LX3_R2_0
 	default "p8h61-m_pro"      if BOARD_ASUS_P8H61_M_PRO
 
 config MAINBOARD_PART_NUMBER
 	string
+	default "H61M-CS"          if BOARD_ASUS_H61M_CS
 	default "P8H61-M LX3 R2.0" if BOARD_ASUS_P8H61_M_LX3_R2_0
 	default "P8H61-M PRO"      if BOARD_ASUS_P8H61_M_PRO
 

src/mainboard/asus/h61-series/Kconfig.name

@@ -1,3 +1,13 @@
+config BOARD_ASUS_H61M_CS
+	bool "H61M-CS"
+	select BOARD_ASUS_H61_SERIES
+	select BOARD_ROMSIZE_KB_8192
+	select HAVE_CMOS_DEFAULT
+	select HAVE_OPTION_TABLE
+	select INTEL_INT15
+	select NO_UART_ON_SUPERIO
+	select SUPERIO_NUVOTON_NCT6779D
+
 config BOARD_ASUS_P8H61_M_LX3_R2_0
 	bool "P8H61-M LX3 R2.0"
 	select BOARD_ASUS_H61_SERIES

src/mainboard/asus/h61-series/mainboard.c

@@ -1,5 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+/* TODO: remove */
+#if CONFIG(INTEL_INT15)
+
 #include <device/device.h>
 #include <drivers/intel/gma/int15.h>
 
@@ -13,3 +16,5 @@ static void mainboard_enable(struct device *dev)
 struct chip_operations mainboard_ops = {
 	.enable_dev = mainboard_enable,
 };
+
+#endif

src/mainboard/asus/h61m-cs/Kconfig

@@ -1,27 +0,0 @@
-if BOARD_ASUS_H61M_CS
-
-config BOARD_SPECIFIC_OPTIONS
-	def_bool y
-	select BOARD_ROMSIZE_KB_8192
-	select HAVE_ACPI_RESUME
-	select HAVE_ACPI_TABLES
-	select HAVE_CMOS_DEFAULT
-	select HAVE_OPTION_TABLE
-	select INTEL_GMA_HAVE_VBT
-	select INTEL_INT15
-	select MAINBOARD_HAS_LIBGFXINIT
-	select NO_UART_ON_SUPERIO
-	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-	select SERIRQ_CONTINUOUS_MODE
-	select SOUTHBRIDGE_INTEL_BD82X6X
-	select SUPERIO_NUVOTON_NCT6779D
-	select USE_NATIVE_RAMINIT
-
-config MAINBOARD_DIR
-	string
-	default "asus/h61m-cs"
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "H61M-CS"
-endif

src/mainboard/asus/h61m-cs/Kconfig.name

@@ -1,2 +0,0 @@
-config BOARD_ASUS_H61M_CS
-	bool "H61M-CS"

src/mainboard/asus/h61m-cs/Makefile.inc

@@ -1,5 +0,0 @@
-bootblock-y += gpio.c
-romstage-y += gpio.c
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-bootblock-y += early_init.c
-romstage-y += early_init.c

src/mainboard/asus/h61m-cs/acpi/platform.asl

@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-Method(_PTS,1)
-{
-}
-
-Method(_WAK,1)
-{
-	Return(Package(){0,0})
-}

src/mainboard/asus/h61m-cs/acpi/superio.asl

@@ -1 +0,0 @@
-#include <drivers/pc80/pc/ps2_controller.asl>

src/mainboard/asus/h61m-cs/dsdt.asl

@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-
-#include <acpi/acpi.h>
-DefinitionBlock(
-	"dsdt.aml",
-	"DSDT",
-	ACPI_DSDT_REV_2,
-	OEM_ID,
-	ACPI_TABLE_CREATOR,
-	0x20141018	// OEM revision
-)
-{
-	#include <acpi/dsdt_top.asl>
-	#include "acpi/platform.asl"
-	#include <cpu/intel/common/acpi/cpu.asl>
-	#include <southbridge/intel/common/acpi/platform.asl>
-	/* global NVS and variables.  */
-	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-	#include <southbridge/intel/common/acpi/sleepstates.asl>
-
-	Device (\_SB.PCI0) {
-		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-	}
-}