cbfs: Simplify load/map API names, remove type arguments

This patch renames cbfs_boot_map_with_leak() and cbfs_boot_load_file()
to cbfs_map() and cbfs_load() respectively. This is supposed to be the
start of a new, better organized CBFS API where the most common
operations have the most simple and straight-forward names. Less
commonly used variants of these operations (e.g. cbfs_ro_load() or
cbfs_region_load()) can be introduced later. It seems unnecessary to
keep carrying around "boot" in the names of most CBFS APIs if the vast
majority of accesses go to the boot CBFS (instead, more unusual
operations should have longer names that describe how they diverge from
the common ones).

cbfs_map() is paired with a new cbfs_unmap() to allow callers to cleanly
reap mappings when desired. A few new cbfs_unmap() calls are added to
generic code where it makes sense, but it seems unnecessary to introduce
this everywhere in platform or architecture specific code where the boot
medium is known to be memory-mapped anyway. In fact, even for
non-memory-mapped platforms, sometimes leaking a mapping to the CBFS
cache is a much cleaner solution than jumping through hoops to provide
some other storage for some long-lived file object, and it shouldn't be
outright forbidden when it makes sense.

Additionally, remove the type arguments from these function signatures.
The goal is to eventually remove type arguments for lookup from the
whole CBFS API. Filenames already uniquely identify CBFS files. The type
field is just informational, and there should be APIs to allow callers
to check it when desired, but it's not clear what we gain from forcing
this as a parameter into every single CBFS access when the vast majority
of the time it provides no additional value and is just clutter.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ib24325400815a9c3d25f66c61829a24a239bb88e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39304
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Mariusz Szafrański <mariuszx.szafranski@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/acpi/acpi.c

@@ -1340,9 +1340,7 @@ unsigned long write_acpi_tables(unsigned long start)
 		return fw;
 	}
 
-	dsdt_file = cbfs_boot_map_with_leak(
-				     CONFIG_CBFS_PREFIX "/dsdt.aml",
-				     CBFS_TYPE_RAW, &dsdt_size);
+	dsdt_file = cbfs_map(CONFIG_CBFS_PREFIX "/dsdt.aml", &dsdt_size);
 	if (!dsdt_file) {
 		printk(BIOS_ERR, "No DSDT file, skipping ACPI tables\n");
 		return current;
@@ -1355,8 +1353,7 @@ unsigned long write_acpi_tables(unsigned long start)
 		return current;
 	}
 
-	slic_file = cbfs_boot_map_with_leak(CONFIG_CBFS_PREFIX "/slic",
-				     CBFS_TYPE_RAW, &slic_size);
+	slic_file = cbfs_map(CONFIG_CBFS_PREFIX "/slic", &slic_size);
 	if (slic_file
 	    && (slic_file->length > slic_size
 		|| slic_file->length < sizeof(acpi_header_t)

src/arch/x86/bootblock_normal.c

@@ -18,7 +18,7 @@ int legacy_romstage_selector(struct prog *romstage)
 	const char *boot_candidate;
 	size_t stages_len;
 
-	boot_candidate = cbfs_boot_map_with_leak("coreboot-stages", CBFS_TYPE_RAW, &stages_len);
+	boot_candidate = cbfs_map("coreboot-stages", &stages_len);
 	if (!boot_candidate)
 		boot_candidate = default_filenames;
 

src/cpu/amd/pi/00730F01/update_microcode.c

@@ -115,8 +115,7 @@ void amd_update_microcode_from_cbfs(void)
 	size_t ucode_len;
 	uint16_t equivalent_processor_rev_id = get_equivalent_processor_rev_id();
 
-	ucode = cbfs_boot_map_with_leak("cpu_microcode_blob.bin",
-					CBFS_TYPE_MICROCODE, &ucode_len);
+	ucode = cbfs_map("cpu_microcode_blob.bin", &ucode_len);
 	if (!ucode) {
 		printk(BIOS_WARNING, "cpu_microcode_blob.bin not found. Skipping updates.\n");
 		return;

src/cpu/intel/microcode/microcode.c

@@ -126,9 +126,7 @@ const void *intel_microcode_find(void)
 	unsigned int x86_model, x86_family;
 	msr_t msr;
 
-	ucode_updates = cbfs_boot_map_with_leak(MICROCODE_CBFS_FILE,
-						CBFS_TYPE_MICROCODE,
-						&microcode_len);
+	ucode_updates = cbfs_map(MICROCODE_CBFS_FILE, &microcode_len);
 	if (ucode_updates == NULL)
 		return NULL;
 

src/drivers/amd/agesa/def_callouts.c

@@ -121,9 +121,7 @@ AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINTN Data, VOID *ConfigPtr)
 AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINTN FchData, VOID *ConfigPrt)
 {
 	GFX_VBIOS_IMAGE_INFO  *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
-	pVbiosImageInfo->ImagePtr = cbfs_boot_map_with_leak(
-			"pci"CONFIG_VGA_BIOS_ID".rom",
-			CBFS_TYPE_OPTIONROM, NULL);
+	pVbiosImageInfo->ImagePtr = cbfs_map("pci"CONFIG_VGA_BIOS_ID".rom", NULL);
 	/* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
 	return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
 }

src/drivers/amd/agesa/state_machine.c

@@ -30,8 +30,7 @@ static void agesa_locate_image(AMD_CONFIG_PARAMS *StdHeader)
 	const void *agesa, *image;
 	size_t file_size;
 
-	agesa = cbfs_boot_map_with_leak((const char *)CONFIG_AGESA_CBFS_NAME,
-			CBFS_TYPE_RAW, &file_size);
+	agesa = cbfs_map((const char *)CONFIG_AGESA_CBFS_NAME, &file_size);
 	if (agesa == NULL)
 		return;
 

src/drivers/intel/fsp1_1/logo.c

@@ -13,8 +13,8 @@ const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size)
 	if (logo_entry) {
 		logo_buffer = cbmem_entry_start(logo_entry);
 		if (logo_buffer) {
-			*logo_size = cbfs_boot_load_file("logo.bmp", (void *)logo_buffer,
-							1 * MiB, CBFS_TYPE_RAW);
+			*logo_size = cbfs_load("logo.bmp", (void *)logo_buffer,
+						1 * MiB);
 			if (*logo_size)
 				*logo_ptr = (UINT32)logo_buffer;
 		}

src/drivers/intel/fsp2_0/logo.c

@@ -13,8 +13,8 @@ const struct cbmem_entry *fsp_load_logo(UINT32 *logo_ptr, UINT32 *logo_size)
 	if (logo_entry) {
 		logo_buffer = cbmem_entry_start(logo_entry);
 		if (logo_buffer) {
-			*logo_size = cbfs_boot_load_file("logo.bmp", (void *)logo_buffer,
-							1 * MiB, CBFS_TYPE_RAW);
+			*logo_size = cbfs_load("logo.bmp", (void *)logo_buffer,
+						1 * MiB);
 			if (*logo_size)
 				*logo_ptr = (UINT32)logo_buffer;
 		}

src/drivers/intel/gma/opregion.c

@@ -34,8 +34,7 @@ void *locate_vbt(size_t *vbt_size)
 
 	const char *filename = mainboard_vbt_filename();
 
-	size_t file_size = cbfs_boot_load_file(filename,
-		vbt_data, sizeof(vbt_data), CBFS_TYPE_RAW);
+	size_t file_size = cbfs_load(filename, vbt_data, sizeof(vbt_data));
 
 	if (file_size == 0)
 		return NULL;

src/drivers/pc80/rtc/option.c

@@ -237,8 +237,7 @@ void sanitize_cmos(void)
 	size_t i;
 
 	if (CONFIG(TPM_MEASURED_BOOT) || cmos_need_reset) {
-		cmos_default = cbfs_boot_map_with_leak("cmos.default",
-			CBFS_COMPONENT_CMOS_DEFAULT, &length);
+		cmos_default = cbfs_map("cmos.default", &length);
 
 		if (!cmos_default || !cmos_need_reset)
 			return;

src/include/cbfs.h

@@ -18,19 +18,22 @@ void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device);
 void *cbfs_boot_map_optionrom_revision(uint16_t vendor, uint16_t device, uint8_t rev);
 /* Locate file by name and optional type. Return 0 on success. < 0 on error. */
 int cbfs_boot_locate(struct cbfsf *fh, const char *name, uint32_t *type);
-/* Map file into memory leaking the mapping. Only should be used when
- * leaking mappings are a no-op. Returns NULL on error, else returns
- * the mapping and sets the size of the file. */
-void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size);
+/* Map file into memory, returning a pointer to the mapping or NULL on error.
+   If |size_out| is not NULL, it will pass out the size of the mapped file.
+   NOTE: Since this may return a direct pointer to memory-mapped hardware,
+   compressed files are NOT transparently decompressed (unlike cbfs_load()). */
+void *cbfs_map(const char *name, size_t *size_out);
+/* Removes a mapping previously allocated with cbfs_map(). Should try to unmap
+   mappings in strict LIFO order where possible, since mapping backends often
+   don't support more complicated cases. */
+int cbfs_unmap(void *mapping);
 /* Locate file in a specific region of fmap. Return 0 on success. < 0 on error*/
 int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
 		const char *name, uint32_t *type);
-/* Load an arbitrary type file from CBFS into a buffer. Returns amount of
- * loaded bytes on success or 0 on error. File will get decompressed as
- * necessary.  Same decompression requirements as
- * cbfs_load_and_decompress(). */
-size_t cbfs_boot_load_file(const char *name, void *buf, size_t buf_size,
-	uint32_t type);
+/* Load a file from CBFS into a buffer. Returns amount of loaded bytes on
+   success or 0 on error. File will get decompressed as necessary. Same
+   decompression requirements as cbfs_load_and_decompress(). */
+size_t cbfs_load(const char *name, void *buf, size_t buf_size);
 /* Load |in_size| bytes from |rdev| at |offset| to the |buffer_size| bytes
  * large |buffer|, decompressing it according to |compression| in the process.
  * Returns the decompressed file size, or 0 on error.

src/lib/bootsplash.c

@@ -16,8 +16,7 @@ void set_bootsplash(unsigned char *framebuffer, unsigned int x_resolution,
 	printk(BIOS_INFO, "Setting up bootsplash in %dx%d@%d\n", x_resolution, y_resolution,
 	       fb_resolution);
 	struct jpeg_decdata *decdata;
-	unsigned char *jpeg =
-		cbfs_boot_map_with_leak("bootsplash.jpg", CBFS_TYPE_BOOTSPLASH, NULL);
+	unsigned char *jpeg = cbfs_map("bootsplash.jpg", NULL);
 	if (!jpeg) {
 		printk(BIOS_ERR, "Could not find bootsplash.jpg\n");
 		return;
@@ -31,6 +30,7 @@ void set_bootsplash(unsigned char *framebuffer, unsigned int x_resolution,
 	decdata = malloc(sizeof(*decdata));
 	int ret = jpeg_decode(jpeg, framebuffer, x_resolution, y_resolution, fb_resolution,
 			      decdata);
+	cbfs_unmap(jpeg);
 	if (ret != 0) {
 		printk(BIOS_ERR, "Bootsplash could not be decoded. jpeg_decode returned %d.\n",
 		       ret);

src/lib/cbfs.c

@@ -70,22 +70,29 @@ int cbfs_boot_locate(struct cbfsf *fh, const char *name, uint32_t *type)
 	return 0;
 }
 
-void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size)
+void *cbfs_map(const char *name, size_t *size_out)
 {
 	struct cbfsf fh;
 	size_t fsize;
 
-	if (cbfs_boot_locate(&fh, name, &type))
+	if (cbfs_boot_locate(&fh, name, NULL))
 		return NULL;
 
 	fsize = region_device_sz(&fh.data);
 
-	if (size != NULL)
-		*size = fsize;
+	if (size_out != NULL)
+		*size_out = fsize;
 
 	return rdev_mmap(&fh.data, 0, fsize);
 }
 
+int cbfs_unmap(void *mapping)
+{
+	/* This works because munmap() only works on the root rdev and never
+	   cares about which chained subregion something was mapped from. */
+	return rdev_munmap(boot_device_ro(), mapping);
+}
+
 int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
 			       const char *name, uint32_t *type)
 {
@@ -262,7 +269,7 @@ void *cbfs_boot_map_optionrom(uint16_t vendor, uint16_t device)
 	tohex16(vendor, name + 3);
 	tohex16(device, name + 8);
 
-	return cbfs_boot_map_with_leak(name, CBFS_TYPE_OPTIONROM, NULL);
+	return cbfs_map(name, NULL);
 }
 
 void *cbfs_boot_map_optionrom_revision(uint16_t vendor, uint16_t device, uint8_t rev)
@@ -273,17 +280,16 @@ void *cbfs_boot_map_optionrom_revision(uint16_t vendor, uint16_t device, uint8_t
 	tohex16(device, name + 8);
 	tohex8(rev, name + 13);
 
-	return cbfs_boot_map_with_leak(name, CBFS_TYPE_OPTIONROM, NULL);
+	return cbfs_map(name, NULL);
 }
 
-size_t cbfs_boot_load_file(const char *name, void *buf, size_t buf_size,
-			   uint32_t type)
+size_t cbfs_load(const char *name, void *buf, size_t buf_size)
 {
 	struct cbfsf fh;
 	uint32_t compression_algo;
 	size_t decompressed_size;
 
-	if (cbfs_boot_locate(&fh, name, &type) < 0)
+	if (cbfs_boot_locate(&fh, name, NULL) < 0)
 		return 0;
 
 	if (cbfsf_decompression_info(&fh, &compression_algo,

src/lib/coreboot_table.c

@@ -455,8 +455,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end)
 #if CONFIG(USE_OPTION_TABLE)
 	{
 		struct cmos_option_table *option_table =
-			cbfs_boot_map_with_leak("cmos_layout.bin",
-				CBFS_COMPONENT_CMOS_LAYOUT, NULL);
+			cbfs_map("cmos_layout.bin", NULL);
 		if (option_table) {
 			struct lb_record *rec_dest = lb_new_record(head);
 			/* Copy the option config table, it's already a

src/lib/fw_config.c

@@ -24,9 +24,8 @@ uint64_t fw_config_get(void)
 
 	/* Look in CBFS to allow override of value. */
 	if (CONFIG(FW_CONFIG_SOURCE_CBFS)) {
-		if (cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/fw_config",
-					&fw_config_value, sizeof(fw_config_value),
-					CBFS_TYPE_RAW) != sizeof(fw_config_value)) {
+		if (cbfs_load(CONFIG_CBFS_PREFIX "/fw_config", &fw_config_value,
+			      sizeof(fw_config_value)) != sizeof(fw_config_value)) {
 			printk(BIOS_WARNING, "%s: Could not get fw_config from CBFS\n",
 			       __func__);
 			fw_config_value = 0;

src/lib/spd_bin.c

@@ -227,12 +227,11 @@ int read_ddr3_spd_from_cbfs(u8 *buf, int idx)
 	const int SPD_CRC_HI = 127;
 	const int SPD_CRC_LO = 126;
 
-	const char *spd_file;
+	char *spd_file;
 	size_t spd_file_len = 0;
 	size_t min_len = (idx + 1) * CONFIG_DIMM_SPD_SIZE;
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		printk(BIOS_EMERG, "file [spd.bin] not found in CBFS");
 	if (spd_file_len < min_len)
@@ -242,6 +241,7 @@ int read_ddr3_spd_from_cbfs(u8 *buf, int idx)
 
 	memcpy(buf, spd_file + (idx * CONFIG_DIMM_SPD_SIZE),
 		CONFIG_DIMM_SPD_SIZE);
+	cbfs_unmap(spd_file);
 
 	u16 crc = spd_ddr3_calc_crc(buf, CONFIG_DIMM_SPD_SIZE);
 

src/mainboard/apple/macbookair4_2/early_init.c

@@ -26,8 +26,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
 {
 	void *spd_file;
 	size_t spd_file_len = 0;
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (spd_file && spd_file_len >= 1024) {
 		int i;
 		for (i = 0; i < 4; i++)

src/mainboard/dell/optiplex_9010/sch5545_ec.c

@@ -442,8 +442,7 @@ void sch5545_update_ec_firmware(uint16_t ec_version)
 	uint32_t *ec_fw_file;
 	size_t ec_fw_file_size;
 
-	ec_fw_file = cbfs_boot_map_with_leak("sch5545_ecfw.bin", CBFS_TYPE_RAW,
-					     &ec_fw_file_size);
+	ec_fw_file = cbfs_map("sch5545_ecfw.bin", &ec_fw_file_size);
 
 	if (!ec_fw_file || ec_fw_file_size != 0x1750) {
 		printk(BIOS_ERR, "EC firmware file not found in CBFS!\n");

src/mainboard/google/asurada/sdram_configs.c

@@ -17,8 +17,7 @@ const struct sdram_info *get_sdram_config(void)
 	uint32_t ramcode = ram_code();
 
 	if (ramcode >= ARRAY_SIZE(sdram_configs) ||
-	    cbfs_boot_load_file(sdram_configs[ramcode], &params, sizeof(params),
-				CBFS_TYPE_STRUCT) != sizeof(params))
+	    cbfs_load(sdram_configs[ramcode], &params, sizeof(params)) != sizeof(params))
 		die("Cannot load SDRAM parameter file for RAM code: %#x", ramcode);
 
 	return &params;

src/mainboard/google/auron/variants/auron_paine/spd/spd.c

@@ -88,7 +88,7 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
 	       spd_bits[1], spd_gpio[1],
 	       spd_bits[0], spd_gpio[0]);
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", 0xab, &spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/auron/variants/auron_yuna/spd/spd.c

@@ -88,7 +88,7 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
 	       spd_bits[1], spd_gpio[1],
 	       spd_bits[0], spd_gpio[0]);
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", 0xab, &spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/auron/variants/buddy/variant.c

@@ -129,9 +129,7 @@ static void program_mac_address(u16 io_base)
 				search_length = region_device_sz(&rdev);
 		}
 	} else {
-		search_address = cbfs_boot_map_with_leak("vpd.bin",
-							CBFS_TYPE_RAW,
-							&search_length);
+		search_address = cbfs_map("vpd.bin", &search_length);
 	}
 
 	if (search_address == NULL)

src/mainboard/google/auron/variants/gandof/spd/spd.c

@@ -88,7 +88,7 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
 	       spd_bits[1], spd_gpio[1],
 	       spd_bits[0], spd_gpio[0]);
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", 0xab, &spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/auron/variants/lulu/spd/spd.c

@@ -92,7 +92,7 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
 		spd_bits[1], spd_gpio[1],
 		spd_bits[0], spd_gpio[0]);
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", 0xab, &spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/auron/variants/samus/spd/spd.c

@@ -88,7 +88,7 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
 	       spd_bits[3], spd_gpio[3], spd_bits[2], spd_gpio[2],
 	       spd_bits[1], spd_gpio[1], spd_bits[0], spd_gpio[0]);
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", 0xab, &spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/beltino/lan.c

@@ -110,9 +110,7 @@ static void program_mac_address(u16 io_base)
 				search_length = region_device_sz(&rdev);
 		}
 	} else {
-		search_address = cbfs_boot_map_with_leak("vpd.bin",
-							CBFS_TYPE_RAW,
-							&search_length);
+		search_address = cbfs_map("vpd.bin", &search_length);
 	}
 
 	if (search_address == NULL)

src/mainboard/google/butterfly/mainboard.c

@@ -180,8 +180,7 @@ static void mainboard_init(struct device *dev)
 			}
 		}
 	} else {
-		vpd_file = cbfs_boot_map_with_leak("vpd.bin", CBFS_TYPE_RAW,
-							&search_length);
+		vpd_file = cbfs_map("vpd.bin", &search_length);
 		if (vpd_file) {
 			search_address = (unsigned long)vpd_file;
 		} else {

src/mainboard/google/cyan/spd/spd.c

@@ -35,8 +35,7 @@ static void *get_spd_pointer(int *dual)
 	int spd_index = 0;
 
 	/* Find the SPD data in CBFS. */
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-		&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/eve/spd/spd.c

@@ -82,8 +82,7 @@ uintptr_t mainboard_get_spd_data(void)
 	printk(BIOS_INFO, "SPD index %d\n", spd_index);
 
 	/* Load SPD data from CBFS */
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-		&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/glados/spd/spd.c

@@ -79,8 +79,7 @@ void spd_memory_init_params(FSPM_UPD *mupd, int spd_index)
 	printk(BIOS_INFO, "SPD index %d\n", spd_index);
 
 	/* Load SPD data from CBFS */
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-		&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/gru/sdram_configs.c

@@ -53,8 +53,7 @@ const struct rk3399_sdram_params *get_sdram_config()
 	if (ramcode >= ARRAY_SIZE(sdram_configs) ||
 	    !snprintf(config_file, sizeof(config_file), "%s-%d",
 	    sdram_configs[ramcode], get_sdram_target_mhz()) ||
-	    (cbfs_boot_load_file(config_file, &params, sizeof(params),
-				 CBFS_TYPE_STRUCT) != sizeof(params)))
+	    (cbfs_load(config_file, &params, sizeof(params)) != sizeof(params)))
 		die("Cannot load SDRAM parameter file!");
 
 	return &params;

src/mainboard/google/jecht/lan.c

@@ -110,9 +110,7 @@ static void program_mac_address(u16 io_base)
 				search_length = region_device_sz(&rdev);
 		}
 	} else {
-		search_address = cbfs_boot_map_with_leak("vpd.bin",
-							CBFS_TYPE_RAW,
-							&search_length);
+		search_address = cbfs_map("vpd.bin", &search_length);
 	}
 
 	if (search_address == NULL)

src/mainboard/google/kahlee/variants/baseboard/mainboard.c

@@ -89,9 +89,7 @@ const char *smbios_mainboard_manufacturer(void)
 	if (manuf)
 		return manuf;
 
-	if (cbfs_boot_load_file("oem.bin", oem_bin_data,
-					    sizeof(oem_bin_data) - 1,
-					    CBFS_TYPE_RAW))
+	if (cbfs_load("oem.bin", oem_bin_data, sizeof(oem_bin_data) - 1))
 		manuf = &oem_bin_data[0];
 	else
 		manuf = CONFIG_MAINBOARD_SMBIOS_MANUFACTURER;

src/mainboard/google/kahlee/variants/nuwani/mainboard.c

@@ -101,9 +101,7 @@ const char *smbios_mainboard_manufacturer(void)
 	if (manuf)
 		return manuf;
 
-	if (cbfs_boot_load_file("oem.bin", oem_bin_data,
-					    sizeof(oem_bin_data) - 1,
-					    CBFS_TYPE_RAW))
+	if (cbfs_load("oem.bin", oem_bin_data, sizeof(oem_bin_data) - 1))
 		manuf = &oem_bin_data[0];
 	else
 		manuf = CONFIG_MAINBOARD_SMBIOS_MANUFACTURER;

src/mainboard/google/kahlee/variants/treeya/mainboard.c

@@ -101,9 +101,7 @@ const char *smbios_mainboard_manufacturer(void)
 	if (manuf)
 		return manuf;
 
-	if (cbfs_boot_load_file("oem.bin", oem_bin_data,
-					    sizeof(oem_bin_data) - 1,
-					    CBFS_TYPE_RAW))
+	if (cbfs_load("oem.bin", oem_bin_data, sizeof(oem_bin_data) - 1))
 		manuf = &oem_bin_data[0];
 	else
 		manuf = CONFIG_MAINBOARD_SMBIOS_MANUFACTURER;

src/mainboard/google/kukui/mainboard.c

@@ -112,8 +112,7 @@ struct panel_description *get_panel_from_cbfs(struct panel_description *desc)
 		return NULL;
 
 	snprintf(cbfs_name, sizeof(cbfs_name), "panel-%s", desc->name);
-	if (cbfs_boot_load_file(cbfs_name, buffer.raw, sizeof(buffer),
-				CBFS_TYPE_STRUCT))
+	if (cbfs_load(cbfs_name, buffer.raw, sizeof(buffer)))
 		desc->s = &buffer.s;
 	else
 		printk(BIOS_ERR, "Missing %s in CBFS.\n", cbfs_name);

src/mainboard/google/kukui/sdram_configs.c

@@ -43,8 +43,7 @@ const struct sdram_params *get_sdram_config(void)
 	if (ramcode < ARRAY_SIZE(sdram_configs))
 		name = sdram_configs[ramcode];
 
-	if (!name || cbfs_boot_load_file(name, &params, sizeof(params),
-					 CBFS_TYPE_STRUCT) != sizeof(params))
+	if (!name || cbfs_load(name, &params, sizeof(params)) != sizeof(params))
 		die("Cannot load SDRAM parameter file for RAM code %#02x: %s!",
 		    ramcode, name ? name : "unknown");
 

src/mainboard/google/link/early_init.c

@@ -66,8 +66,7 @@ static uint8_t *locate_spd(void)
 	int spd_index = get_gpios(gpio_vector);
 
 	printk(BIOS_DEBUG, "spd index %d\n", spd_index);
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/poppy/romstage.c

@@ -112,8 +112,7 @@ static uintptr_t mainboard_get_spd_data(enum memory_type type, bool use_sec_spd)
 	printk(BIOS_INFO, "SPD index %d\n", spd_index);
 
 	/* Load SPD data from CBFS */
-	spd_file = cbfs_boot_map_with_leak(spd_bin, CBFS_TYPE_SPD,
-					   &spd_file_len);
+	spd_file = cbfs_map(spd_bin, &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/poppy/variants/nami/mainboard.c

@@ -155,9 +155,8 @@ const char *smbios_mainboard_manufacturer(void)
 	if (oem_id == OEM_UNKNOWN)
 		return CONFIG_MAINBOARD_SMBIOS_MANUFACTURER;
 
-	oem_data_size = cbfs_boot_load_file("oem.bin", oem_bin_data,
-					    sizeof(oem_bin_data),
-					    CBFS_TYPE_RAW);
+	oem_data_size = cbfs_load("oem.bin", oem_bin_data,
+				  sizeof(oem_bin_data));
 
 	while ((curr < oem_data_size) &&
 	       ((oem_data_size - curr) >= sizeof(*oem_entry))) {

src/mainboard/google/rambi/romstage.c

@@ -48,8 +48,7 @@ void mainboard_fill_mrc_params(struct mrc_params *mp)
 	void *spd_file;
 	size_t spd_fsize;
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_fsize);
+	spd_file = cbfs_map("spd.bin", &spd_fsize);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/rambi/variants/ninja/lan.c

@@ -109,9 +109,7 @@ static void program_mac_address(u16 io_base)
 				search_length = region_device_sz(&rdev);
 		}
 	} else {
-		search_address = cbfs_boot_map_with_leak("vpd.bin",
-							CBFS_TYPE_RAW,
-							&search_length);
+		search_address = cbfs_map("vpd.bin", &search_length);
 	}
 
 	if (search_address == NULL)

src/mainboard/google/rambi/variants/sumo/lan.c

@@ -109,9 +109,7 @@ static void program_mac_address(u16 io_base)
 				search_length = region_device_sz(&rdev);
 		}
 	} else {
-		search_address = cbfs_boot_map_with_leak("vpd.bin",
-							CBFS_TYPE_RAW,
-							&search_length);
+		search_address = cbfs_map("vpd.bin", &search_length);
 	}
 
 	if (search_address == NULL)

src/mainboard/google/slippy/variants/falco/romstage.c

@@ -21,8 +21,7 @@ void copy_spd(struct pei_data *peid)
 	size_t spd_len = sizeof(peid->spd_data[0]);
 
 	printk(BIOS_DEBUG, "SPD index %d\n", spd_index);
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/slippy/variants/leon/romstage.c

@@ -20,8 +20,7 @@ void copy_spd(struct pei_data *peid)
 	size_t spd_len = sizeof(peid->spd_data[0]);
 
 	printk(BIOS_DEBUG, "SPD index %d\n", spd_index);
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/slippy/variants/peppy/romstage.c

@@ -24,8 +24,7 @@ void copy_spd(struct pei_data *peid)
 	uint32_t board_version = PEPPY_BOARD_VERSION_PROTO;
 
 	printk(BIOS_DEBUG, "SPD index %d\n", spd_index);
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/google/slippy/variants/wolf/romstage.c

@@ -21,8 +21,7 @@ void copy_spd(struct pei_data *peid)
 	size_t spd_len = sizeof(peid->spd_data[0]);
 
 	printk(BIOS_DEBUG, "SPD index %d\n", spd_index);
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/early_init.c

@@ -39,8 +39,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
 {
 	/* C1S0 is a soldered RAM with no real SPD. Use stored SPD.  */
 	size_t spd_file_len = 0;
-	void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-		&spd_file_len);
+	void *spd_file = cbfs_map("spd.bin", &spd_file_len);
 
 	if (!spd_file || spd_file_len < sizeof(spd_raw_data))
 		die("SPD data for C1S0 not found.");

src/mainboard/intel/harcuvar/spd/spd.c

@@ -15,8 +15,7 @@ uint8_t *mainboard_find_spd_data()
 
 	spd_index = 0;
 
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-					   &spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/intel/kunimitsu/spd/spd_util.c

@@ -68,8 +68,7 @@ uintptr_t mainboard_get_spd_data(void)
 	printk(BIOS_INFO, "SPD index %d\n", spd_index);
 
 	/* Load SPD data from CBFS */
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-		&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/lenovo/s230u/early_init.c

@@ -70,8 +70,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
 		spd_index, mainboard_spd_names[spd_index]);
 
 	/* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-		&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 
 	if (!spd_file || spd_file_len < SPD_LEN * spd_index + SPD_LEN)
 		die("SPD data not found.");

src/mainboard/lenovo/t430s/variants/t431s/romstage.c

@@ -28,8 +28,7 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
 {
 	/* C1S0 is a soldered RAM with no real SPD. Use stored SPD. */
 	size_t spd_file_len = 0;
-	void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-		&spd_file_len);
+	void *spd_file = cbfs_map("spd.bin", &spd_file_len);
 
 	if (!spd_file || spd_file_len < sizeof(spd_raw_data))
 		die("SPD data for C1S0 not found.");

src/mainboard/lenovo/x1_carbon_gen1/early_init.c

@@ -32,8 +32,7 @@ static uint8_t *get_spd_data(int spd_index)
 	size_t spd_file_len;
 
 	printk(BIOS_DEBUG, "spd index %d\n", spd_index);
-	spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_file = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_file)
 		die("SPD data not found.");
 

src/mainboard/samsung/lumpy/early_init.c

@@ -104,8 +104,7 @@ static const uint8_t *locate_spd(void)
 		break;
 	}
 
-	spd_data = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD,
-						&spd_file_len);
+	spd_data = cbfs_map("spd.bin", &spd_file_len);
 	if (!spd_data)
 		die("SPD data not found.");
 	if (spd_file_len < (spd_index + 1) * 256)

src/mainboard/sifive/hifive-unleashed/fixup_fdt.c

@@ -72,7 +72,7 @@ static void fixup_fdt(void *unused)
 	struct device_tree *tree;
 
 	/* load flat dt from cbfs */
-	fdt_rom = cbfs_boot_map_with_leak("fallback/DTB", CBFS_TYPE_RAW, NULL);
+	fdt_rom = cbfs_map("fallback/DTB", NULL);
 
 	if (fdt_rom == NULL) {
 		printk(BIOS_ERR, "Unable to load fallback/DTB from CBFS\n");

src/northbridge/intel/sandybridge/raminit_mrc.c

@@ -148,7 +148,7 @@ void sdram_initialize(struct pei_data *pei_data)
 	pei_data->tx_byte = do_putchar;
 
 	/* Locate and call UEFI System Agent binary. */
-	entry = cbfs_boot_map_with_leak("mrc.bin", CBFS_TYPE_MRC, NULL);
+	entry = cbfs_map("mrc.bin", NULL);
 	if (entry) {
 		int rv;
 		rv = entry (pei_data);

src/security/intel/stm/StmPlatformSmm.c

@@ -35,8 +35,7 @@ int load_stm_image(uintptr_t mseg)
 
 	memset((void *)mseg_base, 0, CONFIG_MSEG_SIZE); // clear the mseg
 
-	stm_image_size = cbfs_boot_load_file("stm.bin", mseg_base,
-					     stm_buffer_size, CBFS_TYPE_RAW);
+	stm_image_size = cbfs_load("stm.bin", mseg_base, stm_buffer_size);
 	printk(BIOS_DEBUG, "STM:loaded into mseg: 0x%p size: %u\n", mseg_base,
 	       stm_image_size);
 	/* status is number of bytes loaded */

src/security/intel/txt/ramstage.c

@@ -221,10 +221,9 @@ static void txt_initialize_heap(void)
 	data.bdr.no_logical_procs = dev_count_cpu();
 
 	void *sinit_base = (void *)(uintptr_t)read64((void *)TXT_SINIT_BASE);
-	data.bdr.bios_sinit_size = cbfs_boot_load_file(CONFIG_INTEL_TXT_CBFS_SINIT_ACM,
-						       sinit_base,
-						       read64((void *)TXT_SINIT_SIZE),
-						       CBFS_TYPE_RAW);
+	data.bdr.bios_sinit_size = cbfs_load(CONFIG_INTEL_TXT_CBFS_SINIT_ACM,
+					     sinit_base,
+					     read64((void *)TXT_SINIT_SIZE));
 
 	if (data.bdr.bios_sinit_size) {
 		printk(BIOS_INFO, "TEE-TXT: Placing SINIT ACM in memory.\n");
@@ -277,9 +276,7 @@ static void txt_initialize_heap(void)
 		data.heap_acm.num_acms = 1;
 	}
 	data.heap_acm.acm_addrs[0] =
-		(uintptr_t)cbfs_boot_map_with_leak(CONFIG_INTEL_TXT_CBFS_BIOS_ACM,
-						   CBFS_TYPE_RAW,
-						   NULL);
+		(uintptr_t)cbfs_map(CONFIG_INTEL_TXT_CBFS_BIOS_ACM, NULL);
 	/* Extended elements - End marker */
 	data.end.type = HEAP_EXTDATA_TYPE_END;
 	data.end.size = sizeof(data.end);

src/security/vboot/ec_sync.c

@@ -385,7 +385,9 @@ static vb2_error_t ec_get_expected_hash(enum vb2_firmware_selection select,
 {
 	size_t size;
 	const char *filename = EC_HASH_FILENAME(select);
-	const uint8_t *file = cbfs_boot_map_with_leak(filename, CBFS_TYPE_RAW, &size);
+
+	/* vboot has no API to return this memory, so must permanently leak a mapping here. */
+	const uint8_t *file = cbfs_map(filename, &size);
 
 	if (file == NULL)
 		return VB2_ERROR_UNKNOWN;

src/soc/amd/common/block/pi/def_callouts.c

@@ -136,9 +136,8 @@ AGESA_STATUS agesa_GfxGetVbiosImage(uint32_t Func, uintptr_t FchData,
 	GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo;
 
 	pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
-	pVbiosImageInfo->ImagePtr = cbfs_boot_map_with_leak(
-			"pci"CONFIG_VGA_BIOS_ID".rom",
-			CBFS_TYPE_OPTIONROM, NULL);
+	pVbiosImageInfo->ImagePtr = cbfs_map(
+			"pci"CONFIG_VGA_BIOS_ID".rom", NULL);
 	printk(BIOS_DEBUG, "%s: IMGptr=%p\n", __func__,
 			pVbiosImageInfo->ImagePtr);
 	return pVbiosImageInfo->ImagePtr ? AGESA_SUCCESS : AGESA_WARNING;

src/soc/amd/picasso/update_microcode.c

@@ -80,8 +80,7 @@ void amd_update_microcode_from_cbfs(void)
 	size_t ucode_len;
 	uint16_t equivalent_processor_rev_id = get_equivalent_processor_rev_id();
 
-	ucode = cbfs_boot_map_with_leak("cpu_microcode_blob.bin",
-					CBFS_TYPE_MICROCODE, &ucode_len);
+	ucode = cbfs_map("cpu_microcode_blob.bin", &ucode_len);
 	if (!ucode) {
 		printk(BIOS_WARNING, "cpu_microcode_blob.bin not found. Skipping updates.\n");
 		return;

src/soc/cavium/cn81xx/soc.c

@@ -334,8 +334,7 @@ static void soc_init_atf(void)
 
 	size_t size = 0;
 
-	void *ptr = cbfs_boot_map_with_leak("sff8104-linux.dtb",
-					    CBFS_TYPE_RAW, &size);
+	void *ptr = cbfs_map("sff8104-linux.dtb", &size);
 	if (ptr)
 		memcpy(_sff8104, ptr, size);
 	/* Point to devicetree in secure memory */

src/soc/intel/baytrail/romstage/raminit.c

@@ -153,7 +153,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state)
 	}
 
 	/* Determine if mrc.bin is in the cbfs. */
-	if (cbfs_boot_map_with_leak("mrc.bin", CBFS_TYPE_MRC, NULL) == NULL) {
+	if (cbfs_map("mrc.bin", NULL) == NULL) {
 		printk(BIOS_DEBUG, "Couldn't find mrc.bin\n");
 		return;
 	}

src/soc/intel/common/mma.c

@@ -113,7 +113,7 @@ int mma_locate_param(struct mma_config_param *mma_cfg)
 	printk(BIOS_DEBUG, "MMA: Entry %s\n", __func__);
 
 	if (cbfs_locate_file_in_region(&metadata_fh, MMA_CBFS_REGION,
-				MMA_TEST_METADATA_FILENAME, &mma_type)) {
+				MMA_TEST_METADATA_FILENAME)) {
 		printk(BIOS_DEBUG, "MMA: Failed to locate %s\n",
 				MMA_TEST_METADATA_FILENAME);
 		return -1;
@@ -154,7 +154,7 @@ int mma_locate_param(struct mma_config_param *mma_cfg)
 			test_filename, test_param_filename);
 
 	if (cbfs_locate_file_in_region(&test_content_fh, MMA_CBFS_REGION,
-				test_filename, &efi_type)) {
+				test_filename)) {
 		printk(BIOS_DEBUG, "MMA: Failed to locate %s\n",
 				test_filename);
 		return -1;
@@ -163,7 +163,7 @@ int mma_locate_param(struct mma_config_param *mma_cfg)
 	cbfs_file_data(&mma_cfg->test_content, &test_content_fh);
 
 	if (cbfs_locate_file_in_region(&test_param_fh, MMA_CBFS_REGION,
-				test_param_filename, &mma_type)) {
+				test_param_filename)) {
 		printk(BIOS_DEBUG, "MMA: Failed to locate %s\n",
 				test_param_filename);
 		return -1;

src/soc/intel/denverton_ns/chip.c

@@ -84,8 +84,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
 	const struct microcode *microcode_file;
 	size_t microcode_len;
 
-	microcode_file = cbfs_boot_map_with_leak("cpu_microcode_blob.bin",
-		CBFS_TYPE_MICROCODE, &microcode_len);
+	microcode_file = cbfs_map("cpu_microcode_blob.bin", &microcode_len);
 
 	if ((microcode_file != NULL) && (microcode_len != 0)) {
 		/* Update CPU Microcode patch base address/size */

src/soc/intel/xeon_sp/skx/chip.c

@@ -59,8 +59,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
 	const struct microcode *microcode_file;
 	size_t microcode_len;
 
-	microcode_file = cbfs_boot_map_with_leak("cpu_microcode_blob.bin",
-		CBFS_TYPE_MICROCODE, &microcode_len);
+	microcode_file = cbfs_map("cpu_microcode_blob.bin", &microcode_len);
 
 	if ((microcode_file != NULL) && (microcode_len != 0)) {
 		/* Update CPU Microcode patch base address/size */

src/soc/mediatek/mt8183/spm.c

@@ -231,8 +231,7 @@ static int spm_load_firmware(enum dyna_load_pcm_index index,
 
 	stopwatch_init(&sw);
 
-	size_t file_size = cbfs_boot_load_file(file_name, spm_bin,
-					       sizeof(spm_bin), CBFS_TYPE_RAW);
+	size_t file_size = cbfs_load(file_name, spm_bin, sizeof(spm_bin));
 
 	if (file_size == 0) {
 		printk(BIOS_ERR, "SPM binary %s not found\n", file_name);

src/soc/mediatek/mt8183/sspm.c

@@ -13,10 +13,7 @@ static uint8_t sspm_bin[BUF_SIZE] __aligned(8);
 void sspm_init(void)
 {
 	const char *file_name = "sspm.bin";
-	size_t fw_size = cbfs_boot_load_file(file_name,
-					     sspm_bin,
-					     sizeof(sspm_bin),
-					     CBFS_TYPE_RAW);
+	size_t fw_size = cbfs_load(file_name, sspm_bin, sizeof(sspm_bin));
 
 	if (fw_size == 0)
 		die("SSPM file :sspm.bin not found.");

src/soc/qualcomm/ipq40xx/blobs_init.c

@@ -22,8 +22,7 @@ static void *load_ipq_blob(const char *file_name)
 	void *blob_dest;
 	size_t blob_size;
 
-	blob_mbn = cbfs_boot_map_with_leak(file_name, CBFS_TYPE_RAW,
-						&blob_size);
+	blob_mbn = cbfs_map(file_name, &blob_size);
 	if (!blob_mbn)
 		return NULL;
 

src/soc/qualcomm/ipq806x/blobs_init.c

@@ -18,8 +18,7 @@ static void *load_ipq_blob(const char *file_name)
 	void *blob_dest;
 	size_t blob_size;
 
-	blob_mbn = cbfs_boot_map_with_leak(file_name, CBFS_TYPE_RAW,
-						&blob_size);
+	blob_mbn = cbfs_map(file_name, &blob_size);
 	if (!blob_mbn)
 		return NULL;
 

src/soc/qualcomm/sc7180/qclib.c

@@ -11,15 +11,15 @@ int qclib_soc_blob_load(void)
 	size_t size;
 
 	/* Attempt to load PMICCFG Blob */
-	size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/pmiccfg",
-			_pmic, REGION_SIZE(pmic), CBFS_TYPE_RAW);
+	size = cbfs_load(CONFIG_CBFS_PREFIX "/pmiccfg",
+			_pmic, REGION_SIZE(pmic));
 	if (!size)
 		return -1;
 	qclib_add_if_table_entry(QCLIB_TE_PMIC_SETTINGS, _pmic, size, 0);
 
 	/* Attempt to load DCB Blob */
-	size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/dcb",
-			_dcb, REGION_SIZE(dcb), CBFS_TYPE_RAW);
+	size = cbfs_load(CONFIG_CBFS_PREFIX "/dcb",
+			_dcb, REGION_SIZE(dcb));
 	if (!size)
 		return -1;
 	qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, size, 0);

src/soc/qualcomm/sc7180/qupv3_config.c

@@ -27,10 +27,9 @@ void qupv3_se_fw_load_and_init(unsigned int bus, unsigned int protocol,
 		die("*ERROR*  * INVALID PROTOCOL ***\n");
 
 	if (!fw_list[protocol]) {
-		fw_list[protocol] = cbfs_boot_map_with_leak(filename[protocol],
-					CBFS_TYPE_RAW, NULL);
+		fw_list[protocol] = cbfs_map(filename[protocol], NULL);
 		if (!fw_list[protocol])
-			die("*ERROR*  * cbfs_boot_map_with_leak failed ***\n");
+			die("*ERROR*  * cbfs_map() failed ***\n");
 	}
 
 	hdr = fw_list[protocol];

src/vendorcode/eltan/security/mboot/mboot.c

@@ -234,7 +234,7 @@ int mb_measure_log_worker(const char *name, uint32_t type, uint32_t pcr,
 	size_t size;
 
 	printk(BIOS_DEBUG, "%s: Measure %s\n", __func__, name);
-	base = cbfs_boot_map_with_leak(name, type, &size);
+	base = cbfs_map(name, &size);
 
 	if (base == NULL) {
 		printk(BIOS_DEBUG, "%s: CBFS locate fail: %s\n", __func__, name);

src/vendorcode/eltan/security/verified_boot/vboot_check.c

@@ -33,7 +33,7 @@ int verified_boot_check_manifest(void)
 
 	sd = vb2_get_sd(ctx);
 
-	buffer = cbfs_boot_map_with_leak(RSA_PUBLICKEY_FILE_NAME, CBFS_TYPE_RAW, &size);
+	buffer = cbfs_map(RSA_PUBLICKEY_FILE_NAME, &size);
 	if (!buffer || !size) {
 		printk(BIOS_ERR, "ERROR: Public key not found!\n");
 		goto fail;
@@ -71,7 +71,7 @@ int verified_boot_check_manifest(void)
 	pre->flags = VB2_FIRMWARE_PREAMBLE_DISALLOW_HWCRYPTO;
 
 	/* Fill body_signature (vb2_structure). RSA2048 key is used */
-	cbfs_boot_map_with_leak("oemmanifest.bin", CBFS_TYPE_RAW, &size);
+	cbfs_map("oemmanifest.bin", &size);
 	if (size != ((CONFIG_VENDORCODE_ELTAN_OEM_MANIFEST_ITEMS * DIGEST_SIZE) + (2048/8))) {
 		printk(BIOS_ERR, "ERROR: Incorrect manifest size!\n");
 		goto fail;
@@ -183,7 +183,7 @@ void verified_boot_check_cbfsfile(const char *name, uint32_t type, uint32_t hash
 	void *start;
 	size_t size;
 
-	start = cbfs_boot_map_with_leak(name, type & ~VERIFIED_BOOT_COPY_BLOCK, &size);
+	start = cbfs_map(name, &size);
 	if (start && size) {
 		/* Speed up processing by copying the file content to memory first */
 		if (!ENV_ROMSTAGE_OR_BEFORE && (type & VERIFIED_BOOT_COPY_BLOCK)) {

src/vendorcode/google/chromeos/sar.c

@@ -16,8 +16,7 @@ static int load_sar_file_from_cbfs(void *buf, size_t buffer_size)
 	const char *filename = get_wifi_sar_cbfs_filename();
 	if (filename == NULL)
 		filename = WIFI_SAR_CBFS_FILENAME;
-	return cbfs_boot_load_file(filename, buf,
-			buffer_size, CBFS_TYPE_RAW);
+	return cbfs_load(filename, buf, buffer_size);
 }
 
 /* Retrieve the wifi SAR limits data from VPD and decode it

src/vendorcode/siemens/hwilib/hwilib.c

@@ -469,7 +469,7 @@ enum cb_err hwilib_find_blocks (const char *hwi_filename)
 		return CB_SUCCESS;
 	}
 
-	ptr = cbfs_boot_map_with_leak(hwi_filename, CBFS_TYPE_RAW, &filesize);
+	ptr = cbfs_map(hwi_filename, &filesize);
 	if (!ptr) {
 		printk(BIOS_ERR,"HWILIB: Missing file \"%s\" in cbfs.\n",
 			hwi_filename);