soc/inteL/broadwell: Move select CHROMEOS_RAMOOPS_DYNAMIC

With this selected, chromeos_reserve_ram_oops() is a no-op.

Change-Id: I2f3b7b3c4a9549a14f2ba039c769546f9698409a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/google/auron/Kconfig

@@ -19,9 +19,6 @@ config BOARD_GOOGLE_BASEBOARD_AURON
 
 if BOARD_GOOGLE_BASEBOARD_AURON
 
-config CHROMEOS
-	select CHROMEOS_RAMOOPS_DYNAMIC
-
 config VBOOT
 	select EC_GOOGLE_CHROMEEC_SWITCHES
 	select VBOOT_LID_SWITCH

src/mainboard/google/jecht/Kconfig

@@ -14,9 +14,6 @@ config BOARD_GOOGLE_BASEBOARD_JECHT
 
 if BOARD_GOOGLE_BASEBOARD_JECHT
 
-config CHROMEOS
-	select CHROMEOS_RAMOOPS_DYNAMIC
-
 config VBOOT
 	select VBOOT_VBNV_CMOS
 

src/mainboard/intel/wtm2/Kconfig

@@ -11,9 +11,6 @@ config BOARD_SPECIFIC_OPTIONS
 	select MAINBOARD_HAS_LPC_TPM
 	select INTEL_INT15
 
-config CHROMEOS
-	select CHROMEOS_RAMOOPS_DYNAMIC
-
 config VBOOT
 	select VBOOT_VBNV_CMOS
 

src/soc/intel/broadwell/Kconfig

@@ -73,6 +73,9 @@ config BROADWELL_VBOOT_IN_BOOTBLOCK
 	  binary is used meaning a jump is made from RW to the RO region
 	  and back to the RW region after the binary is done.
 
+config CHROMEOS
+	select CHROMEOS_RAMOOPS_DYNAMIC
+
 config VBOOT
 	select VBOOT_MUST_REQUEST_DISPLAY
 	select VBOOT_STARTS_IN_ROMSTAGE if !BROADWELL_VBOOT_IN_BOOTBLOCK

src/soc/intel/broadwell/northbridge.c

@@ -9,7 +9,6 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
-#include <vendorcode/google/chromeos/chromeos.h>
 #include <soc/acpi.h>
 #include <soc/iomap.h>
 #include <soc/pci_devs.h>
@@ -372,9 +371,6 @@ static void mc_add_dram_resources(struct device *dev, int *resource_cnt)
 	reserved_ram_resource(dev, index++, (0xc0000 >> 10),
 				(0x100000 - 0xc0000) >> 10);
 
-	if (CONFIG(CHROMEOS))
-		chromeos_reserve_ram_oops(dev, index++);
-
 	*resource_cnt = index;
 }