drivers/pc80/tpm: Remove LPC_TPM

Replace uses with MAINBOARD_HAS_LPC_TPM, if drivers/pc80/tpm
is present in devicetree.cb it is necessary to always include
the driver in the build.

Change-Id: I9ab921ab70f7b527a52fbf5f775aa063d9a706ce
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41872
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner
This commit is contained in:
Kyösti Mälkki 2020-05-29 19:42:07 +03:00 committed by Philipp Deppenwiese
parent 34cfeee406
commit 542cffacbb
11 changed files with 10 additions and 23 deletions

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -12,7 +12,6 @@ CONFIG_NO_POST=y
CONFIG_GBE_BIN_PATH="site-local/gbe.bin" CONFIG_GBE_BIN_PATH="site-local/gbe.bin"
CONFIG_PCIEXP_CLK_PM=y CONFIG_PCIEXP_CLK_PM=y
CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_LPC_TPM=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
CONFIG_PAYLOAD_NONE=y CONFIG_PAYLOAD_NONE=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y

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@ -1,13 +1,14 @@
config LPC_TPM config MAINBOARD_HAS_LPC_TPM
bool bool
default n default n
help help
LPC TPM driver is enabled! Board has LPC TPM support
if MAINBOARD_HAS_LPC_TPM
config TPM_TIS_BASE_ADDRESS config TPM_TIS_BASE_ADDRESS
hex hex
default 0xfed40000 default 0xfed40000
depends on LPC_TPM
help help
This can be used to adjust the TPM memory base address. This can be used to adjust the TPM memory base address.
The default is specified by the TCG PC Client Specific TPM The default is specified by the TCG PC Client Specific TPM
@ -17,14 +18,8 @@ config TPM_TIS_BASE_ADDRESS
config TPM_PIRQ config TPM_PIRQ
hex hex
default 0x0 default 0x0
depends on LPC_TPM
help help
This can be used to specify a PIRQ to use instead of SERIRQ, This can be used to specify a PIRQ to use instead of SERIRQ,
which is needed for SPI TPM interrupt support on x86. which is needed for SPI TPM interrupt support on x86.
config MAINBOARD_HAS_LPC_TPM endif
bool
default n
select LPC_TPM
help
Board has LPC TPM support

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@ -1,4 +1,4 @@
verstage-$(CONFIG_LPC_TPM) += tis.c verstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
romstage-$(CONFIG_LPC_TPM) += tis.c romstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
ramstage-$(CONFIG_LPC_TPM) += tis.c ramstage-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c
postcar-$(CONFIG_LPC_TPM) += tis.c postcar-$(CONFIG_MAINBOARD_HAS_LPC_TPM) += tis.c

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@ -82,7 +82,7 @@ config DEBUG_TPM
config TPM_RDRESP_NEED_DELAY config TPM_RDRESP_NEED_DELAY
bool "Enable Delay Workaround for TPM" bool "Enable Delay Workaround for TPM"
default n default n
depends on LPC_TPM depends on MAINBOARD_HAS_LPC_TPM
help help
Certain TPMs seem to need some delay when reading response Certain TPMs seem to need some delay when reading response
to work around a race-condition-related issue, possibly to work around a race-condition-related issue, possibly