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soc/intel/skylake: set MSR LT_LOCK_MEMORY only when using native MP init 

FSP takes care of setting the MSR LT_LOCK_MEMORY when SkipMpInit=0.
Thus, only set the lock when native MP init is used (SkipMpInit=1).

Change-Id: I2758e87c6370f3244416a3170cfafe6df757bb78
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44243
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Michael Niewöhner 2020-08-05 21:38:59 +02:00
parent 6e64c1a4e0
commit 348f2a6370
1 changed files with 6 additions and 1 deletions
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7
src/soc/intel/skylake/finalize.c
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@ -84,7 +84,12 @@ static void soc_lockdown(struct device *dev)
pci_write_config8(dev, GEN_PMCON_A, reg8);
}
cpu_lt_lock_memory();
/*
* Lock chipset memory registers to protect SMM.
* When SkipMpInit=0, this is done by FSP.
*/
if (!CONFIG(USE_INTEL_FSP_MP_INIT))
cpu_lt_lock_memory();
}
static void soc_finalize(void *unused)