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soc/amd/cezanne: Enable ACPI_SOC_NVS 

This fixes the undefined reference for NVB0, NVB1, and NVB2.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ib4ba24b66b9ae7899ccd40f91cdd23074f6afc4b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50614
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Raul E Rangel 2021-02-12 16:07:43 -07:00 committed by Felix Held
parent 98f7d60d97
commit 24d024ae24
1 changed files with 1 additions and 0 deletions
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src/soc/amd/cezanne/Kconfig
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@ -9,6 +9,7 @@ if SOC_AMD_CEZANNE
config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_SOC_NVS
select ARCH_BOOTBLOCK_X86_32
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32