coreboot-mirror
/
coreboot
mirror of https://review.coreboot.org/coreboot.git
1
0
Fork 0
Code Issues Releases Wiki Activity

Since some people disapprove of white space cleanups mixed in regular commits 

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-04-27 06:56:47 +00:00 committed by Stefan Reinauer
parent 0e1e8065e3
commit 14e2277962
1022 changed files with 9209 additions and 9210 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Makefile
View File

@ -161,7 +161,7 @@ $(obj)/config.h:
CBFSTOOL:=$(objutil)/cbfstool/cbfstool
# needed objects that every mainboard uses
# needed objects that every mainboard uses
# Creation of these is architecture and mainboard independent
$(obj)/mainboard/$(MAINBOARDDIR)/static.c: $(src)/mainboard/$(MAINBOARDDIR)/devicetree.cb $(objutil)/sconfig/sconfig
@printf " SCONFIG $(subst $(src)/,,$(<))\n"
@ -282,14 +282,14 @@ printcrt0s:
@echo ldscripts=$(ldscripts)
OBJS := $(patsubst %,$(obj)/%,$(TARGETS-y))
INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include
INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include
INCLUDES += -Isrc/devices/oprom/include
# abspath is a workaround for romcc
INCLUDES += -include $(abspath $(obj)/config.h)
CFLAGS = $(INCLUDES) -Os -nostdinc -pipe
CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs
CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs
CFLAGS += -Wstrict-aliasing -Wshadow
ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y)
CFLAGS += -Werror

4
documentation/Kconfig.tex
View File

@ -120,7 +120,7 @@ $(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
mv pci3.hex ssdt3.c
$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
@ -470,7 +470,7 @@ we don't need to test for the chipset CONFIG variable. We
can therefore test other variables (which is part of the reason
we set up conditional inclusion of this file, instead
of unconditionally including it). Here is an example from AMD 8111.
No conditionals in this one yet.
No conditionals in this one yet.
\begin{verbatim}
driver-y += amd8111.o
driver-y += amd8111_usb.o

194
documentation/LinuxBIOS-AMD64.tex
View File

@ -1,7 +1,7 @@
%
% This document is released under the GPL
% Initially written by Stefan Reinauer, <stepan@coresystems.de>
%
%
\documentclass[titlepage,12pt]{article}
\usepackage{a4}
@ -38,7 +38,7 @@
\maketitle
\thispagestyle{empty}
\thispagestyle{empty}
\tableofcontents
@ -67,7 +67,7 @@ find errors in the following descriptions, contact
\item 2009/04/19 replace LinuxBIOS with coreboot
\item 2004/06/02 url and language fixes from Ken Fuchs $<$kfuchs@winternet.com$>$
\item 2004/02/10 acpi and option rom updates
\item 2003/11/18 initial release
\item 2003/11/18 initial release
\end{itemize}
@ -78,7 +78,7 @@ find errors in the following descriptions, contact
\section{What is coreboot?}
coreboot aims to replace the normal BIOS found on x86, AMD64, PPC,
coreboot aims to replace the normal BIOS found on x86, AMD64, PPC,
Alpha, and other machines with a Linux kernel that can boot Linux from a cold
start. The startup code of an average coreboot port is about 500 lines of
assembly and 5000 lines of C. It executes 16 instructions to get into 32bit
@ -131,7 +131,7 @@ $ cd coreboot
You can get the entire source tree via SVN:
{ \small
{ \small
\begin{verbatim}
$ svn co svn://coreboot.org/repos/trunk/coreboot-v2
\end{verbatim}
@ -151,7 +151,7 @@ is available at \url{http://qa.coreboot.org/}.
Due to major structural enhancements to \hbox{coreboot}, AMD64 support
is only available in the \texttt{coreboot-v2} tree. This tree reflects (as
of November 2003) coreboot version 1.1.5 and will lead to coreboot 2.0
when finished. Most x86 hardware is currently only supported by the
when finished. Most x86 hardware is currently only supported by the
coreboot 1.0 tree.
%
@ -163,7 +163,7 @@ To support a large variety of existing hardware coreboot allows for a
lot of configuration options that can be tweaked in several ways:
\begin{itemize}
\item
\item
Firmware image specific configuration options can be set in the image
configuration file which is usually found in
\texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/}. Such
@ -217,7 +217,7 @@ instance for the AMD Solo Athlon64 mainboard enter:
This will create a directory containing a Makefile and other software
components needed for this build. The directory name is defined in the
firmware image specific configuration file. In the case of AMD's Solo
mainboard the default directory resides in
mainboard the default directory resides in
\texttt{coreboot-v2/targets/amd/solo/solo}. To build the coreboot image, do
\begin{verbatim}
@ -257,7 +257,7 @@ configuration files share some basic rules
\begin{itemize}
\item
The default configuration file name in coreboot is \texttt{Config.lb}.
\item
\item
All variables used in a configuration file have to be declared in this
file with \texttt{uses VARNAME} before usage.
\item
@ -267,13 +267,13 @@ Comments can be added on a new line by using the comment identifier
coreboot distinguishes between statements and options. Statements cause
the coreboot configuration mechanism to act, whereas options set
variables that are used by the build scripts or source code.
\item
\item
Default configuration values can be set in the mainboard configuration
files (keyword default)
\item
\item
Option overrides to the default configuration can only be specified in
the build target configuration file
\texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/Config.lb}
\texttt{coreboot-v2/targets/$<$vendor$>$/$<$mainboard$>$/Config.lb}
(keyword option)
\end{itemize}
@ -290,7 +290,7 @@ used. Example:
\end{verbatim}
\textbf{NOTE:} Only configuration variables known to the configuration
system can be used in configuration files. coreboot checks
system can be used in configuration files. coreboot checks
\texttt{coreboot-v2/src/config/Options.lb} to see whether a configuration
variable is known.
@ -298,7 +298,7 @@ variable is known.
The \texttt{default} statement is used to set a configuration variable
with an overridable default value. It is commonly used in mainboard
configuration files.
configuration files.
Example:
@ -320,7 +320,7 @@ Also, simple expressions are allowed:
\end{verbatim}
If an option contains a string, this string has to be protected with
quotation marks:
quotation marks:
\begin{verbatim}
default CC="gcc -m32"
@ -400,7 +400,7 @@ option on how to set them.
\item \begin{verbatim}CC\end{verbatim}
Target C Compiler. Default is \texttt{\$(CROSS\_COMPILE)gcc}. Set to
\texttt{gcc -m32} for compiling AMD64 coreboot images on an AMD64
\texttt{gcc -m32} for compiling AMD64 coreboot images on an AMD64
machine.
\item \begin{verbatim}CONFIG_CHIP_CONFIGURE \end{verbatim}
@ -415,7 +415,7 @@ Errors or log messages up to this level can be printed. Default is
\item \begin{verbatim}CONFIG_DEFAULT_CONSOLE_LOGLEVEL\end{verbatim}
Console will log at this level unless changed. Default is \texttt{7},
Console will log at this level unless changed. Default is \texttt{7},
minimum is \texttt{0}, maximum is \texttt{10}.
\item \begin{verbatim}CONFIG_CONSOLE_SERIAL8250\end{verbatim}
@ -430,7 +430,7 @@ Size of final ROM image. This option has no default value.
\item \begin{verbatim}CONFIG_FALLBACK_SIZE\end{verbatim}
Fallback image size. Defaults to \texttt{65536} bytes. \textbf{NOTE:}
Fallback image size. Defaults to \texttt{65536} bytes. \textbf{NOTE:}
This does not include the fallback payload.
\item \begin{verbatim}CONFIG_HAVE_OPTION_TABLE\end{verbatim}
@ -482,9 +482,9 @@ using romcc and/or the GNU assembler. This code enables caches and
registers, early mtrr settings, fallback mechanisms, dram init and
possibly more.
\textbf{NOTE:} The \texttt{option} keyword can not be used in mainboard
specific configuration files. Options shall instead be set using the
\texttt{default} keyword so that they can be overridden by the image
\textbf{NOTE:} The \texttt{option} keyword can not be used in mainboard
specific configuration files. Options shall instead be set using the
\texttt{default} keyword so that they can be overridden by the image
specific configuration files if needed.
\subsubsection{Mainboard specific keywords}
@ -539,7 +539,7 @@ during the build process. This is useful if external utilities have to
be used for the build. coreboot on AMD64 uses romcc for it's early
startup code placed in auto.c.
To tell the configuration mechanism how to build \texttt{romcc} files,
To tell the configuration mechanism how to build \texttt{romcc} files,
do:
\begin{verbatim}
@ -556,7 +556,7 @@ end
\end{verbatim}
Each \texttt{makerule} section contains file dependencies (using the
texttt{depends} keyword) and an action that is taken when the dependencies
texttt{depends} keyword) and an action that is taken when the dependencies
are satisfied (using the \texttt{action} keyword).
\item \begin{verbatim}mainboardinit\end{verbatim}
@ -668,7 +668,7 @@ couple of \texttt{pci} keywords.
The first occurrence of the \texttt{pci} keyword tells coreboot where
the bridge devices start, relative to the PCI configuration space used
by the bridge. The following occurences of the \texttt{pci} keyword
describe the provided devices.
describe the provided devices.
Adding the option \texttt{on} or \texttt{off} to a PCI device will
enable or disable this device. This feature can be used if some bridge
@ -820,7 +820,7 @@ decompression is needed).
%
% 10. Tweaking the source code
%
%
\section{Tweaking the source code}
Besides configuring the existing code it is sometimes necessary or
@ -1083,7 +1083,7 @@ This will make coreboot look for the file \\
\texttt{coreboot-v2/src/mainboard/<vendor>/<mainboard>/irq\_tables.c} which
contains the source code definition of the IRQ table. coreboot corrects
small inconsistencies in the IRQ table during startup (checksum and
number of entries), but it is not yet writing IRQ tables in a completely
number of entries), but it is not yet writing IRQ tables in a completely
dynamic way.
\textbf{NOTE:} To get Linux to understand and actually use the IRQ
@ -1125,7 +1125,7 @@ revisions.
There is initial ACPI support in coreboot now. Currently the only gain with
this is the ability to use HPET timers in Linux. To achieve this, there is a
framework that can generate the following tables:
framework that can generate the following tables:
\begin{itemize}
\item RSDP
\item RSDT
@ -1143,7 +1143,7 @@ option CONFIG_HAVE_ACPI_TABLES=1
To keep Linux doing it's pci ressource allocation based on IRQ tables and MP
tables, you have to specify the kernel parameter \texttt{pci=noacpi} otherwise
your PCI devices won't get interrupts.
your PCI devices won't get interrupts.
It's likely that more ACPI support will follow, when there is need for certain
features.
@ -1162,7 +1162,7 @@ port 80 POST output, you need a POST expansion card for ISA or PCI. Port
80 POST allows simple debugging without any other output method
available (serial interface or VGA display)
\item
\emph{Serial POST}.
\emph{Serial POST}.
This option allows to push POST messages to the serial interface instead
of using IO ports. \textbf{NOTE:} The serial interface has to be
initialized before serial POST can work. To use serial POST, set the
@ -1244,7 +1244,7 @@ reset code in your mainboard specific configuration file
\end{verbatim}
The C source file \texttt{reset.c} (resulting in \texttt{reset.o}
during compilation) shall define the following function to take care
during compilation) shall define the following function to take care
of the system reset:
\begin{verbatim}
@ -1337,7 +1337,7 @@ position within the CMOS memory. The layout file looks as follows:
[..]
392 3 e 5 baud_rate
[..]
# configid value human readable description
5 0 115200
5 1 57600
@ -1347,7 +1347,7 @@ position within the CMOS memory. The layout file looks as follows:
5 5 4800
5 6 2400
5 7 1200
\end{verbatim}
To change CMOS values from a running Linux system, use the
@ -1388,9 +1388,9 @@ network):
range 192.168.1.0 192.168.1.31;
option broadcastaddress 192.168.1.255;
}
ddnsupdatestyle adhoc;
host hammer12 {
hardware ethernet 00:04:76:EA:64:31;
fixedaddress 192.168.1.24;
@ -1522,11 +1522,11 @@ CONs:
%
\section{Image types}
There used to be one image type for coreboot, as described above. Since this paper was written (2004) there have been many changes. First, the name
There used to be one image type for coreboot, as described above. Since this paper was written (2004) there have been many changes. First, the name
was changed to coreboot, for many reasons. Second, Cache As Ram support (CAR)
was added for many AMD CPUs, which both simplified and complicated things. Simplification came with the removal of romcc; complication came with the addition of new ways to build.
was added for many AMD CPUs, which both simplified and complicated things. Simplification came with the removal of romcc; complication came with the addition of new ways to build.
There are two big additions to the build process and, furthermore, more than two new CONFIG variables to control them.
There are two big additions to the build process and, furthermore, more than two new CONFIG variables to control them.
\begin{itemize}
\item \begin{verbatim}CONFIG_USE_DCACHE_RAM\end{verbatim}
@ -1544,19 +1544,19 @@ Set to \texttt{1} to use printk, instead of the primitive print functions, in CA
\end{itemize}
Before going over the new image types, derived from v3, we will quickly review the standard v2 image types. We are hoping this review will
aid comprehension.
aid comprehension.
A coreboot rom file consists of one or more \textit{images}. All images consist of a part that runs in ROM, and a part that runs in RAM. The RAM can be in compressed form and is decompressed when needed by the ROM code. The main function of the ROM code is to get memory working. Both ROM and RAM consist of a very small amount of assembly code and mostly C code.
A coreboot rom file consists of one or more \textit{images}. All images consist of a part that runs in ROM, and a part that runs in RAM. The RAM can be in compressed form and is decompressed when needed by the ROM code. The main function of the ROM code is to get memory working. Both ROM and RAM consist of a very small amount of assembly code and mostly C code.
\subsection{romcc images (from emulation/qemu)}
ROMCC images are so-called because C code for the ROM part is compiled with romcc. romcc is an optimizing C compiler which compiles one, and only
one file; to get more than one file, one must include the C code via include statements. The main ROM code .c file is usually called auto.c.
ROMCC images are so-called because C code for the ROM part is compiled with romcc. romcc is an optimizing C compiler which compiles one, and only
one file; to get more than one file, one must include the C code via include statements. The main ROM code .c file is usually called auto.c.
\subsubsection{How it is built}
Romcc compiles auto.c to produce auto.inc. auto.inc is included in the main crt0.S, which is then preprocessed to produce crt0.s. The inclusion of files into crt0.S is controlled by the CONFIG\_CRT0\_INCLUDES variable. crt0.s is then assembled.
Romcc compiles auto.c to produce auto.inc. auto.inc is included in the main crt0.S, which is then preprocessed to produce crt0.s. The inclusion of files into crt0.S is controlled by the CONFIG\_CRT0\_INCLUDES variable. crt0.s is then assembled.
File for the ram part are compiled in a conventional manner.
File for the ram part are compiled in a conventional manner.
The final step is linking. The use of named sections is used very heavily in coreboot to control where different bits of code go. The reset vector must go in the top 16 bytes. The start portion of the ROM code must go in the top 64K bytes, since most chipsets only enable this much ROM at startup time. Here is a quick look at a typical image:
The final step is linking. The use of named sections is used very heavily in coreboot to control where different bits of code go. The reset vector must go in the top 16 bytes. The start portion of the ROM code must go in the top 64K bytes, since most chipsets only enable this much ROM at startup time. Here is a quick look at a typical image:
\begin{verbatim}
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
@ -1569,30 +1569,30 @@ The final step is linking. The use of named sections is used very heavily in cor
[ 7] .strtab STRTAB 00000000 007da0 000bfd 00 0 0 1
\end{verbatim}
The only sections that get loaded into a ROM are the Allocated ones. We can see the .ram, .rom, .reset and .id sections.
The only sections that get loaded into a ROM are the Allocated ones. We can see the .ram, .rom, .reset and .id sections.
\subsubsection{layout}
As we mentioned, the ROM file consists of multiple images. In the basic file, there are two full coreboot rom images. The build sequence for each is the same, and in fact the ldscript.ld files are almost identical. The only difference is in a few makefile variables, generated by the config tool.
As we mentioned, the ROM file consists of multiple images. In the basic file, there are two full coreboot rom images. The build sequence for each is the same, and in fact the ldscript.ld files are almost identical. The only difference is in a few makefile variables, generated by the config tool.
\begin{itemize}
\item CONFIG\_PAYLOAD\_SIZE. Each image may have a different payload size.
\item CONFIG\_ROMBASE Each image must have a different base in rom.
\item CONFIG\_RESET Unclear what this is used for.
\item CONFIG\_PAYLOAD\_SIZE. Each image may have a different payload size.
\item CONFIG\_ROMBASE Each image must have a different base in rom.
\item CONFIG\_RESET Unclear what this is used for.
\item CONFIG\_EXCEPTION\_VECTORS where an optional IDT might go.
\item CONFIG\_USE\_OPTION\_TABLE if set, an option table section will be linked in.
\item CONFIG\_ROM\_PAYLOAD\_START This is the soon-to-be-deprecated way of locating a payload. cbfs eliminates this.
\item CONFIG\_USE\_OPTION\_TABLE if set, an option table section will be linked in.
\item CONFIG\_ROM\_PAYLOAD\_START This is the soon-to-be-deprecated way of locating a payload. cbfs eliminates this.
\item CONFIG\_USE\_FALLBACK\_IMAGE Whether this is a fallback or normal image
\item CONFIG\_ROM\_SECTION\_SIZE Essentially, the payload size. Soon to be deprecated.
\item CONFIG\_ROM\_SECTION\_SIZE Essentially, the payload size. Soon to be deprecated.
\item CONFIG\_ROM\_IMAGE\_SIZE Size of this image (i.e. fallback or normal image)
\item CONFIG\_ROM\_SIZE Total size of the ROM
\item CONFIG\_XIP\_RAM\_BASE The start of eXecute In Place code. XIP allows for not copying code to ram, but just running it from ROM.
\item CONFIG\_XIP\_RAM\_BASE The start of eXecute In Place code. XIP allows for not copying code to ram, but just running it from ROM.
\end{itemize}
Each image (normal or fallback) is built completely independently and does not get linked to the other. They are assembled into one ROM image by the (soon to be deprecated) buildrom tool, or by the cbfs tool.
Each image (normal or fallback) is built completely independently and does not get linked to the other. They are assembled into one ROM image by the (soon to be deprecated) buildrom tool, or by the cbfs tool.
\subsubsection{boot sequence}
We boot and start at fffffff0. We then jump to the entry point at \_start. \_start does some machine init and an lgdt and jumps to \_\_protected\_start, at which point we are in protected mode. The code does a bit more machine setup and then starts executing the romcc code.
We boot and start at fffffff0. We then jump to the entry point at \_start. \_start does some machine init and an lgdt and jumps to \_\_protected\_start, at which point we are in protected mode. The code does a bit more machine setup and then starts executing the romcc code.
If fallback has been built in, some setup needs to be done. On some machines, it is extensive. Full rom decoding must be enabled. This may in turn require additional PCI setup to enable decoding to be enabled (!). To decided which image to use, hardware registers (cold boot on the Opteron) or CMOS are checked. Finally, once the image to use has been decided, a jmp is performed, viz:
If fallback has been built in, some setup needs to be done. On some machines, it is extensive. Full rom decoding must be enabled. This may in turn require additional PCI setup to enable decoding to be enabled (!). To decided which image to use, hardware registers (cold boot on the Opteron) or CMOS are checked. Finally, once the image to use has been decided, a jmp is performed, viz:
\begin{verbatim}
/* This is the primary cpu how should I boot? */
else if (do_normal_boot()) {
@ -1616,8 +1616,8 @@ If fallback has been built in, some setup needs to be done. On some machines, it
#endif
;
\end{verbatim}
How does the fallback image get the symbol for normal entry? Via magic in the ldscript.ld -- remember, the images are not linked to each other.
Finally, we can see this in the Config.lb for most mainboards:
How does the fallback image get the symbol for normal entry? Via magic in the ldscript.ld -- remember, the images are not linked to each other.
Finally, we can see this in the Config.lb for most mainboards:
\begin{verbatim}
if CONFIG_USE_FALLBACK_IMAGE
mainboardinit cpu/x86/16bit/reset16.inc
@ -1627,27 +1627,27 @@ else
ldscript /cpu/x86/32bit/reset32.lds
end
\end{verbatim}
What does this mean? the non-fallback image has a 32-bit entry point; fallback has a 16-bit entry point. The reason for this is that some code from fallback always runs, so as to pick fallback or normal; but the normal is always called from 32-bit code.
What does this mean? the non-fallback image has a 32-bit entry point; fallback has a 16-bit entry point. The reason for this is that some code from fallback always runs, so as to pick fallback or normal; but the normal is always called from 32-bit code.
\subsection{car images (from lippert/roadrunner-lx)}
CAR images in their simplest form are modified romcc images. The file is usually cache\_as\_ram\_auto.c. C inclusion is still used. The main difference is in the build sequence. The compiler command line is a very slight changed: instead of using romcc to generate an auto.inc include file, gcc us used. Then, two perl scripts are used to rename the .text and .data sections to .rom.text and .rom.data respectively.
CAR images in their simplest form are modified romcc images. The file is usually cache\_as\_ram\_auto.c. C inclusion is still used. The main difference is in the build sequence. The compiler command line is a very slight changed: instead of using romcc to generate an auto.inc include file, gcc us used. Then, two perl scripts are used to rename the .text and .data sections to .rom.text and .rom.data respectively.
\subsubsection{How it is built}
The build is almost identical to the romcc build. Since the auto.inc file exists, it can be included as before. The crt0\_includes.h file has one addition: a file that enables CAR, in this case it is \textit{src/cpu/amd/model\_lx/cache\_as\_ram.inc}.
The build is almost identical to the romcc build. Since the auto.inc file exists, it can be included as before. The crt0\_includes.h file has one addition: a file that enables CAR, in this case it is \textit{src/cpu/amd/model\_lx/cache\_as\_ram.inc}.
\subsubsection{layout}
No significant change from romcc code.
No significant change from romcc code.
\subsubsection{boot sequence}
No significant change from romcc code, except that the CAR code has to set up a stack.
No significant change from romcc code, except that the CAR code has to set up a stack.
\subsection{car + CONFIG\_USE\_INIT images (new emulation/qemu}
This type of image makes more use of the C compiler. In this type of image, in fact,
seperate compilation is possible but is not always used. Oddly enough, this option is only used in PPC boards. That said, we need to move to this way of building. Including C code is poor style.
This type of image makes more use of the C compiler. In this type of image, in fact,
seperate compilation is possible but is not always used. Oddly enough, this option is only used in PPC boards. That said, we need to move to this way of building. Including C code is poor style.
\subsubsection{How it is built}
There is a make variable, INIT-OBJECTS, that for all our other targets is empty. In this type of build, INIT-OBJECTS is a list of C files that are created from the config tool initobject command. Again, with INIT-OBJECTS we can finally stop including .c files and go with seperate compilation.
\subsubsection{layout}
No significant change from romcc code.
No significant change from romcc code.
\subsubsection{boot sequence}
No significant change from romcc code, except that the CAR code has to set up a stack.
No significant change from romcc code, except that the CAR code has to set up a stack.
\subsection{car + CONFIG\_USE\_PRINTK\_IN\_CAR images}
When CONFIG\_USE\_PRINTK\_IN\_CAR is set, the CAR code can use printk instead of the primitive print functions. This config variable is used in one of two ways. If CONFIG\_USE\_INIT is 0, then different .c files just include other .c files, as in console.c:
When CONFIG\_USE\_PRINTK\_IN\_CAR is set, the CAR code can use printk instead of the primitive print functions. This config variable is used in one of two ways. If CONFIG\_USE\_INIT is 0, then different .c files just include other .c files, as in console.c:
\begin{verbatim}
#if CONFIG_USE_PRINTK_IN_CAR == 0
static void __console_tx_byte(unsigned char byte)
@ -1670,9 +1670,9 @@ static void __console_tx_byte(unsigned char byte)
#endif /* CONFIG_USE_PRINTK_IN_CAR */
\end{verbatim}\footnote{yuck!}
\end{verbatim}\footnote{yuck!}
If CONFIG\_USE\_INIT is 1, then the Config.lb is configured differently:
If CONFIG\_USE\_INIT is 1, then the Config.lb is configured differently:
\begin{verbatim}
if CONFIG_USE_INIT
if CONFIG_USE_PRINTK_IN_CAR
@ -1680,14 +1680,14 @@ if CONFIG_USE_INIT
end
end
\end{verbatim}\footnote{see previous footnote}
\end{verbatim}\footnote{see previous footnote}
\subsubsection{layout}
No significant change from romcc code.
No significant change from romcc code.
\subsubsection{boot sequence}
No significant change from romcc code, except that the CAR code has to set up a stack.
No significant change from romcc code, except that the CAR code has to set up a stack.
\subsection{failover}
Failover is the newest way to lay out a ROM. The choice of which image to run is removed from the fallback image and moved into a small, standalone piece of code. The code is simple enough to show here:
Failover is the newest way to lay out a ROM. The choice of which image to run is removed from the fallback image and moved into a small, standalone piece of code. The code is simple enough to show here:
\begin{verbatim}
static unsigned long main(unsigned long bist)
{
@ -1707,7 +1707,7 @@ fallback_image:
}
\end{verbatim}
Some motherboards have a more complex bus structure (e.g. Opteron). In those cases, the failover can be more complex, as it requires some hardware initialization to work correctly. As of this writing (April 2009), these boards have their own failover:
Some motherboards have a more complex bus structure (e.g. Opteron). In those cases, the failover can be more complex, as it requires some hardware initialization to work correctly. As of this writing (April 2009), these boards have their own failover:
\begin{quote}
./src/mainboard/iei/nova4899r/failover.c
./src/mainboard/emulation/qemu-x86/failover.c
@ -1723,7 +1723,7 @@ Some motherboards have a more complex bus structure (e.g. Opteron). In those cas
./src/mainboard/olpc/rev\_a/failover.c
./src/mainboard/via/epia-m/failover.c
\end{quote}
Here is one of the more complicated ones:
Here is one of the more complicated ones:
\begin{verbatim}
static unsigned long main(unsigned long bist)
{
@ -1760,15 +1760,15 @@ static unsigned long main(unsigned long bist)
}
\end{verbatim}
They're not that different, in fact. So why are there different copies all over the tree? Simple: code inclusion. Most of the failover.c are different because they include different bits of code. Here is a key reason for killing C code inclusion in the tree.
They're not that different, in fact. So why are there different copies all over the tree? Simple: code inclusion. Most of the failover.c are different because they include different bits of code. Here is a key reason for killing C code inclusion in the tree.
\subsubsection{How it is built}
There two additional config variables:
There two additional config variables:
\begin{itemize}
\item HAVE\_FAILOVER\_IMAGE Has to be defined when certain files are included.
\item HAVE\_FAILOVER\_IMAGE Has to be defined when certain files are included.
\item USE\_FAILOVER\_IMAGE Enables the use of the failover image
\end{itemize}
Confusingly enough, almost all the uses of these two variables are either nested or both required to be set, e.g.
The fallback and normal builds are the same. The target config has a new clause that looks like this:
Confusingly enough, almost all the uses of these two variables are either nested or both required to be set, e.g.
The fallback and normal builds are the same. The target config has a new clause that looks like this:
\begin{verbatim}
romimage "failover"
option CONFIG_USE_FAILOVER_IMAGE=1
@ -1778,36 +1778,36 @@ romimage "failover"
option COREBOOT_EXTRA_VERSION="\$(shell cat ../../VERSION)\_Failover"
end
\end{verbatim}
This new section uses some constructs not yet discussed in detail. XIP\_ROM\_SIZE just refers to the
fact that the failover code is eXecute In Place, i.e. not copied to RAM. Of course, the ROM part of normal/fallback is as well, so the usage of XIP here is somewhat confusing. Finally, the USE\_FAILOVER\_IMAGE variable is set, which changes code compilation in a few places. If we just consider non-mainbard files, there are:
This new section uses some constructs not yet discussed in detail. XIP\_ROM\_SIZE just refers to the
fact that the failover code is eXecute In Place, i.e. not copied to RAM. Of course, the ROM part of normal/fallback is as well, so the usage of XIP here is somewhat confusing. Finally, the USE\_FAILOVER\_IMAGE variable is set, which changes code compilation in a few places. If we just consider non-mainbard files, there are:
\begin{verbatim}
src/cpu/amd/car/cache_as_ram.inc
src/arch/i386/Config.lb
\end{verbatim}
For the cache\_as\_ram.inc file, the changes relate to the fact that failover code sets up CAR, so that fallback code need not.
For the Config.lb, several aspects of build change.
When USE\_FAILOVER\_IMAGE, entry into both normal and fallback bios images is via a 32-bit entry point (when not defined, entry into fallback is a 16-entry point at the power-on reset vector).
For the Config.lb, several aspects of build change.
When USE\_FAILOVER\_IMAGE, entry into both normal and fallback bios images is via a 32-bit entry point (when not defined, entry into fallback is a 16-entry point at the power-on reset vector).
\subsubsection{layout}
Failover.c becomes the new bootblock at the top of memory. It calls either normal or fallback. The address of normal and fallback is determined by ldscript magic.
Failover.c becomes the new bootblock at the top of memory. It calls either normal or fallback. The address of normal and fallback is determined by ldscript magic.
\subsubsection{boot sequence}
failover.c tests a few variables and the calls the normal or fallback payload depending on those variables; usually they are CMOS settings.
failover.c tests a few variables and the calls the normal or fallback payload depending on those variables; usually they are CMOS settings.
\subsection{Proposed new image forat}
The new image format will use seperate compilation -- no C code included! -- on all files.
The new image format will use seperate compilation -- no C code included! -- on all files.
The new design has a few key goals:
The new design has a few key goals:
\begin{itemize}
\item Always use a bootblock (currently called failover).
The name failover.c, being utterly obscure, will not be used; instead, we will name the file bootblock.c. Instead of having a different copy for each mainboard, we can have just one copy.
\item Always use a bootblock (currently called failover).
The name failover.c, being utterly obscure, will not be used; instead, we will name the file bootblock.c. Instead of having a different copy for each mainboard, we can have just one copy.
\item Always use seperate compilation
\item Always use printk etc. in the ROM code
\item (longer term) from the bootblock, always use cbfs to locate the normal/fallback etc. code. This code will be XIP.
\item (longer term) from the bootblock, always use cbfs to locate the normal/fallback etc. code. This code will be XIP.
\end{itemize}
\subsubsection{How it is built}
For now, since we are still using the config tool, we'll need a new command: bootblockobject, which creates a list of files to be included in the bootblock. Not a lot else will have to change. We are going to move to using the v3 CAR code assembly code (one or two files at most, instead of many) and, instead of the thicket of little ldscript files, one ldscript file. This strategy is subject to modification as events dictate.
For now, since we are still using the config tool, we'll need a new command: bootblockobject, which creates a list of files to be included in the bootblock. Not a lot else will have to change. We are going to move to using the v3 CAR code assembly code (one or two files at most, instead of many) and, instead of the thicket of little ldscript files, one ldscript file. This strategy is subject to modification as events dictate.
\subsubsection{layout}
Almost the same, for now, as the current failover code.
Almost the same, for now, as the current failover code.
\subsubsection{boot sequence}
%
% 14 Glossary
@ -1839,11 +1839,11 @@ ROMs they can be electronically erased and reprogrammed.
\subsection{Additional Papers on coreboot}
\begin{itemize}
\item
\item
\textit{\url{http://www.coreboot.org/Documentation}}
\item
\item
\textit{\url{http://www.lysator.liu.se/upplysning/fa/linuxbios.pdf}}
\item
\item
\textit{\url{http://portal.acm.org/citation.cfm?id=512627}}
\end{itemize}

2
documentation/Makefile
View File

@ -31,7 +31,7 @@ else ifneq ($(strip $(CONVERT)),)
convert $< $@
endif
LinuxBIOS-AMD64.toc: $(FIGS) LinuxBIOS-AMD64.tex
LinuxBIOS-AMD64.toc: $(FIGS) LinuxBIOS-AMD64.tex
# 2 times to make sure we have a current toc.
$(PDFLATEX) LinuxBIOS-AMD64.tex
$(PDFLATEX) LinuxBIOS-AMD64.tex

154
documentation/RFC/chip.tex
View File

@ -2,17 +2,17 @@
\begin{abstract}
At the end of this document is the original message that motivated the
change.
change.
\end{abstract}
\section{Scope}
This document defines how LinuxBIOS programmers can specify chips that
are used, specified, and initalized. The current scope is for superio
chips, but the architecture should allow for specification of other chips such
as southbridges. Multiple chips of same or different type are supported.
are used, specified, and initalized. The current scope is for superio
chips, but the architecture should allow for specification of other chips such
as southbridges. Multiple chips of same or different type are supported.
\section{Goals}
The goals of the new chip architecture are these:
The goals of the new chip architecture are these:
\begin{itemize}
\item seperate implementation details from specification in the Config file
(translation: no more C code in Config files)
@ -27,33 +27,33 @@ The specification looks like this:
\begin{verbatim}
chip <name> [path=<path>] ["<configuration>"]
\end{verbatim}
The name is in the standard LinuxBIOS form of type/vendor/name, e.g.
"southbridge/intel/piix4e" or "superio/ite/it8671f". The class of the
chip is derived from the first pathname component of the name, and the chip
configuration is derived from the following components.
The name is in the standard LinuxBIOS form of type/vendor/name, e.g.
"southbridge/intel/piix4e" or "superio/ite/it8671f". The class of the
chip is derived from the first pathname component of the name, and the chip
configuration is derived from the following components.
The path defines the access mechanism to the chip.
It is optional. If present, it overrides the default path to the chip.
The path defines the access mechanism to the chip.
It is optional. If present, it overrides the default path to the chip.
The configuration defines chip-specific configuration details, and is also
optional. Note that an empty configuration will leave the chip with
no enabled resources. This may be desirable in some cases.
optional. Note that an empty configuration will leave the chip with
no enabled resources. This may be desirable in some cases.
\section{Results of specifying a chip}
When one or more chips are specified, the data about the chips
is saved until the entire file is parsed. At this point, the config tool
creates a file in the build directory called chip.c This file contains
a common struct containing information about
each individual chip and an array of pointers to these structures.
a common struct containing information about
each individual chip and an array of pointers to these structures.
For each chip, there are two structures. The structures contain control
information for the chip, and register initialization information. The
names of the structures are derived by ``flattening'' the chip name,
as in the current linuxbios. For example, superio/ite/xyz uses
For each chip, there are two structures. The structures contain control
information for the chip, and register initialization information. The
names of the structures are derived by ``flattening'' the chip name,
as in the current linuxbios. For example, superio/ite/xyz uses
two structs, one called superio_ite_xyz_control and one called
superio_ite_xyz_init. The control struct is initialized from the
chip name and path information, and has a pointer to the
superio_ite_xyz_init. The control struct is initialized from the
chip name and path information, and has a pointer to the
config struct. The config struct is initialized from the quote string
\begin{verbatim}
@ -64,29 +64,29 @@ To: linuxbios@clustermatic.org
Subject: RFC:new superio proposal
Abstract:
The superio architecture for linuxbios has worked for the last 2
years but is being stretched to the limit by the changes in superio chips.
The architecture depended on superio resources being relatively constant
between chips, but this assumption no longer holds. In this document we
propose several alternatives and solicit comments.
The superio architecture for linuxbios has worked for the last 2
years but is being stretched to the limit by the changes in superio chips.
The architecture depended on superio resources being relatively constant
between chips, but this assumption no longer holds. In this document we
propose several alternatives and solicit comments.
Overview:
The superio architecture in linuxbios was developed over time, and
modified as circumstances required. In the beginning it was relatively
simple and assumed only one superio per mainboard. The latest version
The superio architecture in linuxbios was developed over time, and
modified as circumstances required. In the beginning it was relatively
simple and assumed only one superio per mainboard. The latest version
allows an arbitrary number of superios per mainboard, and allows complete
specification of the superio base I/O address along with the specification
of reasonable default valures for both the base I/O address and the
superio parameters such as serial enable, baud rate, and so on.
of reasonable default valures for both the base I/O address and the
superio parameters such as serial enable, baud rate, and so on.
Specification of superio control parameters is done by a configuration
Specification of superio control parameters is done by a configuration
line such as:
nsuperio sis/950 com1={1} floppy=1 lpt=1
This fragment sets the superio type to sis/950; sets com1, floppy, and lpt
to enabled; and leaves the defaults to com1 (baud rate, etc.) to the
default values.
This fragment sets the superio type to sis/950; sets com1, floppy, and lpt
to enabled; and leaves the defaults to com1 (baud rate, etc.) to the
default values.
While it is not obvious, these configuration parameters are fragments of a
C initializer. The initializers are used to build a statically initialized
@ -96,7 +96,7 @@ struct superio {
struct superio_control *super; // the ops for the device.
unsigned int port; // if non-zero, overrides the default port
// com ports. This is not done as an array (yet).
// We think it's easier to set up from python if it is not an
// We think it's easier to set up from python if it is not an
// array.
struct com_ports com1, com2, com3, com4;
// DMA, if it exists.
@ -114,14 +114,14 @@ struct superio {
These structures are, in turn, created and statically initialized by a
config-tool-generated structure that defines all the superios. This file
is called nsuperio.c, is created for each mainboard you build, only
is called nsuperio.c, is created for each mainboard you build, only
appears in the build directory, and looks like this:
===
extern struct superio_control superio_winbond_w83627hf_control;
extern struct superio_control superio_winbond_w83627hf_control;
struct superio superio_winbond_w83627hf= {
&superio_winbond_w83627hf_control,
struct superio superio_winbond_w83627hf= {
&superio_winbond_w83627hf_control,
.com1={1}, .com2={1}, .floppy=1, .lpt=1, .keyboard=1, .hwmonitor=1};
struct superio *all_superio[] = {&superio_winbond_w83627hf,
@ -131,12 +131,12 @@ unsigned long nsuperio = 1;
===
This example shows a board with one superio (nsuperio). The superio
consists of a winbond w83627hf, with com1, com2, floppy, lpt, keyboard,
and hwmonitor enabled. Note that this structure also allows for
over-riding the default superio base, although that capability is rarely
used.
consists of a winbond w83627hf, with com1, com2, floppy, lpt, keyboard,
and hwmonitor enabled. Note that this structure also allows for
over-riding the default superio base, although that capability is rarely
used.
The control structure is used to define how to access the superio for
The control structure is used to define how to access the superio for
purposes of control. It looks like this:
===
struct superio_control {
@ -151,13 +151,13 @@ struct superio_control {
};
===
There are three methods for stages of hardwaremain. First is pre_pci_init
(for chips like the acer southbridge that require you to enable some
resources BEFORE pci scan); init, called during the 'middle' phase of
hardwaremain; and finishup, called before the payload is loaded.
There are three methods for stages of hardwaremain. First is pre_pci_init
(for chips like the acer southbridge that require you to enable some
resources BEFORE pci scan); init, called during the 'middle' phase of
hardwaremain; and finishup, called before the payload is loaded.
This approach was inspired by and borrows heavily on the Plan 9 kernel
configuration tools.
This approach was inspired by and borrows heavily on the Plan 9 kernel
configuration tools.
The problem:
@ -166,22 +166,22 @@ smaller. It has grown and in the limit this structure is the union of all
possibly superio chips. Obviously, in the long term, this is not
practical: we can not anticipate all possible superio chips for all time.
The common PC BIOS solution to this type of problem is to continue with
binary structures but add version numbers to them, so that all code that
uses a given structure has to check the version number. Personally, I find
this grotesque and would rather not work this way.
The common PC BIOS solution to this type of problem is to continue with
binary structures but add version numbers to them, so that all code that
uses a given structure has to check the version number. Personally, I find
this grotesque and would rather not work this way.
Using textual strings for configuration is something I find far more
attractive. Plan 9 has shown that this approach has no real limits and
suffices for configuration tasks. The Linux kernel does more limited use
of strings for configuration, but still depends on them. Strings are
easier to read and work with than binary structures, and more important, a
lot easier to deal with when things start going wrong.
Using textual strings for configuration is something I find far more
attractive. Plan 9 has shown that this approach has no real limits and
suffices for configuration tasks. The Linux kernel does more limited use
of strings for configuration, but still depends on them. Strings are
easier to read and work with than binary structures, and more important, a
lot easier to deal with when things start going wrong.
The proposed solution:
What follows are three possible ideas for specifying superio resources and
their settings.
What follows are three possible ideas for specifying superio resources and
their settings.
A common part of the new idea is to eliminate the common superio
structure, due to the many variations in chips, and make it invisible
@ -203,9 +203,9 @@ struct superio_control {
char *name;
};
I.e. we add a new function for creating the superio.
I.e. we add a new function for creating the superio.
Communication of superio settings from linuxbios to the superio would be
Communication of superio settings from linuxbios to the superio would be
via textual strings. The superio structure becomes this:
struct superio {
@ -215,7 +215,7 @@ struct superio {
};
So now the question becomes, what is the configuration structure?
So now the question becomes, what is the configuration structure?
There are several choices. The simplest, from my point of view, are
keyword-value pairs:
struct configuration {
@ -223,11 +223,11 @@ struct configuration {
const char *value;
};
These get filled in by the config tool as before. The linuxbios libary can
then provide a generic parsing function for the superios to use.
These get filled in by the config tool as before. The linuxbios libary can
then provide a generic parsing function for the superios to use.
The remaining question is how should the superio command look in
freebios2?
The remaining question is how should the superio command look in
freebios2?
superio sis/950 "com1=115200,8n1 lpt=1 com2=9600"
@ -242,22 +242,22 @@ superio sis/950 ((com1 115200 8n1) (lpt 1))
So, my questions:
1. Does this new scheme look workable. If not, what needs to change?
2. What should the 'struct configuration' be? does keyword/value work?
3. what should the superio command look like?
2. What should the 'struct configuration' be? does keyword/value work?
3. what should the superio command look like?
Comments welcome.
I'd like to adopt this "RFC" approach for freebios2 as much as we can.
I'd like to adopt this "RFC" approach for freebios2 as much as we can.
There was a lot of give-and-take in the early days of linuxbios about
structure and it proved useful. There's a lot that will start happening in
freebios2 now, and we need to try to make sure it will work for everyone.
Those of you who are doing mainboards, please look at freebios2 and see
how it looks for you. There's a lot of good work that has been done (not
by me so far, thanks Eric and Stefan), and more that needs to be done.
Consider trying out romcc as an "assembly code killer". See how it fits
together and if you can work with it or need changes. Bring comments back
to this list.
by me so far, thanks Eric and Stefan), and more that needs to be done.
Consider trying out romcc as an "assembly code killer". See how it fits
together and if you can work with it or need changes. Bring comments back
to this list.
thanks

62
documentation/RFC/config.tex
View File

@ -8,7 +8,7 @@ We describe the new configuration language for LinuxBIOS.
This document defines the new configuration language for LinuxBIOS.
\section{Goals}
The goals of the new language are these:
The goals of the new language are these:
\begin{itemize}
\item Simplified Makefiles so people can see what is set
\item Move from the regular-expression-based language to something
@ -16,22 +16,22 @@ a bit more comprehensible and flexible
\item make the specification easier for people to use and understand
\item allow unique register-set-specifiers for each chip
\item allow generic register-set-specifiers for each chip
\item generate static initialization code, as needed, for the
specifiers.
\item generate static initialization code, as needed, for the
specifiers.
\end{itemize}
\section{Language}
Here is the new language. It is very similar to the old one, differing
in only a few respects. It borrows heavily from Greg Watson's suggestions.
in only a few respects. It borrows heavily from Greg Watson's suggestions.
I am presenting it in a pseudo-BNF in the hopes it will be easier. Things
in '' are keywords; things in ``'' are strings in the actual text.
I am presenting it in a pseudo-BNF in the hopes it will be easier. Things
in '' are keywords; things in ``'' are strings in the actual text.
\begin{verbatim}
#exprs are composed of factor or factor + factor etc.
expr ::= factor ( ``+'' factor | ``-'' factor | )*
#factors are term or term * term or term / term or ...
factor ::= term ( ``*'' term | ``/'' term | ... )*
#
#
unary-op ::= ``!'' ID
# term is a number, hexnumber, ID, unary-op, or a full-blown expression
term ::= NUM | XNUM | ID | unary-op | ``(`` expr ``)''
@ -39,27 +39,27 @@ term ::= NUM | XNUM | ID | unary-op | ``(`` expr ``)''
# Option command. Can be an expression or quote-string.
# Options are used in the config tool itself (in expressions and 'if')
# and are also passed to the C compiler when building linuxbios.
# It is an error to have two option commands in a file.
# It is an error to have two option commands in a file.
# It is an error to have an option command after the ID has been used
# in an expression (i.e. 'set after used' is an error)
option ::= 'option' ID '=' (``value'' | term)
# Default command. The ID is set to this value if no option command
# is scanned.
# Multiple defaults for an ID will produce warning, but not errors.
# is scanned.
# Multiple defaults for an ID will produce warning, but not errors.
# It is OK to scan a default command after use of an ID.
# Options always over-ride defaults.
default ::= 'default' ID '=' (``value'' | term)
# the mainboard, southbridge, northbridge commands
# cause sourcing of Config.lb files as in the old config tool
# as parts are sourced, a device tree is built. The structure
# as parts are sourced, a device tree is built. The structure
# of the tree is determined by the structure of the components
# as they are specified. To attach a superio to a southbridge, for
# example, one would do this:
# southbridge acer/5432
# superio nsc/123
# end
# southbridge acer/5432
# superio nsc/123
# end
# end
# the tool generates static initializers for this hierarchy.
@ -79,17 +79,17 @@ register ::= 'register' ``CODE''
mainboard ::= 'mainboard' PATH (statements)* 'end'
# standard linuxbios commands
southbridge ::= 'southbridge' PATH (statemnts)* 'end'
northbridge ::= 'northbridge' PATH (statemnts)* 'end'
superio ::= 'superio PATH (statemnts)* 'end'
cpu ::= 'cpu' PATH (statemnts)* 'end'
arch ::= 'arch' PATH (statemnts)* 'end'
southbridge ::= 'southbridge' PATH (statemnts)* 'end'
northbridge ::= 'northbridge' PATH (statemnts)* 'end'
superio ::= 'superio PATH (statemnts)* 'end'
cpu ::= 'cpu' PATH (statemnts)* 'end'
arch ::= 'arch' PATH (statemnts)* 'end'
# files for building linuxbios
# include a file in crt0.S
mainboardinit ::= 'mainboardinit' PATH
# include a file in crt0.S
mainboardinit ::= 'mainboardinit' PATH
# object file
# object file
object ::= 'object' PATH
# driver objects are just built into the image in a different way
driver ::= 'driver' PATH
@ -116,7 +116,7 @@ makedefine ::= 'makedefine' ``RAWTEXT''
addaction ::= 'addaction' PATH ``ACTION''
# statements
statement ::=
statement ::=
option
| default
| cpu
@ -204,12 +204,12 @@ ldscript cpu/i386/entry32.lds
###
### Build our reset vector (This is where linuxBIOS is entered)
###
if CONFIG_USE_FALLBACK_IMAGE
mainboardinit cpu/i386/reset16.inc
ldscript cpu/i386/reset16.lds
if CONFIG_USE_FALLBACK_IMAGE
mainboardinit cpu/i386/reset16.inc
ldscript cpu/i386/reset16.lds
else
mainboardinit cpu/i386/reset32.inc
ldscript cpu/i386/reset32.lds
mainboardinit cpu/i386/reset32.inc
ldscript cpu/i386/reset32.lds
end
.
.
@ -227,7 +227,7 @@ makerule ./auto.inc dep "./romcc ./auto.E" act "./romcc -O ./auto.E > auto.inc"
mainboardinit ./auto.inc
#
###
### Include the secondary Configuration files
### Include the secondary Configuration files
###
northbridge amd/amdk8
end
@ -286,6 +286,6 @@ export CC:=$(CONFIG_CROSS_COMPILE)gcc
\end{verbatim}
In other words, instead of expressions, we see the values. It's easier to
deal with.
In other words, instead of expressions, we see the values. It's easier to
deal with.

94
documentation/cbfs.txt
View File

@ -4,71 +4,71 @@ Received: from www.crouse-house.com ([199.45.160.146]
From: Jordan Crouse <jordan@cosmicpenguin.net>
Greetings. I apologize for the incompleteness of what I am about to
discuss. I was planning on working on it leisurely, but my employment
circumstances changed and I've been trying to get it completed in a
Greetings. I apologize for the incompleteness of what I am about to
discuss. I was planning on working on it leisurely, but my employment
circumstances changed and I've been trying to get it completed in a
hurry before I had to leave it behind.
I've been thinking a lot about LAR lately, and ways to make it more
extensible and robust. Marc and I have been trading ideas back and
forth for a number of months, and over time a clear idea of what I
I've been thinking a lot about LAR lately, and ways to make it more
extensible and robust. Marc and I have been trading ideas back and
forth for a number of months, and over time a clear idea of what I
wanted to do started to take shape.
My goal was to add small things to LAR while retaining the overall
scheme. Over time, the scheme evolved slightly, but I think you'll find
that it remains true to the original idea. Below is the beginnings of
an architecture document - I did it in text form, but if met with
aclaim, it should be wikified. This presents what I call CBFS - the
next generation LAR for next generation Coreboot. Its easier to
My goal was to add small things to LAR while retaining the overall
scheme. Over time, the scheme evolved slightly, but I think you'll find
that it remains true to the original idea. Below is the beginnings of
an architecture document - I did it in text form, but if met with
aclaim, it should be wikified. This presents what I call CBFS - the
next generation LAR for next generation Coreboot. Its easier to
describe what it is by describing what changed:
A header has been added somewhere in the bootblock similar to Carl
Daniel's scheme. In addition to the coreboot information, the header
reports the size of the ROM, the alignment of the blocks, and the offset
of the first component in the CBFS. The master header provides all
A header has been added somewhere in the bootblock similar to Carl
Daniel's scheme. In addition to the coreboot information, the header
reports the size of the ROM, the alignment of the blocks, and the offset
of the first component in the CBFS. The master header provides all
the information LAR needs plus the magic number information flashrom needs.
Each "file" (or component, as I style them) now has a type associated
with it. The type is used by coreboot to identify the type of file that
it is loading, and it can also be used by payloads to group items in the
Each "file" (or component, as I style them) now has a type associated
with it. The type is used by coreboot to identify the type of file that
it is loading, and it can also be used by payloads to group items in the
CBFS by type (i.e - bayou can ask for all components that are payloads).
The header on each "file" (or component, as I like to style them) has
been simplified - We now only store the length, the type, the checksum,
and the offset to the data. The name scheme remains the same. The
addtional information, which is component specific, has been moved to
The header on each "file" (or component, as I like to style them) has
been simplified - We now only store the length, the type, the checksum,
and the offset to the data. The name scheme remains the same. The
addtional information, which is component specific, has been moved to
the component itself (see below).
The components are arranged in the ROM aligned along the specified
The components are arranged in the ROM aligned along the specified
alignment from the master header - this is to facilitate partial re-write.
Other then that, the LAR ideas remain pretty much the same.
The plan for moving the metadata to the components is to allow many
different kinds of components, not all of which are groked by coreboot.
However, there are three essential component types that are groked by
The plan for moving the metadata to the components is to allow many
different kinds of components, not all of which are groked by coreboot.
However, there are three essential component types that are groked by
coreboot, and they are defined:
stage - the stage is being parsed from the original ELF, and stored in
the ROM as a single blob of binary data. The load address, start
stage - the stage is being parsed from the original ELF, and stored in
the ROM as a single blob of binary data. The load address, start
address, compression type and length are stored in the component sub-header.
payload - this is essentially SELF in different clothing - same idea as
payload - this is essentially SELF in different clothing - same idea as
SELF, with the sub-header as above.
optionrom - This is in flux - right now, the optionrom is stored
optionrom - This is in flux - right now, the optionrom is stored
unadulterated and uncompressed, but that is likely to be changed.
Following this email are two replies containing the v3 code and a new
ROM tool to implement this respectively. I told you that I was trying
to get this out before I disappear, and I'm not kidding - the code is
compile tested and not run-tested. I hope that somebody will embrace
this code and take it the rest of the way, otherwise it will die a
Following this email are two replies containing the v3 code and a new
ROM tool to implement this respectively. I told you that I was trying
to get this out before I disappear, and I'm not kidding - the code is
compile tested and not run-tested. I hope that somebody will embrace
this code and take it the rest of the way, otherwise it will die a
pretty short death.
I realize that this will start an awesome flamewar, and I'm looking
forward to it. Thanks for listening to me over the years - and good
luck with coreboot. When you all make a million dollars, send me a few
I realize that this will start an awesome flamewar, and I'm looking
forward to it. Thanks for listening to me over the years - and good
luck with coreboot. When you all make a million dollars, send me a few
bucks, will you?
Jordan
@ -152,7 +152,7 @@ struct cbfs_header {
The meaning of each member is as follows:
'magic' is a 32 bit number that identifies the ROM as a CBFS type. The
'magic' is a 32 bit number that identifies the ROM as a CBFS type. The
magic
number is 0x4F524243, which is 'ORBC' in ASCII.
@ -160,7 +160,7 @@ number is 0x4F524243, which is 'ORBC' in ASCII.
0xFFFFFFFF to locate the beginning of the ROM in memory.
'align' is the number of bytes that each component is aligned to within the
ROM. This is used to make sure that each component is aligned correctly
ROM. This is used to make sure that each component is aligned correctly
with
regards to the erase block sizes on the ROM - allowing one to replace a
component at runtime without disturbing the others.
@ -170,7 +170,7 @@ the ROM). This is to allow for arbitrary space to be left at the beginning
of the ROM for things like embedded controller firmware.
= Bootblock =
The bootblock is a mandatory component in the ROM. It is located in the
The bootblock is a mandatory component in the ROM. It is located in the
last
20k of the ROM space, and contains, among other things, the location of the
master header and the entry point for the loader firmware. The bootblock
@ -179,11 +179,11 @@ does not have a component header attached to it.
= Components =
CBFS components are placed in the ROM starting at 'offset' specified in
the master header and ending at the bootblock. Thus the total size
the master header and ending at the bootblock. Thus the total size
available
for components in the ROM is (ROM size - 20k - 'offset'). Each CBFS
component is to be aligned according to the 'align' value in the header.
Thus, if a component of size 1052 is located at offset 0 with an 'align'
Thus, if a component of size 1052 is located at offset 0 with an 'align'
value
of 1024, the next component will be located at offset 2048.
@ -214,12 +214,12 @@ below.
'checksum' is a 32bit checksum of the entire component, including the
header and name.
'offset' is the start of the component data, based off the start of the
'offset' is the start of the component data, based off the start of the
header.
The difference between the size of the header and offset is the size of the
component name.
Immediately following the header will be the name of the component,
Immediately following the header will be the name of the component,
which will
null terminated and 16 byte aligned. The following picture shows the
structure of the header:
@ -248,7 +248,7 @@ component was found.
Upon recognizing a component, the software then has to search for the
specific name of the component. This is accomplished by comparing the
desired name with the string on the component located at
offset + sizeof(struct cbfs_file). If the string matches, then the
offset + sizeof(struct cbfs_file). If the string matches, then the
component
has been located, otherwise the software should add 'offset' + 'len' to
the offset and resume the search for the magic value.

14
documentation/codeflow.svg
View File

@ -97,7 +97,7 @@
<g>
<g>
<g>
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,31.246 130.359,46.62 132.854,44.7
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,31.246 130.359,46.62 132.854,44.7
132.027,51.206 131.201,57.711 124.701,56.845 118.201,55.98 120.608,54.127 110.178,33.439 "/>
</g>
<polygon fill="#231F20" points="131.101,57.636 132.228,59.101 133.828,45.178 133.062,44.181 "/>
@ -117,7 +117,7 @@
<g>
<g>
<g>
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,81.246 130.359,96.62 132.854,94.7
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,81.246 130.359,96.62 132.854,94.7
132.027,101.206 131.201,107.711 124.701,106.845 118.201,105.98 120.608,104.127 110.178,83.439 "/>
</g>
<polygon fill="#231F20" points="131.101,107.636 132.228,109.101 133.828,95.178 133.062,94.181 "/>
@ -137,7 +137,7 @@
<g>
<g>
<g>
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,151.586 130.359,166.961 132.854,165.041
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,151.586 130.359,166.961 132.854,165.041
132.027,171.546 131.201,178.052 124.701,177.186 118.201,176.321 120.608,174.468 110.178,153.78 "/>
</g>
<polygon fill="#231F20" points="131.101,177.977 132.228,179.442 133.828,165.519 133.062,164.522 "/>
@ -157,7 +157,7 @@
<g>
<g>
<g>
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,227.013 130.359,242.387 132.854,240.467
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,227.013 130.359,242.387 132.854,240.467
132.027,246.973 131.201,253.478 124.701,252.612 118.201,251.747 120.608,249.894 110.178,229.207 "/>
</g>
<polygon fill="#231F20" points="131.101,253.403 132.228,254.868 133.828,240.945 133.062,239.948 "/>
@ -177,7 +177,7 @@
<g>
<g>
<g>
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,303.013 130.359,318.388 132.854,316.468
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,303.013 130.359,318.388 132.854,316.468
132.027,322.973 131.201,329.479 124.701,328.612 118.201,327.747 120.607,325.895 110.178,305.207 "/>
</g>
<polygon fill="#231F20" points="131.101,329.404 132.228,330.868 133.829,316.945 133.062,315.948 "/>
@ -197,7 +197,7 @@
<g>
<g>
<g>
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,395.872 130.359,411.247 132.854,409.327
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,395.872 130.359,411.247 132.854,409.327
132.027,415.833 131.201,422.338 124.701,421.473 118.201,420.606 120.608,418.754 110.178,398.066 "/>
</g>
<polygon fill="#231F20" points="131.101,422.264 132.228,423.728 133.828,409.805 133.062,408.808 "/>
@ -217,7 +217,7 @@
<g>
<g>
<g>
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,452.152 130.359,467.528 132.854,465.608
<polygon fill="#FFFFFF" stroke="#231F20" stroke-width="0.3876" points="113.028,452.152 130.359,467.528 132.854,465.608
132.027,472.113 131.201,478.619 124.701,477.753 118.201,476.888 120.607,475.035 110.178,454.347 "/>
</g>
<polygon fill="#231F20" points="131.101,478.545 132.228,480.009 133.829,466.085 133.062,465.089 "/>

Side by Side Swipe Overlay

Before

Width:  |  Height:  |  Size: 17 KiB

After

Width:  |  Height:  |  Size: 17 KiB

4
payloads/bayou/bayou.xml.example
View File

@ -29,11 +29,11 @@
<chain>
<file>payloads/passwd.elf</file>
<lar>passwd</lar>
</chain>
</chain>
<chain>
<file>payloads/coreinfo.elf</file>
</chain>
</payload>
</payload>
<payload type="chooser">
<file>payloads/coreinfo.elf</file>
</payload>

40
payloads/bayou/lzmadecode.c
View File

@ -1,21 +1,21 @@
/*
LzmaDecode.c
LZMA Decoder (optimized for Speed version)
LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
http://www.7-zip.org/
LZMA SDK is licensed under two licenses:
1) GNU Lesser General Public License (GNU LGPL)
2) Common Public License (CPL)
It means that you can select one of these two licenses and
It means that you can select one of these two licenses and
follow rules of that license.
SPECIAL EXCEPTION:
Igor Pavlov, as the author of this Code, expressly permits you to
statically or dynamically link your Code (or bind by name) to the
interfaces of this file without subjecting your linked Code to the
terms of the CPL or GNU LGPL. Any modifications or additions
Igor Pavlov, as the author of this Code, expressly permits you to
statically or dynamically link your Code (or bind by name) to the
interfaces of this file without subjecting your linked Code to the
terms of the CPL or GNU LGPL. Any modifications or additions
to this file, however, are subject to the LGPL or CPL terms.
*/
@ -37,7 +37,7 @@
#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
@ -47,9 +47,9 @@
#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
{ UpdateBit0(p); mi <<= 1; A0; } else \
{ UpdateBit1(p); mi = (mi + mi) + 1; A1; }
#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
{ UpdateBit1(p); mi = (mi + mi) + 1; A1; }
#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
#define RangeDecoderBitTreeDecode(probs, numLevels, res) \
{ int i = numLevels; res = 1; \
@ -72,7 +72,7 @@
#define LenLow (LenChoice2 + 1)
#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
#define kNumStates 12
@ -161,7 +161,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
for (i = 0; i < numProbs; i++)
p[i] = kBitModelTotal >> 1;
}
RC_INIT(inStream, inSize);
@ -170,7 +170,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
CProb *prob;
UInt32 bound;
int posState = (int)(
(nowPos
(nowPos
)
& posStateMask);
@ -179,9 +179,9 @@ int LzmaDecode(CLzmaDecoderState *vs,
{
int symbol = 1;
UpdateBit0(prob)
prob = p + Literal + (LZMA_LIT_SIZE *
prob = p + Literal + (LZMA_LIT_SIZE *
(((
(nowPos
(nowPos
)
& literalPosMask) << lc) + (previousByte >> (8 - lc))));
@ -212,7 +212,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
else if (state < 10) state -= 3;
else state -= 6;
}
else
else
{
UpdateBit1(prob);
prob = p + IsRep + state;
@ -236,10 +236,10 @@ int LzmaDecode(CLzmaDecoderState *vs,
IfBit0(prob)
{
UpdateBit0(prob);
if (nowPos == 0)
return LZMA_RESULT_DATA_ERROR;
state = state < kNumLitStates ? 9 : 11;
previousByte = outStream[nowPos - rep0];
outStream[nowPos++] = previousByte;
@ -261,7 +261,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
UpdateBit0(prob);
distance = rep1;
}
else
else
{
UpdateBit1(prob);
prob = p + IsRepG2 + state;
@ -322,7 +322,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
int posSlot;
state += kNumLitStates;
prob = p + PosSlot +
((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
kNumPosSlotBits);
RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
if (posSlot >= kStartPosModelIndex)

12
payloads/bayou/lzmadecode.h
View File

@ -1,4 +1,4 @@
/*
/*
LzmaDecode.h
LZMA Decoder interface
@ -8,14 +8,14 @@
LZMA SDK is licensed under two licenses:
1) GNU Lesser General Public License (GNU LGPL)
2) Common Public License (CPL)
It means that you can select one of these two licenses and
It means that you can select one of these two licenses and
follow rules of that license.
SPECIAL EXCEPTION:
Igor Pavlov, as the author of this code, expressly permits you to
statically or dynamically link your code (or bind by name) to the
interfaces of this file without subjecting your linked code to the
terms of the CPL or GNU LGPL. Any modifications or additions
Igor Pavlov, as the author of this code, expressly permits you to
statically or dynamically link your code (or bind by name) to the
interfaces of this file without subjecting your linked code to the
terms of the CPL or GNU LGPL. Any modifications or additions
to this file, however, are subject to the LGPL or CPL terms.
*/

4
payloads/bayou/nrv2b.c
View File

@ -1,6 +1,6 @@
#include <libpayload.h>
// This GETBIT is supposed to work on little endian
// This GETBIT is supposed to work on little endian
// 32bit systems. The algorithm will definitely need
// some fixing on other systems, but it might not be
// a problem since the nrv2b binary behaves the same..
@ -40,7 +40,7 @@ unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p)
// skip length
src += 4;
/* FIXME: check olen with the length stored in first 4 bytes */
/* FIXME: check olen with the length stored in first 4 bytes */
for (;;) {
unsigned int m_off, m_len;

46
payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.c
View File

@ -1,21 +1,21 @@
/*
LzmaDecode.c
LZMA Decoder (optimized for Speed version)
LZMA SDK 4.22 Copyright (c) 1999-2005 Igor Pavlov (2005-06-10)
http://www.7-zip.org/
LZMA SDK is licensed under two licenses:
1) GNU Lesser General Public License (GNU LGPL)
2) Common Public License (CPL)
It means that you can select one of these two licenses and
It means that you can select one of these two licenses and
follow rules of that license.
SPECIAL EXCEPTION:
Igor Pavlov, as the author of this Code, expressly permits you to
statically or dynamically link your Code (or bind by name) to the
interfaces of this file without subjecting your linked Code to the
terms of the CPL or GNU LGPL. Any modifications or additions
Igor Pavlov, as the author of this Code, expressly permits you to
statically or dynamically link your Code (or bind by name) to the
interfaces of this file without subjecting your linked Code to the
terms of the CPL or GNU LGPL. Any modifications or additions
to this file, however, are subject to the LGPL or CPL terms.
*/
@ -50,7 +50,7 @@
#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
#endif
#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
@ -61,9 +61,9 @@
#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
{ UpdateBit0(p); mi <<= 1; A0; } else \
{ UpdateBit1(p); mi = (mi + mi) + 1; A1; }
#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
{ UpdateBit1(p); mi = (mi + mi) + 1; A1; }
#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
#define RangeDecoderBitTreeDecode(probs, numLevels, res) \
{ int i = numLevels; res = 1; \
@ -86,7 +86,7 @@
#define LenLow (LenChoice2 + 1)
#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
#define kNumStates 12
@ -172,7 +172,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
int lc = vs->Properties.lc;
#ifdef _LZMA_OUT_READ
UInt32 Range = vs->Range;
UInt32 Code = vs->Code;
#ifdef _LZMA_IN_CB
@ -214,7 +214,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
UInt32 i;
for (i = 0; i < numProbs; i++)
p[i] = kBitModelTotal >> 1;
p[i] = kBitModelTotal >> 1;
rep0 = rep1 = rep2 = rep3 = 1;
state = 0;
globalPos = 0;
@ -265,7 +265,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
for (i = 0; i < numProbs; i++)
p[i] = kBitModelTotal >> 1;
}
#ifdef _LZMA_IN_CB
RC_INIT;
#else
@ -279,7 +279,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
CProb *prob;
UInt32 bound;
int posState = (int)(
(nowPos
(nowPos
#ifdef _LZMA_OUT_READ
+ globalPos
#endif
@ -291,9 +291,9 @@ int LzmaDecode(CLzmaDecoderState *vs,
{
int symbol = 1;
UpdateBit0(prob)
prob = p + Literal + (LZMA_LIT_SIZE *
prob = p + Literal + (LZMA_LIT_SIZE *
(((
(nowPos
(nowPos
#ifdef _LZMA_OUT_READ
+ globalPos
#endif
@ -342,7 +342,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
else if (state < 10) state -= 3;
else state -= 6;
}
else
else
{
UpdateBit1(prob);
prob = p + IsRep + state;
@ -369,14 +369,14 @@ int LzmaDecode(CLzmaDecoderState *vs,
UInt32 pos;
#endif
UpdateBit0(prob);
#ifdef _LZMA_OUT_READ
if (distanceLimit == 0)
#else
if (nowPos == 0)
#endif
return LZMA_RESULT_DATA_ERROR;
state = state < kNumLitStates ? 9 : 11;
#ifdef _LZMA_OUT_READ
pos = dictionaryPos - rep0;
@ -412,7 +412,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
UpdateBit0(prob);
distance = rep1;
}
else
else
{
UpdateBit1(prob);
prob = p + IsRepG2 + state;
@ -473,7 +473,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
int posSlot;
state += kNumLitStates;
prob = p + PosSlot +
((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
kNumPosSlotBits);
RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
if (posSlot >= kStartPosModelIndex)
@ -528,7 +528,7 @@ int LzmaDecode(CLzmaDecoderState *vs,
len += kMatchMinLen;
#ifdef _LZMA_OUT_READ
if (rep0 > distanceLimit)
if (rep0 > distanceLimit)
#else
if (rep0 > nowPos)
#endif

14
payloads/bayou/util/pbuilder/lzma/C/7zip/Decompress/LzmaDecode.h
View File

@ -1,4 +1,4 @@
/*
/*
LzmaDecode.h
LZMA Decoder interface
@ -8,14 +8,14 @@
LZMA SDK is licensed under two licenses:
1) GNU Lesser General Public License (GNU LGPL)
2) Common Public License (CPL)
It means that you can select one of these two licenses and
It means that you can select one of these two licenses and
follow rules of that license.
SPECIAL EXCEPTION:
Igor Pavlov, as the author of this code, expressly permits you to
statically or dynamically link your code (or bind by name) to the
interfaces of this file without subjecting your linked code to the
terms of the CPL or GNU LGPL. Any modifications or additions
Igor Pavlov, as the author of this code, expressly permits you to
statically or dynamically link your code (or bind by name) to the
interfaces of this file without subjecting your linked code to the
terms of the CPL or GNU LGPL. Any modifications or additions
to this file, however, are subject to the LGPL or CPL terms.
*/
@ -29,7 +29,7 @@
/* Use read function for output data */
/* #define _LZMA_PROB32 */
/* It can increase speed on some 32-bit CPUs,
/* It can increase speed on some 32-bit CPUs,
but memory usage will be doubled in that case */
/* #define _LZMA_LOC_OPT */

58
payloads/bayou/util/pbuilder/lzma/minilzma.cc
View File

@ -89,7 +89,7 @@ static UInt32 SelectDictionarySizeFor(unsigned datasize)
if(datasize <= 512) return 512;
if(datasize <= 1024) return 1024;
if(datasize <= 4096) return 4096;
if(datasize <= 16384) return 32768;
if(datasize <= 16384) return 32768;
if(datasize <= 65536) return 528288;
if(datasize <= 528288) return 1048576*4;
if(datasize <= 786432) reutrn 1048576*16;
@ -105,12 +105,12 @@ class CInStreamRam: public ISequentialInStream, public CMyUnknownImp
size_t Pos;
public:
MY_UNKNOWN_IMP
CInStreamRam(const std::vector<unsigned char>& buf) : input(buf), Pos(0)
{
}
virtual ~CInStreamRam() {}
STDMETHOD(Read)(void *data, UInt32 size, UInt32 *processedSize);
};
@ -118,12 +118,12 @@ STDMETHODIMP CInStreamRam::Read(void *data, UInt32 size, UInt32 *processedSize)
{
UInt32 remain = input.size() - Pos;
if (size > remain) size = remain;
std::memcpy(data, &input[Pos], size);
Pos += size;
if(processedSize != NULL) *processedSize = size;
return S_OK;
}
@ -133,27 +133,27 @@ class COutStreamRam: public ISequentialOutStream, public CMyUnknownImp
size_t Pos;
public:
MY_UNKNOWN_IMP
COutStreamRam(): result(), Pos(0) { }
virtual ~COutStreamRam() { }
void Reserve(unsigned n) { result.reserve(n); }
const std::vector<Byte>& Get() const { return result; }
HRESULT WriteByte(Byte b)
{
if(Pos >= result.size()) result.resize(Pos+1);
result[Pos++] = b;
return S_OK;
}
STDMETHOD(Write)(const void *data, UInt32 size, UInt32 *processedSize);
};
STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *processedSize)
{
if(Pos+size > result.size()) result.resize(Pos+size);
std::memcpy(&result[Pos], data, size);
if(processedSize != NULL) *processedSize = size;
Pos += size;
@ -163,15 +163,15 @@ STDMETHODIMP COutStreamRam::Write(const void *data, UInt32 size, UInt32 *process
const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>& buf)
{
if(buf.empty()) return buf;
const UInt32 dictionarysize = SelectDictionarySizeFor(buf.size());
NCompress::NLZMA::CEncoder *encoderSpec = new NCompress::NLZMA::CEncoder;
CMyComPtr<ICompressCoder> encoder = encoderSpec;
const PROPID propIDs[] =
const PROPID propIDs[] =
{
NCoderPropID::kAlgorithm,
NCoderPropID::kDictionarySize,
NCoderPropID::kDictionarySize,
NCoderPropID::kNumFastBytes,
};
const unsigned kNumProps = sizeof(propIDs) / sizeof(propIDs[0]);
@ -185,16 +185,16 @@ const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>&
Error:
return std::vector<unsigned char> ();
}
COutStreamRam *const outStreamSpec = new COutStreamRam;
CMyComPtr<ISequentialOutStream> outStream = outStreamSpec;
CInStreamRam *const inStreamSpec = new CInStreamRam(buf);
CMyComPtr<ISequentialInStream> inStream = inStreamSpec;
outStreamSpec->Reserve(buf.size());
if (encoderSpec->WriteCoderProperties(outStream) != S_OK) goto Error;
for (unsigned i = 0; i < 8; i++)
{
UInt64 t = (UInt64)buf.size();
@ -203,7 +203,7 @@ const std::vector<unsigned char> LZMACompress(const std::vector<unsigned char>&
HRESULT lzmaResult = encoder->Code(inStream, outStream, 0, 0, 0);
if (lzmaResult != S_OK) goto Error;
return outStreamSpec->Get();
}
@ -216,22 +216,22 @@ const std::vector<unsigned char> LZMADeCompress
(const std::vector<unsigned char>& buf)
{
if(buf.size() <= 5+8) return std::vector<unsigned char> ();
uint_least64_t out_sizemax = R64(&buf[5]);
std::vector<unsigned char> result(out_sizemax);
CLzmaDecoderState state;
LzmaDecodeProperties(&state.Properties, &buf[0], LZMA_PROPERTIES_SIZE);
state.Probs = new CProb[LzmaGetNumProbs(&state.Properties)];
SizeT in_done;
SizeT out_done;
LzmaDecode(&state, &buf[13], buf.size()-13, &in_done,
&result[0], result.size(), &out_done);
delete[] state.Probs;
result.resize(out_done);
return result;
}
@ -242,7 +242,7 @@ int main(int argc, char *argv[])
char *s;
FILE *f, *infile, *outfile;
int c;
if (argc != 4) {
std::fprintf(stderr, "'lzma e file1 file2' encodes file1 into file2.\n"
"'lzma d file2 file1' decodes file2 into file1.\n");
@ -270,9 +270,9 @@ int main(int argc, char *argv[])
fread(Buf,si, 1, infile);
std::vector<unsigned char> result;
if (toupper(*argv[1]) == 'E')
if (toupper(*argv[1]) == 'E')
result = LZMACompress(std::vector<unsigned char>(Buf,Buf+si));
else
else
result = LZMADeCompress(std::vector<unsigned char>(Buf,Buf+si));
fwrite(&result[0], result.size(), 1, outfile);
@ -289,7 +289,7 @@ extern "C" {
* @param in a pointer to the buffer
* @param in_len the length in bytes
* @param out a pointer to a buffer of at least size in_len
* @param out_len a pointer to the compressed length of in
* @param out_len a pointer to the compressed length of in
*/
void do_lzma_compress(char *in, int in_len, char *out, int *out_len) {

2
payloads/coreinfo/cpuid.S
View File

@ -20,7 +20,7 @@
*/
/* calling syntax: docpuid(idx,eax,ebx,ecx,edx) */
.align 4
.text

2
payloads/coreinfo/pci_module.c
View File

@ -194,7 +194,7 @@ static void pci_scan_bus(int bus)
if (devices_index >= MAX_PCI_DEVICES)
return;
devices[devices_index].device =
devices[devices_index].device =
PCI_DEV(bus, slot, func);
devices[devices_index++].id = val;

86
payloads/coreinfo/util/kconfig/lex.zconf.c_shipped
View File

@ -52,7 +52,7 @@
#if __STDC_VERSION__ >= 199901L
/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
* if you want the limit (max/min) macros for int types.
* if you want the limit (max/min) macros for int types.
*/
#ifndef __STDC_LIMIT_MACROS
#define __STDC_LIMIT_MACROS 1
@ -69,7 +69,7 @@ typedef uint32_t flex_uint32_t;
typedef signed char flex_int8_t;
typedef short int flex_int16_t;
typedef int flex_int32_t;
typedef unsigned char flex_uint8_t;
typedef unsigned char flex_uint8_t;
typedef unsigned short int flex_uint16_t;
typedef unsigned int flex_uint32_t;
#endif /* ! C99 */
@ -179,7 +179,7 @@ extern FILE *zconfin, *zconfout;
#define EOB_ACT_LAST_MATCH 2
#define YY_LESS_LINENO(n)
/* Return all but the first "n" matched characters back to the input stream. */
#define yyless(n) \
do \
@ -246,7 +246,7 @@ struct yy_buffer_state
int yy_bs_lineno; /**< The line count. */
int yy_bs_column; /**< The column count. */
/* Whether to try to fill the input buffer when we reach the
* end of it.
*/
@ -866,7 +866,7 @@ extern int zconfwrap (void );
#endif
static void yyunput (int c,char *buf_ptr );
#ifndef yytext_ptr
static void yy_flex_strncpy (char *,yyconst char *,int );
#endif
@ -971,7 +971,7 @@ YY_DECL
register yy_state_type yy_current_state;
register char *yy_cp, *yy_bp;
register int yy_act;
int str = 0;
int ts, i;
@ -1574,7 +1574,7 @@ static int yy_get_next_buffer (void)
{
register yy_state_type yy_current_state;
register char *yy_cp;
yy_current_state = (yy_start);
for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
@ -1593,7 +1593,7 @@ static int yy_get_next_buffer (void)
static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
{
register int yy_is_jam;
yy_current_state = yy_nxt[yy_current_state][1];
yy_is_jam = (yy_current_state <= 0);
@ -1603,7 +1603,7 @@ static int yy_get_next_buffer (void)
static void yyunput (int c, register char * yy_bp )
{
register char *yy_cp;
yy_cp = (yy_c_buf_p);
/* undo effects of setting up zconftext */
@ -1646,7 +1646,7 @@ static int yy_get_next_buffer (void)
{
int c;
*(yy_c_buf_p) = (yy_hold_char);
if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
@ -1713,12 +1713,12 @@ static int yy_get_next_buffer (void)
/** Immediately switch to a different input stream.
* @param input_file A readable stream.
*
*
* @note This function does not reset the start condition to @c INITIAL .
*/
void zconfrestart (FILE * input_file )
{
if ( ! YY_CURRENT_BUFFER ){
zconfensure_buffer_stack ();
YY_CURRENT_BUFFER_LVALUE =
@ -1731,11 +1731,11 @@ static int yy_get_next_buffer (void)
/** Switch to a different input buffer.
* @param new_buffer The new input buffer.
*
*
*/
void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer )
{
/* TODO. We should be able to replace this entire function body
* with
* zconfpop_buffer_state();
@ -1775,13 +1775,13 @@ static void zconf_load_buffer_state (void)
/** Allocate and initialize an input buffer state.
* @param file A readable stream.
* @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
*
*
* @return the allocated buffer state.
*/
YY_BUFFER_STATE zconf_create_buffer (FILE * file, int size )
{
YY_BUFFER_STATE b;
b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) );
if ( ! b )
YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
@ -1804,11 +1804,11 @@ static void zconf_load_buffer_state (void)
/** Destroy the buffer.
* @param b a buffer created with zconf_create_buffer()
*
*
*/
void zconf_delete_buffer (YY_BUFFER_STATE b )
{
if ( ! b )
return;
@ -1829,7 +1829,7 @@ static void zconf_load_buffer_state (void)
{
int oerrno = errno;
zconf_flush_buffer(b );
b->yy_input_file = file;
@ -1845,13 +1845,13 @@ static void zconf_load_buffer_state (void)
}
b->yy_is_interactive = 0;
errno = oerrno;
}
/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
* @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
*
*
*/
void zconf_flush_buffer (YY_BUFFER_STATE b )
{
@ -1880,7 +1880,7 @@ static void zconf_load_buffer_state (void)
* the current state. This function will allocate the stack
* if necessary.
* @param new_buffer The new state.
*
*
*/
void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
{
@ -1910,7 +1910,7 @@ void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
/** Removes and deletes the top of the stack, if present.
* The next element becomes the new top.
*
*
*/
void zconfpop_buffer_state (void)
{
@ -1934,7 +1934,7 @@ void zconfpop_buffer_state (void)
static void zconfensure_buffer_stack (void)
{
int num_to_alloc;
if (!(yy_buffer_stack)) {
/* First allocation is just for 2 elements, since we don't know if this
@ -1945,9 +1945,9 @@ static void zconfensure_buffer_stack (void)
(yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
(num_to_alloc * sizeof(struct yy_buffer_state*)
);
memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
(yy_buffer_stack_max) = num_to_alloc;
(yy_buffer_stack_top) = 0;
return;
@ -1973,13 +1973,13 @@ static void zconfensure_buffer_stack (void)
/** Setup the input buffer state to scan directly from a user-specified character buffer.
* @param base the character buffer
* @param size the size in bytes of the character buffer
*
* @return the newly allocated buffer state object.
*
* @return the newly allocated buffer state object.
*/
YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size )
{
YY_BUFFER_STATE b;
if ( size < 2 ||
base[size-2] != YY_END_OF_BUFFER_CHAR ||
base[size-1] != YY_END_OF_BUFFER_CHAR )
@ -2008,14 +2008,14 @@ YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size )
/** Setup the input buffer state to scan a string. The next call to zconflex() will
* scan from a @e copy of @a str.
* @param str a NUL-terminated string to scan
*
*
* @return the newly allocated buffer state object.
* @note If you want to scan bytes that may contain NUL values, then use
* zconf_scan_bytes() instead.
*/
YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
{
return zconf_scan_bytes(yystr,strlen(yystr) );
}
@ -2023,7 +2023,7 @@ YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
* scan from a @e copy of @a bytes.
* @param bytes the byte buffer to scan
* @param len the number of bytes in the buffer pointed to by @a bytes.
*
*
* @return the newly allocated buffer state object.
*/
YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len )
@ -2032,7 +2032,7 @@ YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len )
char *buf;
yy_size_t n;
int i;
/* Get memory for full buffer, including space for trailing EOB's. */
n = _yybytes_len + 2;
buf = (char *) zconfalloc(n );
@ -2086,16 +2086,16 @@ static void yy_fatal_error (yyconst char* msg )
/* Accessor methods (get/set functions) to struct members. */
/** Get the current line number.
*
*
*/
int zconfget_lineno (void)
{
return zconflineno;
}
/** Get the input stream.
*
*
*/
FILE *zconfget_in (void)
{
@ -2103,7 +2103,7 @@ FILE *zconfget_in (void)
}
/** Get the output stream.
*
*
*/
FILE *zconfget_out (void)
{
@ -2111,7 +2111,7 @@ FILE *zconfget_out (void)
}
/** Get the length of the current token.
*
*
*/
int zconfget_leng (void)
{
@ -2119,7 +2119,7 @@ int zconfget_leng (void)
}
/** Get the current token.
*
*
*/
char *zconfget_text (void)
@ -2129,18 +2129,18 @@ char *zconfget_text (void)
/** Set the current line number.
* @param line_number
*
*
*/
void zconfset_lineno (int line_number )
{
zconflineno = line_number;
}
/** Set the input stream. This does not discard the current
* input buffer.
* @param in_str A readable stream.
*
*
* @see zconf_switch_to_buffer
*/
void zconfset_in (FILE * in_str )
@ -2194,7 +2194,7 @@ static int yy_init_globals (void)
/* zconflex_destroy is for both reentrant and non-reentrant scanners. */
int zconflex_destroy (void)
{
/* Pop the buffer stack, destroying each element. */
while(YY_CURRENT_BUFFER){
zconf_delete_buffer(YY_CURRENT_BUFFER );

2
payloads/coreinfo/util/kconfig/lxdialog/BIG.FAT.WARNING
View File

@ -1,4 +1,4 @@
This is NOT the official version of dialog. This version has been
significantly modified from the original. It is for use by the Linux
kernel configuration script. Please do not bother Savio Lam with
kernel configuration script. Please do not bother Savio Lam with
questions about this program.

2
payloads/coreinfo/util/kconfig/lxdialog/menubox.c
View File

@ -26,7 +26,7 @@
*
* *) A bugfix for the Page-Down problem
*
* *) Formerly when I used Page Down and Page Up, the cursor would be set
* *) Formerly when I used Page Down and Page Up, the cursor would be set
* to the first position in the menu box. Now lxdialog is a bit
* smarter and works more like other menu systems (just have a look at
* it).

2
payloads/coreinfo/util/kconfig/zconf.tab.c_shipped
View File

@ -1394,7 +1394,7 @@ yyparse ()
#endif
#endif
{
int yystate;
int yyn;
int yyresult;

62
payloads/external/tint/libpayload_tint.patch vendored
View File

@ -9,7 +9,7 @@ diff -Naur tint-0.03b.orig/config.h tint-0.03b/config.h
@@ -29,7 +29,16 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include <libpayload.h>
+#include <curses.h>
+#define random(x) rand(x)
@ -21,7 +21,7 @@ diff -Naur tint-0.03b.orig/config.h tint-0.03b/config.h
+#if 0
const char scorefile[] = SCOREFILE;
+#endif
#endif /* #ifndef CONFIG_H */
diff -Naur tint-0.03b.orig/engine.c tint-0.03b/engine.c
--- tint-0.03b.orig/engine.c 2005-07-17 13:26:22.000000000 +0200
@ -29,14 +29,14 @@ diff -Naur tint-0.03b.orig/engine.c tint-0.03b/engine.c
@@ -27,8 +27,12 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "config.h"
+
+#if 0
#include <stdlib.h>
#include <string.h>
+#endif
#include "typedefs.h"
#include "utils.h"
diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
@ -45,7 +45,7 @@ diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
@@ -27,9 +27,13 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "config.h"
+
+#if 0
@ -53,9 +53,9 @@ diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
#include <sys/time.h> /* gettimeofday() */
#include <unistd.h> /* gettimeofday() */
+#endif
#include <curses.h>
@@ -70,7 +74,11 @@
/* Initialize screen */
void io_init ()
@ -93,14 +93,14 @@ diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c
+#endif
return ch;
}
diff -Naur tint-0.03b.orig/Makefile tint-0.03b/Makefile
--- tint-0.03b.orig/Makefile 2005-07-17 13:30:54.000000000 +0200
+++ tint-0.03b/Makefile 2008-04-11 22:19:35.000000000 +0200
@@ -28,6 +28,36 @@
# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+LIBPAYLOAD_DIR := ../libpayload
+CC := $(LIBPAYLOAD_DIR)/bin/lpgcc
+AS := $(LIBPAYLOAD_DIR)/bin/lpas
@ -132,12 +132,12 @@ diff -Naur tint-0.03b.orig/Makefile tint-0.03b/Makefile
+ifdef $(UNUSED)
+
#CROSS = arm-linux-
bindir = $(DESTDIR)/usr/games
@@ -110,3 +140,4 @@
distclean: clean
$(MAKE) -C debian clean
+endif
diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
--- tint-0.03b.orig/tint.c 2005-07-17 13:26:43.000000000 +0200
@ -145,7 +145,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
@@ -27,6 +27,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#if 0
#include <stdlib.h>
#include <stdio.h>
@ -155,13 +155,13 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
#include <sys/types.h>
#include <unistd.h>
+#endif
#include "typedefs.h"
#include "utils.h"
@@ -321,6 +323,7 @@
time_t timestamp;
} score_t;
+#if 0
static void getname (char *name)
{
@ -171,7 +171,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
}
}
+#endif
+#if 0
static void err1 ()
{
@ -181,7 +181,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
exit (EXIT_FAILURE);
}
+#endif
void showplayerstats (engine_t *engine)
{
- fprintf (stderr,
@ -192,7 +192,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
@@ -360,6 +366,7 @@
GETSCORE (engine->score),engine->status.efficiency,GETSCORE (engine->score) / getsum ());
}
+#if 0
static void createscores (int score)
{
@ -202,7 +202,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
fprintf (stderr,"\t 1* %7d %s\n\n",score,scores[0].name);
}
+#endif
+#if 0
static int cmpscores (const void *a,const void *b)
{
@ -212,7 +212,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
return 0;
}
+#endif
+#if 0
static void savescores (int score)
{
@ -222,11 +222,11 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
fprintf (stderr,"\n");
}
+#endif
/***************************************************************************/
/***************************************************************************/
/***************************************************************************/
+#if 0
static void showhelp ()
{
@ -236,7 +236,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
exit (EXIT_FAILURE);
}
+#endif
static void parse_options (int argc,char *argv[])
{
+#if 0
@ -249,12 +249,12 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
}
+#endif
}
static void choose_level ()
{
+#if 0
char buf[NAMELEN];
do
@@ -549,6 +566,8 @@
buf[strlen (buf) - 1] = '\0';
@ -263,7 +263,7 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
+#endif
+ level = 1;
}
/***************************************************************************/
@@ -663,8 +682,15 @@
if (ch != 'q')
@ -280,14 +280,14 @@ diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c
exit (EXIT_SUCCESS);
+#endif
}
diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
--- tint-0.03b.orig/utils.c 2001-12-07 16:49:19.000000000 +0100
+++ tint-0.03b/utils.c 2008-04-11 22:19:35.000000000 +0200
@@ -27,9 +27,13 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include "config.h"
+
+#if 0
@ -295,9 +295,9 @@ diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
#include <time.h>
#include <limits.h>
+#endif
#include "typedefs.h"
@@ -41,8 +45,11 @@
#ifdef USE_RAND
srand (time (NULL));
@ -308,7 +308,7 @@ diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
+ srandom (123);
+#endif
}
/*
@@ -61,6 +68,7 @@
* Convert an str to long. Returns TRUE if successful,
@ -321,5 +321,5 @@ diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c
@@ -69,3 +77,4 @@
return TRUE;
}
+#endif

8
payloads/libpayload/Config.in
View File

@ -134,9 +134,9 @@ config SERIAL_ACS_FALLBACK
displaying a couple of other special graphics characters. The
ACS characters generally look good on screen, but can be difficult
to cut and paste from a terminal window to a text editor.
Say 'y' here if you want to always use plain ASCII characters to
approximate the appearance of ACS characters on the serial port
approximate the appearance of ACS characters on the serial port
console.
config VIDEO_CONSOLE
@ -194,12 +194,12 @@ config RTC_PORT_EXTENDED_VIA
For recent chipsets with 256 NVRAM bytes, you have to access the
upper 128 bytes (128-255) using two different I/O ports,
usually 0x72/0x73.
On some chipsets this can be a different set of ports, though.
The VIA VT8237R for example only recognizes the ports 0x74/0x75
for accessing the high 128 NVRAM bytes (as seems to be the case for
multiple VIA chipsets).
If you want to read or write CMOS bytes on computers with one of
these chipsets, say 'y' here.

1168
payloads/libpayload/Doxyfile
View File

File diff suppressed because it is too large Load Diff

2
payloads/libpayload/LICENSES
View File

@ -109,4 +109,4 @@ holders, and the exact license terms that apply.
http://www.openbsd.org/cgi-bin/cvsweb/src/lib/libc/hash/sha1.c
Original files: src/lib/libc/hash/sha1.c
Current version we use: CVS revision 1.20 2005/08/08

4
payloads/libpayload/Makefile
View File

@ -145,7 +145,7 @@ prepare:
$(Q)mkdir -p $(obj)/util/kconfig/lxdialog
$(Q)mkdir -p $(obj)/crypto $(obj)/curses $(obj)/drivers/video
$(Q)mkdir -p $(obj)/drivers/usb
$(Q)mkdir -p $(obj)/arch/$(ARCHDIR-y) $(obj)/lib/$(ARCHDIR-y) $(obj)/libc
$(Q)mkdir -p $(obj)/arch/$(ARCHDIR-y) $(obj)/lib/$(ARCHDIR-y) $(obj)/libc
$(Q)mkdir -p $(obj)/lib/$(ARCHDIR-y)
$(Q)mkdir -p $(obj)/include
@ -159,7 +159,7 @@ doxygen-clean:
clean: doxygen-clean
$(Q)rm -rf $(obj)/crypto $(obj)/curses $(obj)/drivers
$(Q)rm -rf $(obj)/i386 $(obj)/powerpc $(obj)/lib $(obj)/libc
$(Q)rm -rf $(obj)/i386 $(obj)/powerpc $(obj)/lib $(obj)/libc
distclean: clean
$(Q)rm -rf build # should be $(obj) ?

4
payloads/libpayload/bin/lpgcc
View File

@ -27,9 +27,9 @@
## SUCH DAMAGE.
# GCC wrapper for libpayload
# let's not recurse.
# let's not recurse.
# This is a hack, I know, but it makes sure that really simple user errors
# don't fork-bomb your machine.
# don't fork-bomb your machine.
b=`basename $CC`
if [ "$b" = "lpgcc" ]; then
CC=""

2
payloads/libpayload/curses/keyboard.c
View File

@ -197,7 +197,7 @@ int wgetch(WINDOW *win)
if (_halfdelay)
delay = _halfdelay;
else
else
delay = win->_delay;
return curses_getchar(delay);

12
payloads/libpayload/curses/tinycurses.c
View File

@ -499,7 +499,7 @@ int waddch(WINDOW *win, const chtype ch)
// NCURSES_CH_T wch;
// SetChar2(wch, ch);
if (win->_line[win->_cury].firstchar == _NOCHANGE ||
if (win->_line[win->_cury].firstchar == _NOCHANGE ||
win->_line[win->_cury].firstchar > win->_curx)
win->_line[win->_cury].firstchar = win->_curx;
@ -510,7 +510,7 @@ int waddch(WINDOW *win, const chtype ch)
win->_line[win->_cury].text[win->_curx].attr |=
((ch) & (chtype)A_ATTRIBUTES);
if (win->_line[win->_cury].lastchar == _NOCHANGE ||
if (win->_line[win->_cury].lastchar == _NOCHANGE ||
win->_line[win->_cury].lastchar < win->_curx)
win->_line[win->_cury].lastchar = win->_curx;
@ -535,7 +535,7 @@ int waddnstr(WINDOW *win, const char *astr, int n)
if (n < 0)
n = strlen(astr);
if (win->_line[win->_cury].firstchar == _NOCHANGE ||
if (win->_line[win->_cury].firstchar == _NOCHANGE ||
win->_line[win->_cury].firstchar > win->_curx)
win->_line[win->_cury].firstchar = win->_curx;
@ -554,7 +554,7 @@ int waddnstr(WINDOW *win, const char *astr, int n)
// }
}
if (win->_line[win->_cury].lastchar == _NOCHANGE ||
if (win->_line[win->_cury].lastchar == _NOCHANGE ||
win->_line[win->_cury].lastchar < win->_curx)
win->_line[win->_cury].lastchar = win->_curx;
@ -924,7 +924,7 @@ int wscrl(WINDOW *win, int n)
win->_line[y].firstchar = win->_line[y + n].firstchar;
win->_line[y].lastchar = win->_line[y + n].lastchar;
for (x = 0; x <= win->_maxx; x++) {
if ((win->_line[y].text[x].chars[0] != win->_line[y + n].text[x].chars[0]) ||
if ((win->_line[y].text[x].chars[0] != win->_line[y + n].text[x].chars[0]) ||
(win->_line[y].text[x].attr != win->_line[y + n].text[x].attr)) {
if (win->_line[y].firstchar == _NOCHANGE)
win->_line[y].firstchar = x;
@ -939,7 +939,7 @@ int wscrl(WINDOW *win, int n)
for (y = (win->_maxy+1 - n); y <= win->_maxy; y++) {
for (x = 0; x <= win->_maxx; x++) {
if ((win->_line[y].text[x].chars[0] != ' ') ||
if ((win->_line[y].text[x].chars[0] != ' ') ||
(win->_line[y].text[x].attr != A_NORMAL)) {
if (win->_line[y].firstchar == _NOCHANGE)
win->_line[y].firstchar = x;

2
payloads/libpayload/drivers/keyboard.c
View File

@ -295,7 +295,7 @@ static void keyboard_set_mode(unsigned char mode)
/**
* Set keyboard layout
* @param country string describing the keyboard layout language.
* @param country string describing the keyboard layout language.
* Valid values are "us", "de".
*/

4
payloads/libpayload/drivers/nvram.c
View File

@ -68,7 +68,7 @@
/**
* Read a byte from the specified NVRAM address.
*
*
* @param addr The NVRAM address to read a byte from.
* @return The byte at the given NVRAM address.
*/
@ -82,7 +82,7 @@ u8 nvram_read(u8 addr)
/**
* Write a byte to the specified NVRAM address.
*
*
* @param val The byte to write to NVRAM.
* @param addr The NVRAM address to write to.
*/

2
payloads/libpayload/drivers/options.c
View File

@ -81,7 +81,7 @@ int get_option(void *dest, char *name)
struct cb_cmos_option_table *option_table = phys_to_virt(lib_sysinfo.option_table);
struct cb_cmos_entries *cmos_entry;
int len = strnlen(name, CMOS_MAX_NAME_LENGTH);
/* cmos entries are located right after the option table */
for ( cmos_entry = (struct cb_cmos_entries*)((unsigned char *)option_table + option_table->header_length);

2
payloads/libpayload/drivers/usb/TODO
View File

@ -14,7 +14,7 @@
handled tds get reactivated as a ring structure
- added as child of the oldest td
- queue header already dropped the td, so no issue there
this setup ensures that:
- the max latency of the device is honored
- the client knows the right order of the data

4
payloads/libpayload/drivers/usb/quirks.c
View File

@ -43,14 +43,14 @@ typedef struct {
usb_quirks_t usb_quirks[] = {
/* Working chips,... remove before next release */
{ 0x3538, 0x0054, USB_QUIRK_NONE, 0 }, // PQI 1GB
{ 0x3538, 0x0054, USB_QUIRK_NONE, 0 }, // PQI 1GB
{ 0x13fd, 0x0841, USB_QUIRK_NONE, 0 }, // Samsung SE-S084
/* Silence the warning for known devices with more
* than one interface
*/
{ 0x1267, 0x0103, USB_QUIRK_NONE, 1 }, // Keyboard Trust KB-1800S
{ 0x0a12, 0x0001, USB_QUIRK_NONE, 1 }, // Bluetooth Allnet ALL1575
{ 0x0a12, 0x0001, USB_QUIRK_NONE, 1 }, // Bluetooth Allnet ALL1575
/* Currently unsupported, possibly interesting devices:
* FTDI serial: device 0x0403:0x6001 is USB 1.10 (class ff)

4
payloads/libpayload/drivers/usb/usb.c
View File

@ -256,12 +256,12 @@ set_address (hci_t *controller, int speed)
}
mdelay (50);
dev->address = adr;
dev->descriptor = get_descriptor (dev, gen_bmRequestType
dev->descriptor = get_descriptor (dev, gen_bmRequestType
(device_to_host, standard_type, dev_recp), 1, 0, 0);
dd = (device_descriptor_t *) dev->descriptor;
printf ("device 0x%04x:0x%04x is USB %x.%x ",
dd->idVendor, dd->idProduct,
dd->idVendor, dd->idProduct,
dd->bcdUSB >> 8, dd->bcdUSB & 0xff);
dev->quirks = usb_quirk_check(dd->idVendor, dd->idProduct);

12
payloads/libpayload/drivers/usb/usbhid.c
View File

@ -86,7 +86,7 @@ char *countries[36][2] = {
{ "Persian (Farsi)", "ir" },
{ "Poland", "pl" },
{ "Portuguese", "pt" },
{ "Russia", "ru" },
{ "Russia", "ru" },
{ "Slovakia", "sl" },
{ "Spanish", "es" },
{ "Swedish", "se" },
@ -241,8 +241,8 @@ typedef union {
#define INITIAL_REPEAT_DELAY 10
#define REPEAT_DELAY 2
static void
usb_hid_process_keyboard_event(usb_hid_keyboard_event_t *current,
static void
usb_hid_process_keyboard_event(usb_hid_keyboard_event_t *current,
usb_hid_keyboard_event_t *previous)
{
int i, keypress = 0, modifiers = 0;
@ -429,16 +429,16 @@ usb_hid_init (usbdev_t *dev)
usb_hid_set_idle(dev, interface, KEYBOARD_REPEAT_MS);
debug (" activating...\n");
HID_INST (dev)->descriptor =
HID_INST (dev)->descriptor =
(hid_descriptor_t *)
get_descriptor(dev, gen_bmRequestType
(device_to_host, standard_type, iface_recp),
(device_to_host, standard_type, iface_recp),
0x21, 0, 0);
countrycode = HID_INST(dev)->descriptor->bCountryCode;
/* 35 countries defined: */
if (countrycode > 35)
countrycode = 0;
printf (" Keyboard has %s layout (country code %02x)\n",
printf (" Keyboard has %s layout (country code %02x)\n",
countries[countrycode][0], countrycode);
/* Set keyboard layout accordingly */

6
payloads/libpayload/drivers/usb/usbmsc.c
View File

@ -295,7 +295,7 @@ readwrite_blocks (usbdev_t *dev, int start, int n, cbw_direction dir, u8 *buf)
}
cb.block = htonl (start);
cb.numblocks = htonw (n);
return execute_command (dev, dir, (u8 *) &cb, sizeof (cb), buf,
n * MSC_INST(dev)->blocksize);
}
@ -310,7 +310,7 @@ request_sense (usbdev_t *dev)
cmdblock6_t cb;
memset (&cb, 0, sizeof (cb));
cb.command = 0x3;
return execute_command (dev, cbw_direction_data_in, (u8 *) &cb,
sizeof (cb), buf, 19);
}
@ -430,7 +430,7 @@ usb_msc_init (usbdev_t *dev)
timeout = 30 * 10; /* SCSI/ATA specs say we have to wait up to 30s. Ugh */
while (test_unit_ready (dev) && --timeout) {
mdelay (100);
if (!(timeout % 10))
if (!(timeout % 10))
printf (".");
}
if (test_unit_ready (dev)) {

2
payloads/libpayload/drivers/video/corebootfb.c
View File

@ -150,7 +150,7 @@ static void corebootfb_putchar(u8 row, u8 col, unsigned int ch)
for(y = 0; y < FONT_HEIGHT; y++) {
for(x = FONT_WIDTH - 1; x >= 0; x--) {
switch (FI->bits_per_pixel) {
case 8: /* Indexed */
dst[(FONT_WIDTH - x) * (FI->bits_per_pixel >> 3)] = (*glyph & (1 << x)) ? fg : bg;

16
payloads/libpayload/include/curses.priv.h
View File

@ -66,24 +66,24 @@ extern "C" {
//// #include <stdlib.h>
//// #include <string.h>
//// #include <sys/types.h>
////
////
//// #if HAVE_UNISTD_H
//// #include <unistd.h>
//// #endif
////
////
//// #if HAVE_SYS_BSDTYPES_H
//// #include <sys/bsdtypes.h> /* needed for ISC */
//// #endif
////
////
//// #if HAVE_LIMITS_H
//// # include <limits.h>
//// #elif HAVE_SYS_PARAM_H
//// # include <sys/param.h>
//// #endif
////
////
//// #include <assert.h>
//// #include <stdio.h>
////
////
//// #include <errno.h>
#ifndef PATH_MAX
@ -101,7 +101,7 @@ extern int errno;
#endif
//// #include <nc_panel.h>
////
////
//// /* Some systems have a broken 'select()', but workable 'poll()'. Use that */
//// #if HAVE_WORKING_POLL
//// #define USE_FUNC_POLL 1
@ -113,10 +113,10 @@ extern int errno;
//// #else
//// #define USE_FUNC_POLL 0
//// #endif
////
////
//// /* include signal.h before curses.h to work-around defect in glibc 2.1.3 */
//// #include <signal.h>
/* Alessandro Rubini's GPM (general-purpose mouse) */
#if HAVE_LIBGPM && HAVE_GPM_H
#define USE_GPM_SUPPORT 1

2
payloads/libpayload/include/getopt.h
View File

@ -74,7 +74,7 @@ extern int optreset;
extern char *suboptarg; /* getsubopt(3) external variable */
#endif
//__END_DECLS
#define MAX_ARGS 16
extern char *string_argv[MAX_ARGS];
extern int string_argc;

2
payloads/libpayload/include/i386/arch/endian.h
View File

@ -37,7 +37,7 @@
#define ntohl(in) ((( (in) & 0xFF) << 24) | (( (in) & 0xFF00) << 8) | \
(( (in) & 0xFF0000) >> 8) | (( (in) & 0xFF000000) >> 24))
#define ntohll(in) (((u64) ntohl( (in) & 0xFFFFFFFF) << 32) | ((u64) ntohl( (in) >> 32)))
#define ntohll(in) (((u64) ntohl( (in) & 0xFFFFFFFF) << 32) | ((u64) ntohl( (in) >> 32)))
#define htonw(in) ntohw(in)
#define htonl(in) ntohl(in)

2
payloads/libpayload/include/libpayload.h
View File

@ -118,7 +118,7 @@ void rtc_read_clock(struct tm *tm);
* @defgroup usb USB functions
* @{
*/
int usb_initialize(void);
int usb_initialize(void);
int usbhid_havechar(void);
int usbhid_getchar(void);
/** @} */

4
payloads/libpayload/libc/args.c
View File

@ -35,8 +35,8 @@
#include <libpayload.h>
#include <getopt.h>
/* We don't want to waste malloc on this, so we live with a small
* fixed size array
/* We don't want to waste malloc on this, so we live with a small
* fixed size array
*/
char *string_argv[MAX_ARGS];
int string_argc;

6
payloads/libpayload/libc/malloc.c
View File

@ -286,10 +286,10 @@ static struct align_region_t *allocate_region(int alignment, int num_elements)
{
struct align_region_t *new_region;
#ifdef CONFIG_DEBUG_MALLOC
printf("%s(old align_regions=%p, alignment=%u, num_elements=%u)\n",
printf("%s(old align_regions=%p, alignment=%u, num_elements=%u)\n",
__func__, align_regions, alignment, num_elements);
#endif
new_region = malloc(sizeof(struct align_region_t));
if (!new_region)
@ -342,7 +342,7 @@ void *memalign(size_t align, size_t size)
memset(align_regions, 0, sizeof(struct align_region_t));
}
struct align_region_t *reg = align_regions;
look_further:
look_further:
while (reg != 0)
{
if ((reg->alignment == align) && (reg->free >= (size + align - 1)/align))

2
payloads/libpayload/libc/memory.c
View File

@ -72,7 +72,7 @@ void *memmove(void *dst, const void *src, size_t n)
offs = n - (n % sizeof(unsigned long));
for (i = (n % sizeof(unsigned long)) - 1; i >= 0; i--)
((unsigned char *)dst)[i + offs] =
((unsigned char *)dst)[i + offs] =
((unsigned char *)src)[i + offs];
for (i = n / sizeof(unsigned long) - 1; i >= 0; i--)

18
payloads/libpayload/libc/printf.c
View File

@ -368,7 +368,7 @@ static int print_number(uint64_t num, int width, int precision, int base,
*
* Print string formatted according to the fmt parameter and variadic arguments.
* Each formatting directive must have the following form:
*
*
* \% [ FLAGS ] [ WIDTH ] [ .PRECISION ] [ TYPE ] CONVERSION
*
* FLAGS:@n
@ -386,7 +386,7 @@ static int print_number(uint64_t num, int width, int precision, int base,
* - "0" Print 0 as padding instead of spaces. Zeroes are placed between
* sign and the rest of the number. This flag is ignored if "-"
* flag is specified.
*
*
* WIDTH:@n
* - Specify the minimal width of a printed argument. If it is bigger,
* width is ignored. If width is specified with a "*" character instead of
@ -403,15 +403,15 @@ static int print_number(uint64_t num, int width, int precision, int base,
* value is then expected in parameters. When both width and precision are
* specified using "*", the first parameter is used for width and the
* second one for precision.
*
*
* TYPE:@n
* - "hh" Signed or unsigned char.@n
* - "h" Signed or unsigned short.@n
* - "" Signed or unsigned int (default value).@n
* - "l" Signed or unsigned long int.@n
* - "ll" Signed or unsigned long long int.@n
*
*
*
*
* CONVERSION:@n
* - % Print percentile character itself.
*
@ -419,16 +419,16 @@ static int print_number(uint64_t num, int width, int precision, int base,
*
* - s Print zero terminated string. If a NULL value is passed as
* value, "(NULL)" is printed instead.
*
*
* - P, p Print value of a pointer. Void * value is expected and it is
* printed in hexadecimal notation with prefix (as with \%#X / \%#x
* for 32-bit or \%#X / \%#x for 64-bit long pointers).
*
* - b Print value as unsigned binary number. Prefix is not printed by
* default. (Nonstandard extension.)
*
*
* - o Print value as unsigned octal number. Prefix is not printed by
* default.
* default.
*
* - d, i Print signed decimal number. There is no difference between d
* and i conversion.
@ -437,7 +437,7 @@ static int print_number(uint64_t num, int width, int precision, int base,
*
* - X, x Print hexadecimal number with upper- or lower-case. Prefix is
* not printed by default.
*
*
* All other characters from fmt except the formatting directives are printed in
* verbatim.
*

2
payloads/libpayload/util/kconfig/confdata.c
View File

@ -19,7 +19,7 @@
#define mkdir(x,y) mkdir(x)
#define UNLINK_IF_NECESSARY(x) unlink(x)
#else
#define UNLINK_IF_NECESSARY(X)
#define UNLINK_IF_NECESSARY(X)
#endif
static void conf_warning(const char *fmt, ...)

86
payloads/libpayload/util/kconfig/lex.zconf.c_shipped
View File

@ -52,7 +52,7 @@
#if __STDC_VERSION__ >= 199901L
/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
* if you want the limit (max/min) macros for int types.
* if you want the limit (max/min) macros for int types.
*/
#ifndef __STDC_LIMIT_MACROS
#define __STDC_LIMIT_MACROS 1
@ -69,7 +69,7 @@ typedef uint32_t flex_uint32_t;
typedef signed char flex_int8_t;
typedef short int flex_int16_t;
typedef int flex_int32_t;
typedef unsigned char flex_uint8_t;
typedef unsigned char flex_uint8_t;
typedef unsigned short int flex_uint16_t;
typedef unsigned int flex_uint32_t;
#endif /* ! C99 */
@ -179,7 +179,7 @@ extern FILE *zconfin, *zconfout;
#define EOB_ACT_LAST_MATCH 2
#define YY_LESS_LINENO(n)
/* Return all but the first "n" matched characters back to the input stream. */
#define yyless(n) \
do \
@ -246,7 +246,7 @@ struct yy_buffer_state
int yy_bs_lineno; /**< The line count. */
int yy_bs_column; /**< The column count. */
/* Whether to try to fill the input buffer when we reach the
* end of it.
*/
@ -866,7 +866,7 @@ extern int zconfwrap (void );
#endif
static void yyunput (int c,char *buf_ptr );
#ifndef yytext_ptr
static void yy_flex_strncpy (char *,yyconst char *,int );
#endif
@ -971,7 +971,7 @@ YY_DECL
register yy_state_type yy_current_state;
register char *yy_cp, *yy_bp;
register int yy_act;
int str = 0;
int ts, i;
@ -1574,7 +1574,7 @@ static int yy_get_next_buffer (void)
{
register yy_state_type yy_current_state;
register char *yy_cp;
yy_current_state = (yy_start);
for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
@ -1593,7 +1593,7 @@ static int yy_get_next_buffer (void)
static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
{
register int yy_is_jam;
yy_current_state = yy_nxt[yy_current_state][1];
yy_is_jam = (yy_current_state <= 0);
@ -1603,7 +1603,7 @@ static int yy_get_next_buffer (void)
static void yyunput (int c, register char * yy_bp )
{
register char *yy_cp;
yy_cp = (yy_c_buf_p);
/* undo effects of setting up zconftext */
@ -1646,7 +1646,7 @@ static int yy_get_next_buffer (void)
{
int c;
*(yy_c_buf_p) = (yy_hold_char);
if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
@ -1713,12 +1713,12 @@ static int yy_get_next_buffer (void)
/** Immediately switch to a different input stream.
* @param input_file A readable stream.
*
*
* @note This function does not reset the start condition to @c INITIAL .
*/
void zconfrestart (FILE * input_file )
{
if ( ! YY_CURRENT_BUFFER ){
zconfensure_buffer_stack ();
YY_CURRENT_BUFFER_LVALUE =
@ -1731,11 +1731,11 @@ static int yy_get_next_buffer (void)
/** Switch to a different input buffer.
* @param new_buffer The new input buffer.
*
*
*/
void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer )
{
/* TODO. We should be able to replace this entire function body
* with
* zconfpop_buffer_state();
@ -1775,13 +1775,13 @@ static void zconf_load_buffer_state (void)
/** Allocate and initialize an input buffer state.
* @param file A readable stream.
* @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
*
*
* @return the allocated buffer state.
*/
YY_BUFFER_STATE zconf_create_buffer (FILE * file, int size )
{
YY_BUFFER_STATE b;
b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) );
if ( ! b )
YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" );
@ -1804,11 +1804,11 @@ static void zconf_load_buffer_state (void)
/** Destroy the buffer.
* @param b a buffer created with zconf_create_buffer()
*
*
*/
void zconf_delete_buffer (YY_BUFFER_STATE b )
{
if ( ! b )
return;
@ -1829,7 +1829,7 @@ static void zconf_load_buffer_state (void)
{
int oerrno = errno;
zconf_flush_buffer(b );
b->yy_input_file = file;
@ -1845,13 +1845,13 @@ static void zconf_load_buffer_state (void)
}
b->yy_is_interactive = 0;
errno = oerrno;
}
/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
* @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
*
*
*/
void zconf_flush_buffer (YY_BUFFER_STATE b )
{
@ -1880,7 +1880,7 @@ static void zconf_load_buffer_state (void)
* the current state. This function will allocate the stack
* if necessary.
* @param new_buffer The new state.
*
*
*/
void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
{
@ -1910,7 +1910,7 @@ void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer )
/** Removes and deletes the top of the stack, if present.
* The next element becomes the new top.
*
*
*/
void zconfpop_buffer_state (void)
{
@ -1934,7 +1934,7 @@ void zconfpop_buffer_state (void)
static void zconfensure_buffer_stack (void)
{
int num_to_alloc;
if (!(yy_buffer_stack)) {
/* First allocation is just for 2 elements, since we don't know if this
@ -1945,9 +1945,9 @@ static void zconfensure_buffer_stack (void)
(yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc
(num_to_alloc * sizeof(struct yy_buffer_state*)
);
memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
(yy_buffer_stack_max) = num_to_alloc;
(yy_buffer_stack_top) = 0;
return;
@ -1973,13 +1973,13 @@ static void zconfensure_buffer_stack (void)
/** Setup the input buffer state to scan directly from a user-specified character buffer.
* @param base the character buffer
* @param size the size in bytes of the character buffer
*
* @return the newly allocated buffer state object.
*
* @return the newly allocated buffer state object.
*/
YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size )
{
YY_BUFFER_STATE b;
if ( size < 2 ||
base[size-2] != YY_END_OF_BUFFER_CHAR ||
base[size-1] != YY_END_OF_BUFFER_CHAR )
@ -2008,14 +2008,14 @@ YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size )
/** Setup the input buffer state to scan a string. The next call to zconflex() will
* scan from a @e copy of @a str.
* @param str a NUL-terminated string to scan
*
*
* @return the newly allocated buffer state object.
* @note If you want to scan bytes that may contain NUL values, then use
* zconf_scan_bytes() instead.
*/
YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
{
return zconf_scan_bytes(yystr,strlen(yystr) );
}
@ -2023,7 +2023,7 @@ YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr )
* scan from a @e copy of @a bytes.
* @param bytes the byte buffer to scan
* @param len the number of bytes in the buffer pointed to by @a bytes.
*
*
* @return the newly allocated buffer state object.
*/
YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len )
@ -2032,7 +2032,7 @@ YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len )
char *buf;
yy_size_t n;
int i;
/* Get memory for full buffer, including space for trailing EOB's. */
n = _yybytes_len + 2;
buf = (char *) zconfalloc(n );
@ -2086,16 +2086,16 @@ static void yy_fatal_error (yyconst char* msg )
/* Accessor methods (get/set functions) to struct members. */
/** Get the current line number.
*
*
*/
int zconfget_lineno (void)
{
return zconflineno;
}
/** Get the input stream.
*
*
*/
FILE *zconfget_in (void)
{
@ -2103,7 +2103,7 @@ FILE *zconfget_in (void)
}
/** Get the output stream.
*
*
*/
FILE *zconfget_out (void)
{
@ -2111,7 +2111,7 @@ FILE *zconfget_out (void)
}
/** Get the length of the current token.
*
*
*/
int zconfget_leng (void)
{
@ -2119,7 +2119,7 @@ int zconfget_leng (void)
}
/** Get the current token.
*
*
*/
char *zconfget_text (void)
@ -2129,18 +2129,18 @@ char *zconfget_text (void)
/** Set the current line number.
* @param line_number
*
*
*/
void zconfset_lineno (int line_number )
{
zconflineno = line_number;
}
/** Set the input stream. This does not discard the current
* input buffer.
* @param in_str A readable stream.
*
*
* @see zconf_switch_to_buffer
*/
void zconfset_in (FILE * in_str )
@ -2194,7 +2194,7 @@ static int yy_init_globals (void)
/* zconflex_destroy is for both reentrant and non-reentrant scanners. */
int zconflex_destroy (void)
{
/* Pop the buffer stack, destroying each element. */
while(YY_CURRENT_BUFFER){
zconf_delete_buffer(YY_CURRENT_BUFFER );

2
payloads/libpayload/util/kconfig/lxdialog/BIG.FAT.WARNING
View File

@ -1,4 +1,4 @@
This is NOT the official version of dialog. This version has been
significantly modified from the original. It is for use by the Linux
kernel configuration script. Please do not bother Savio Lam with
kernel configuration script. Please do not bother Savio Lam with
questions about this program.

2
payloads/libpayload/util/kconfig/lxdialog/menubox.c
View File

@ -26,7 +26,7 @@
*
* *) A bugfix for the Page-Down problem
*
* *) Formerly when I used Page Down and Page Up, the cursor would be set
* *) Formerly when I used Page Down and Page Up, the cursor would be set
* to the first position in the menu box. Now lxdialog is a bit
* smarter and works more like other menu systems (just have a look at
* it).

556
payloads/libpayload/util/kconfig/regex.c
View File

File diff suppressed because it is too large Load Diff

24
payloads/libpayload/util/kconfig/regex.h
View File

@ -42,7 +42,7 @@ typedef unsigned reg_syntax_t;
#define RE_BACKSLASH_ESCAPE_IN_LISTS (1)
/* If this bit is not set, then + and ? are operators, and \+ and \? are
literals.
literals.
If set, then \+ and \? are operators and + and ? are literals. */
#define RE_BK_PLUS_QM (RE_BACKSLASH_ESCAPE_IN_LISTS << 1)
@ -58,7 +58,7 @@ typedef unsigned reg_syntax_t;
^ is an anchor if it is at the beginning of a regular
expression or after an open-group or an alternation operator;
$ is an anchor if it is at the end of a regular expression, or
before a close-group or an alternation operator.
before a close-group or an alternation operator.
This bit could be (re)combined with RE_CONTEXT_INDEP_OPS, because
POSIX draft 11.2 says that * etc. in leading positions is undefined.
@ -69,7 +69,7 @@ typedef unsigned reg_syntax_t;
/* If this bit is set, then special characters are always special
regardless of where they are in the pattern.
If this bit is not set, then special characters are special only in
some contexts; otherwise they are ordinary. Specifically,
some contexts; otherwise they are ordinary. Specifically,
* + ? and intervals are only special when not after the beginning,
open-group, or alternation operator. */
#define RE_CONTEXT_INDEP_OPS (RE_CONTEXT_INDEP_ANCHORS << 1)
@ -91,7 +91,7 @@ typedef unsigned reg_syntax_t;
#define RE_HAT_LISTS_NOT_NEWLINE (RE_DOT_NOT_NULL << 1)
/* If this bit is set, either \{...\} or {...} defines an
interval, depending on RE_NO_BK_BRACES.
interval, depending on RE_NO_BK_BRACES.
If not set, \{, \}, {, and } are literals. */
#define RE_INTERVALS (RE_HAT_LISTS_NOT_NEWLINE << 1)
@ -116,7 +116,7 @@ typedef unsigned reg_syntax_t;
If not set, then \<digit> is a back-reference. */
#define RE_NO_BK_REFS (RE_NO_BK_PARENS << 1)
/* If this bit is set, then | is an alternation operator, and \| is literal.
/* If this bit is set, then | is an alternation operator, and \| is literal.
If not set, then \| is an alternation operator, and | is literal. */
#define RE_NO_BK_VBAR (RE_NO_BK_REFS << 1)
@ -138,7 +138,7 @@ extern reg_syntax_t re_syntax_options;
/* Define combinations of the above bits for the standard possibilities.
(The [[[ comments delimit what gets put into the Texinfo file, so
don't delete them!) */
don't delete them!) */
/* [[[begin syntaxes]]] */
#define RE_SYNTAX_EMACS 0
@ -205,7 +205,7 @@ extern reg_syntax_t re_syntax_options;
#ifdef RE_DUP_MAX
#undef RE_DUP_MAX
#endif
#define RE_DUP_MAX ((1 << 15) - 1)
#define RE_DUP_MAX ((1 << 15) - 1)
/* POSIX `cflags' bits (i.e., information for `regcomp'). */
@ -217,7 +217,7 @@ extern reg_syntax_t re_syntax_options;
/* If this bit is set, then ignore case when matching.
If not set, then case is significant. */
#define REG_ICASE (REG_EXTENDED << 1)
/* If this bit is set, then anchors do not match at newline
characters in the string.
If not set, then anchors do match at newlines. */
@ -256,7 +256,7 @@ typedef enum
REG_EESCAPE, /* Trailing backslash. */
REG_ESUBREG, /* Invalid back reference. */
REG_EBRACK, /* Unmatched left bracket. */
REG_EPAREN, /* Parenthesis imbalance. */
REG_EPAREN, /* Parenthesis imbalance. */
REG_EBRACE, /* Unmatched \{. */
REG_BADBR, /* Invalid contents of \{\}. */
REG_ERANGE, /* Invalid range end. */
@ -287,7 +287,7 @@ struct re_pattern_buffer
unsigned long allocated;
/* Number of bytes actually used in `buffer'. */
unsigned long used;
unsigned long used;
/* Syntax setting with which the pattern was compiled. */
reg_syntax_t syntax;
@ -331,7 +331,7 @@ struct re_pattern_buffer
unsigned no_sub : 1;
/* If set, a beginning-of-line anchor doesn't match at the
beginning of the string. */
beginning of the string. */
unsigned not_bol : 1;
/* Similarly for an end-of-line anchor. */
@ -443,7 +443,7 @@ extern int re_match
/* Relates to `re_match' as `re_search_2' relates to `re_search'. */
extern int re_match_2
extern int re_match_2
_RE_ARGS ((struct re_pattern_buffer *buffer, const char *string1,
int length1, const char *string2, int length2,
int start, struct re_registers *regs, int stop));

2
payloads/libpayload/util/kconfig/zconf.tab.c_shipped
View File

@ -1393,7 +1393,7 @@ yyparse ()
#endif
#endif
{
int yystate;
int yyn;
int yyresult;

6
src/Kconfig
View File

@ -454,8 +454,8 @@ config FALLBACK_BOOTSPLASH_FILE
depends on BOOTSPLASH
default "bootsplash.jpg"
help
The path and filename of the file to use as graphical bootsplash
screen. The file format has to be jpg.
The path and filename of the file to use as graphical bootsplash
screen. The file format has to be jpg.
# TODO: Turn this into a "choice".
config FRAMEBUFFER_VESA_MODE
@ -568,7 +568,7 @@ config X86EMU_DEBUG_TRACE
depends on X86EMU_DEBUG
help
Print _all_ opcodes that are executed by x86emu.
WARNING: This will produce a LOT of output and take a long time.
Note: This option will increase the size of the coreboot image.

90
src/arch/i386/boot/acpi.c
View File

@ -7,7 +7,7 @@
* Copyright (C) 2004 SUSE LINUX AG
* Copyright (C) 2005-2009 coresystems GmbH
*
* ACPI FADT, FACS, and DSDT table support added by
* ACPI FADT, FACS, and DSDT table support added by
* Nick Barker <nick.barker9@btinternet.com>, and those portions
* Copyright (C) 2004 Nick Barker
*
@ -15,12 +15,12 @@
* 2005.9 yhlu add SRAT table generation
*/
/*
/*
* Each system port implementing ACPI has to provide two functions:
*
*
* write_acpi_tables()
* acpi_dump_apics()
*
*
* See Kontron 986LCD-M port for a good example of an ACPI implementation
* in coreboot.
*/
@ -59,10 +59,10 @@ void acpi_add_table(acpi_rsdp_t *rsdp, void *table)
if (rsdp->xsdt_address) {
xsdt = (acpi_xsdt_t *)((u32)rsdp->xsdt_address);
}
/* This should always be MAX_ACPI_TABLES */
entries_num = ARRAY_SIZE(rsdt->entry);
for (i = 0; i < entries_num; i++) {
if(rsdt->entry[i] == 0)
break;
@ -120,10 +120,10 @@ int acpi_create_madt_lapic(acpi_madt_lapic_t *lapic, u8 cpu, u8 apic)
lapic->type=0;
lapic->length=sizeof(acpi_madt_lapic_t);
lapic->flags=1;
lapic->processor_id=cpu;
lapic->apic_id=apic;
return(lapic->length);
}
@ -146,16 +146,16 @@ unsigned long acpi_create_madt_lapics(unsigned long current)
return current;
}
int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,u32 gsi_base)
int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,u32 gsi_base)
{
ioapic->type=1;
ioapic->length=sizeof(acpi_madt_ioapic_t);
ioapic->reserved=0x00;
ioapic->gsi_base=gsi_base;
ioapic->ioapic_id=id;
ioapic->ioapic_addr=addr;
return(ioapic->length);
}
@ -168,7 +168,7 @@ int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
irqoverride->source=source;
irqoverride->gsirq=gsirq;
irqoverride->flags=flags;
return(irqoverride->length);
}
@ -177,29 +177,29 @@ int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu,
{
lapic_nmi->type=4;
lapic_nmi->length=sizeof(acpi_madt_lapic_nmi_t);
lapic_nmi->flags=flags;
lapic_nmi->processor_id=cpu;
lapic_nmi->lint=lint;
return(lapic_nmi->length);
}
void acpi_create_madt(acpi_madt_t *madt)
{
#define LOCAL_APIC_ADDR 0xfee00000ULL
acpi_header_t *header=&(madt->header);
unsigned long current=(unsigned long)madt+sizeof(acpi_madt_t);
memset((void *)madt, 0, sizeof(acpi_madt_t));
/* fill out header fields */
memcpy(header->signature, "APIC", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_madt_t);
header->revision = 1;
@ -207,10 +207,10 @@ void acpi_create_madt(acpi_madt_t *madt)
madt->flags = 0x1; /* PCAT_COMPAT */
current = acpi_fill_madt(current);
/* recalculate length */
header->length= current - (unsigned long)madt;
header->checksum = acpi_checksum((void *)madt, header->length);
}
@ -219,23 +219,23 @@ void acpi_create_mcfg(acpi_mcfg_t *mcfg)
acpi_header_t *header=&(mcfg->header);
unsigned long current=(unsigned long)mcfg+sizeof(acpi_mcfg_t);
memset((void *)mcfg, 0, sizeof(acpi_mcfg_t));
/* fill out header fields */
memcpy(header->signature, "MCFG", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_mcfg_t);
header->revision = 1;
current = acpi_fill_mcfg(current);
/* recalculate length */
header->length= current - (unsigned long)mcfg;
header->checksum = acpi_checksum((void *)mcfg, header->length);
}
@ -294,7 +294,7 @@ int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek,u32 sizek, u32
mem->proximity_domain = node;
mem->flags = flags;
mem->flags = flags;
return(mem->length);
}
@ -356,15 +356,15 @@ void acpi_create_hpet(acpi_hpet_t *hpet)
#define HPET_ADDR 0xfed00000ULL
acpi_header_t *header=&(hpet->header);
acpi_addr_t *addr=&(hpet->addr);
memset((void *)hpet, 0, sizeof(acpi_hpet_t));
/* fill out header fields */
memcpy(header->signature, "HPET", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_hpet_t);
header->revision = 1;
@ -378,12 +378,12 @@ void acpi_create_hpet(acpi_hpet_t *hpet)
hpet->id = 0x102282a0; /* AMD ? */
hpet->number = 0;
hpet->min_tick = 4096;
header->checksum = acpi_checksum((void *)hpet, sizeof(acpi_hpet_t));
}
void acpi_create_facs(acpi_facs_t *facs)
{
memset( (void *)facs,0, sizeof(acpi_facs_t));
memcpy(facs->signature, "FACS", 4);
@ -398,46 +398,46 @@ void acpi_create_facs(acpi_facs_t *facs)
}
void acpi_write_rsdt(acpi_rsdt_t *rsdt)
{
{
acpi_header_t *header=&(rsdt->header);
/* fill out header fields */
memcpy(header->signature, "RSDT", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_rsdt_t);
header->revision = 1;
/* fill out entries */
// entries are filled in later, we come with an empty set.
/* fix checksum */
header->checksum = acpi_checksum((void *)rsdt, sizeof(acpi_rsdt_t));
}
void acpi_write_xsdt(acpi_xsdt_t *xsdt)
{
{
acpi_header_t *header=&(xsdt->header);
/* fill out header fields */
memcpy(header->signature, "XSDT", 4);
memcpy(header->oem_id, OEM_ID, 6);
memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8);
memcpy(header->asl_compiler_id, ASLC, 4);
header->length = sizeof(acpi_xsdt_t);
header->revision = 1;
/* fill out entries */
// entries are filled in later, we come with an empty set.
/* fix checksum */
header->checksum = acpi_checksum((void *)xsdt, sizeof(acpi_xsdt_t));
}
@ -448,7 +448,7 @@ void acpi_write_rsdp(acpi_rsdp_t *rsdp, acpi_rsdt_t *rsdt, acpi_xsdt_t *xsdt)
memcpy(rsdp->oem_id, OEM_ID, 6);
rsdp->length = sizeof(acpi_rsdp_t);
rsdp->rsdt_address = (u32)rsdt;
/* Some OSes expect an XSDT to be present for RSD PTR
/* Some OSes expect an XSDT to be present for RSD PTR
* revisions >= 2. If we don't have an ACPI XSDT, force
* ACPI 1.0 (and thus RSD PTR revision 0)
*/
@ -547,7 +547,7 @@ void *acpi_find_wakeup_vector(void)
printk(BIOS_DEBUG, "RSDP found at %p\n", rsdp);
rsdt = (acpi_rsdt_t *) rsdp->rsdt_address;
end = (char *) rsdt + rsdt->header.length;
printk(BIOS_DEBUG, "RSDT found at %p ends at %p\n", rsdt, end);

12
src/arch/i386/boot/acpigen.c
View File

@ -147,8 +147,8 @@ int acpigen_emit_stream(const char *data, int size)
return size;
}
/* The NameString are bit tricky, each element can be 4 chars, if
less its padded with underscore. Check 18.2.2 and 18.4
/* The NameString are bit tricky, each element can be 4 chars, if
less its padded with underscore. Check 18.2.2 and 18.4
and 5.3 of ACPI specs 3.0 for details
*/
@ -160,14 +160,14 @@ static int acpigen_emit_simple_namestring(const char *name) {
len += acpigen_emit_stream(ud, 4 - i);
break;
} else {
len += acpigen_emit_byte(name[i]);
len += acpigen_emit_byte(name[i]);
}
}
return len;
}
static int acpigen_emit_double_namestring(const char *name, int dotpos) {
int len = 0;
int len = 0;
/* mark dual name prefix */
len += acpigen_emit_byte(0x2e);
len += acpigen_emit_simple_namestring(name);
@ -177,7 +177,7 @@ static int acpigen_emit_double_namestring(const char *name, int dotpos) {
static int acpigen_emit_multi_namestring(const char *name) {
int len = 0, count = 0;
unsigned char *pathlen;
unsigned char *pathlen;
/* mark multi name prefix */
len += acpigen_emit_byte(0x2f);
len += acpigen_emit_byte(0x0);
@ -229,7 +229,7 @@ int acpigen_emit_namestring(const char *namepath) {
if (dotcount == 0) {
len += acpigen_emit_simple_namestring(namepath);
} else if (dotcount == 1) {
} else if (dotcount == 1) {
len += acpigen_emit_double_namestring(namepath, dotpos);
} else {
len += acpigen_emit_multi_namestring(namepath);

12
src/arch/i386/boot/boot.c
View File

@ -63,9 +63,9 @@ int elf_check_arch(Elf_ehdr *ehdr)
return (
((ehdr->e_machine == EM_386) || (ehdr->e_machine == EM_486)) &&
(ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
(ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
(ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
);
}
void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
@ -74,7 +74,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
unsigned long lb_start, lb_size;
unsigned long adjust, adjusted_boot_notes;
elf_boot_notes.hdr.b_checksum =
elf_boot_notes.hdr.b_checksum =
compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
lb_start = (unsigned long)&_ram_seg;
@ -82,7 +82,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
adjust = buffer + size - lb_start;
adjusted_boot_notes = (unsigned long)&elf_boot_notes;
adjusted_boot_notes += adjust;
adjusted_boot_notes += adjust;
printk(BIOS_SPEW, "entry = 0x%08lx\n", (unsigned long)entry);
printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);
@ -91,7 +91,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
printk(BIOS_SPEW, "buffer = 0x%08lx\n", buffer);
printk(BIOS_SPEW, " elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
/* Jump to kernel */
__asm__ __volatile__(
" cld \n\t"
@ -172,7 +172,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
" popl %%edi\n\t"
" popl %%esi\n\t"
::
::
"ri" (lb_start), "ri" (buffer), "ri" (lb_size),
"ri" (entry),
#if CONFIG_MULTIBOOT

46
src/arch/i386/boot/coreboot_table.c
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* Copyright (C) 2003-2004 Eric Biederman
* Copyright (C) 2005-2010 coresystems GmbH
*
@ -71,7 +71,7 @@ static struct lb_record *lb_last_record(struct lb_header *header)
#if 0
static struct lb_record *lb_next_record(struct lb_record *rec)
{
rec = (void *)(((char *)rec) + rec->size);
rec = (void *)(((char *)rec) + rec->size);
return rec;
}
#endif
@ -173,7 +173,7 @@ static struct lb_mainboard *lb_mainboard(struct lb_header *header)
mainboard->tag = LB_TAG_MAINBOARD;
mainboard->size = (sizeof(*mainboard) +
strlen(mainboard_vendor) + 1 +
strlen(mainboard_vendor) + 1 +
strlen(mainboard_part_number) + 1 +
3) & ~3;
@ -203,7 +203,7 @@ static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header)
cmos_checksum->range_end = ( LB_CKS_RANGE_END * 8 ) + 7;
cmos_checksum->location = LB_CKS_LOC * 8;
cmos_checksum->type = CHECKSUM_PCBIOS;
return cmos_checksum;
}
#endif
@ -320,7 +320,7 @@ static void lb_cleanup_memory_ranges(struct lb_memory *mem)
int entries;
int i, j;
entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
/* Sort the lb memory ranges */
for(i = 0; i < entries; i++) {
uint64_t entry_start = unpack_lb64(mem->map[i].start);
@ -357,17 +357,17 @@ static void lb_cleanup_memory_ranges(struct lb_memory *mem)
mem->map[i].size = pack_lb64(end - start);
/* Delete the entry I have merged with */
memmove(&mem->map[i + 1], &mem->map[i + 2],
memmove(&mem->map[i + 1], &mem->map[i + 2],
((entries - i - 2) * sizeof(mem->map[0])));
mem->size -= sizeof(mem->map[0]);
entries -= 1;
/* See if I can merge with the next entry as well */
i -= 1;
i -= 1;
}
}
}
static void lb_remove_memory_range(struct lb_memory *mem,
static void lb_remove_memory_range(struct lb_memory *mem,
uint64_t start, uint64_t size)
{
uint64_t end;
@ -383,16 +383,16 @@ static void lb_remove_memory_range(struct lb_memory *mem,
uint64_t map_end = map_start + unpack_lb64(mem->map[i].size);
if ((start <= map_start) && (end >= map_end)) {
/* Remove the completely covered range */
memmove(&mem->map[i], &mem->map[i + 1],
memmove(&mem->map[i], &mem->map[i + 1],
((entries - i - 1) * sizeof(mem->map[0])));
mem->size -= sizeof(mem->map[0]);
entries -= 1;
/* Since the index will disappear revisit what will appear here */
i -= 1;
i -= 1;
}
else if ((start > map_start) && (end < map_end)) {
/* Split the memory range */
memmove(&mem->map[i + 1], &mem->map[i],
memmove(&mem->map[i + 1], &mem->map[i],
((entries - i) * sizeof(mem->map[0])));
mem->size += sizeof(mem->map[0]);
entries += 1;
@ -430,7 +430,7 @@ static void lb_dump_memory_ranges(struct lb_memory *mem)
int entries;
int i;
entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
printk(BIOS_DEBUG, "coreboot memory table:\n");
for(i = 0; i < entries; i++) {
uint64_t entry_start = unpack_lb64(mem->map[i].start);
@ -448,14 +448,14 @@ static void lb_dump_memory_ranges(struct lb_memory *mem)
default: entry_type="UNKNOWN!"; break;
}
printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n",
printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n",
i, entry_start, entry_start+entry_size-1, entry_type);
}
}
/* Routines to extract part so the coreboot table or
/* Routines to extract part so the coreboot table or
* information from the coreboot table after we have written it.
* Currently get_lb_mem relies on a global we can change the
* implementaiton.
@ -492,8 +492,8 @@ static struct lb_memory *build_lb_mem(struct lb_header *head)
extern uint64_t high_tables_base, high_tables_size;
#endif
unsigned long write_coreboot_table(
unsigned long low_table_start, unsigned long low_table_end,
unsigned long write_coreboot_table(
unsigned long low_table_start, unsigned long low_table_end,
unsigned long rom_table_start, unsigned long rom_table_end)
{
struct lb_header *head;
@ -509,7 +509,7 @@ unsigned long write_coreboot_table(
printk(BIOS_DEBUG, "New low_table_end: 0x%08lx\n", low_table_end);
printk(BIOS_DEBUG, "Now going to write high coreboot table at 0x%08lx\n",
rom_table_end);
head = lb_table_init(rom_table_end);
rom_table_end = (unsigned long)head;
printk(BIOS_DEBUG, "rom_table_end = 0x%08lx\n", rom_table_end);
@ -523,7 +523,7 @@ unsigned long write_coreboot_table(
low_table_end = (unsigned long)head;
}
#endif
printk(BIOS_DEBUG, "Adjust low_table_end from 0x%08lx to ", low_table_end);
low_table_end += 0xfff; // 4K aligned
low_table_end &= ~0xfff;
@ -535,7 +535,7 @@ unsigned long write_coreboot_table(
rom_table_end &= ~0xffff;
printk(BIOS_DEBUG, "0x%08lx \n", rom_table_end);
#if (CONFIG_HAVE_OPTION_TABLE == 1)
#if (CONFIG_HAVE_OPTION_TABLE == 1)
{
struct lb_record *rec_dest = lb_new_record(head);
/* Copy the option config table, it's already a lb_record... */
@ -546,9 +546,9 @@ unsigned long write_coreboot_table(
#endif
/* Record where RAM is located */
mem = build_lb_mem(head);
/* Record the mptable and the the lb_table (This will be adjusted later) */
lb_add_memory_range(mem, LB_MEM_TABLE,
lb_add_memory_range(mem, LB_MEM_TABLE,
low_table_start, low_table_end - low_table_start);
/* Record the pirq table, acpi tables, and maybe the mptable */
@ -588,5 +588,5 @@ unsigned long write_coreboot_table(
/* Remember where my valid memory ranges are */
return lb_table_fini(head, 1);
}

10
src/arch/i386/boot/mpspec.c
View File

@ -31,7 +31,7 @@ void *smp_write_floating_table_physaddr(unsigned long addr, unsigned long mpf_ph
{
struct intel_mp_floating *mf;
void *v;
v = (void *)addr;
mf = v;
mf->mpf_signature[0] = '_';
@ -106,7 +106,7 @@ void smp_write_processors(struct mp_config_table *mc)
unsigned cpu_feature_flags;
struct cpuid_result result;
device_t cpu;
boot_apic_id = lapicid();
apic_version = lapic_read(LAPIC_LVR) & 0xff;
result = cpuid(1);
@ -114,7 +114,7 @@ void smp_write_processors(struct mp_config_table *mc)
cpu_feature_flags = result.edx;
for(cpu = all_devices; cpu; cpu = cpu->next) {
unsigned long cpu_flag;
if ((cpu->path.type != DEVICE_PATH_APIC) ||
if ((cpu->path.type != DEVICE_PATH_APIC) ||
(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
{
continue;
@ -126,7 +126,7 @@ void smp_write_processors(struct mp_config_table *mc)
if (boot_apic_id == cpu->path.apic.apic_id) {
cpu_flag = MPC_CPU_ENABLED | MPC_CPU_BOOTPROCESSOR;
}
smp_write_processor(mc,
smp_write_processor(mc,
cpu->path.apic.apic_id, apic_version,
cpu_flag, cpu_features, cpu_feature_flags
);
@ -146,7 +146,7 @@ void smp_write_bus(struct mp_config_table *mc,
}
void smp_write_ioapic(struct mp_config_table *mc,
unsigned char id, unsigned char ver,
unsigned char id, unsigned char ver,
unsigned long apicaddr)
{
struct mpc_config_ioapic *mpc;

6
src/arch/i386/boot/pirq_routing.c
View File

@ -26,7 +26,7 @@ static void check_pirq_routing_table(struct irq_routing_table *rt)
printk(BIOS_DEBUG, "%s(): Interrupt Routing Table located at %p.\n",
__func__, addr);
sum = rt->checksum - sum;
if (sum != rt->checksum) {
@ -72,9 +72,9 @@ static int verify_copy_pirq_routing_table(unsigned long addr)
}
}
printk(BIOS_INFO, "done\n");
check_pirq_routing_table((struct irq_routing_table *)addr);
return 0;
}
#endif

10
src/arch/i386/boot/tables.c
View File

@ -60,12 +60,12 @@ struct lb_memory *write_tables(void)
printk(BIOS_DEBUG, "High Tables Base is %llx.\n", high_tables_base);
rom_table_start = 0xf0000;
rom_table_start = 0xf0000;
rom_table_end = 0xf0000;
/* Start low addr at 0x500, so we don't run into conflicts with the BDA
* in case our data structures grow beyound 0x400. Only multiboot, GDT
* and the coreboot table use low_tables.
* and the coreboot table use low_tables.
*/
low_table_start = 0;
low_table_end = 0x500;
@ -126,7 +126,7 @@ struct lb_memory *write_tables(void)
/* Write ACPI tables to F segment and high tables area */
/* Ok, this is a bit hacky still, because some day we want to have this
* completely dynamic. But right now we are setting fixed sizes.
* completely dynamic. But right now we are setting fixed sizes.
* It's probably still better than the old high_table_base code because
* now at least we know when we have an overflow in the area.
*
@ -213,7 +213,7 @@ struct lb_memory *write_tables(void)
write_coreboot_table(low_table_start, low_table_end,
rom_table_start, rom_table_end);
}
post_code(0x9e);
#if CONFIG_HAVE_ACPI_RESUME
@ -223,7 +223,7 @@ struct lb_memory *write_tables(void)
*/
cbmem_add(CBMEM_ID_RESUME, 1024 * (1024-64));
#endif
// Remove before sending upstream
cbmem_list();

10
src/arch/i386/boot/wakeup.S
View File

@ -68,11 +68,11 @@ __wakeup:
* protected mode is turned off.
*/
mov $0x30, %ax
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
mov %ax, %ds
mov %ax, %es
mov %ax, %fs
mov %ax, %gs
mov %ax, %ss
/* Turn off protection */
movl %cr0, %eax

6
src/arch/i386/coreboot_ram.ld
View File

@ -59,7 +59,7 @@ SECTIONS
. = ALIGN(4);
_erodata = .;
}
}
/* After the code we place initialized data (typically initialized
* global variables). This gets copied into ram by startup code.
* __data_start and __data_end shows where in ram this should be placed,
@ -113,11 +113,11 @@ SECTIONS
/* Avoid running into 0xa0000-0xfffff */
_bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB");
/* The ram segment. This includes all memory used by the memory
/* The ram segment. This includes all memory used by the memory
* resident copy of coreboot, except the tables that are produced on
* the fly, but including stack and heap.
*/
_ram_seg = _text;
_ram_seg = _text;
_eram_seg = _eheap;
/* CONFIG_RAMTOP is the upper address of cached memory (among other

2
src/arch/i386/include/arch/acpi.h
View File

@ -30,7 +30,7 @@
#if CONFIG_GENERATE_ACPI_TABLES==1
#include <stdint.h>
#define RSDP_SIG "RSD PTR " /* RSDT Pointer signature */
#define ACPI_TABLE_CREATOR "COREBOOT"
#define OEM_ID "CORE "

2
src/arch/i386/include/arch/coreboot_tables.h
View File

@ -8,7 +8,7 @@ unsigned long write_coreboot_table(
unsigned long low_table_start, unsigned long low_table_end,
unsigned long rom_table_start, unsigned long rom_table_end);
void lb_memory_range(struct lb_memory *mem,
void lb_memory_range(struct lb_memory *mem,
uint32_t type, uint64_t start, uint64_t size);
/* Routines to extract part so the coreboot table or information

6
src/arch/i386/include/arch/cpu.h
View File

@ -102,7 +102,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
#define X86_VENDOR_RISE 7
#define X86_VENDOR_TRANSMETA 8
#define X86_VENDOR_NSC 9
#define X86_VENDOR_SIS 10
#define X86_VENDOR_SIS 10
#define X86_VENDOR_UNKNOWN 0xff
#if !defined(__PRE_RAM__)
@ -129,8 +129,8 @@ static inline struct cpu_info *cpu_info(void)
struct cpu_info *ci;
__asm__("andl %%esp,%0; "
"orl %2, %0 "
:"=r" (ci)
: "0" (~(CONFIG_STACK_SIZE - 1)),
:"=r" (ci)
: "0" (~(CONFIG_STACK_SIZE - 1)),
"r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
);
return ci;

12
src/arch/i386/include/arch/io.h
View File

@ -82,7 +82,7 @@ static inline uint32_t inl(uint16_t port)
static inline void outsb(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
"cld ; rep ; outsb "
"cld ; rep ; outsb "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@ -91,7 +91,7 @@ static inline void outsb(uint16_t port, const void *addr, unsigned long count)
static inline void outsw(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
"cld ; rep ; outsw "
"cld ; rep ; outsw "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@ -100,7 +100,7 @@ static inline void outsw(uint16_t port, const void *addr, unsigned long count)
static inline void outsl(uint16_t port, const void *addr, unsigned long count)
{
__asm__ __volatile__ (
"cld ; rep ; outsl "
"cld ; rep ; outsl "
: "=S" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@ -110,7 +110,7 @@ static inline void outsl(uint16_t port, const void *addr, unsigned long count)
static inline void insb(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
"cld ; rep ; insb "
"cld ; rep ; insb "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@ -119,7 +119,7 @@ static inline void insb(uint16_t port, void *addr, unsigned long count)
static inline void insw(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
"cld ; rep ; insw "
"cld ; rep ; insw "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);
@ -128,7 +128,7 @@ static inline void insw(uint16_t port, void *addr, unsigned long count)
static inline void insl(uint16_t port, void *addr, unsigned long count)
{
__asm__ __volatile__ (
"cld ; rep ; insl "
"cld ; rep ; insl "
: "=D" (addr), "=c" (count)
: "d"(port), "0"(addr), "1" (count)
);

2
src/arch/i386/include/arch/pciconf.h
View File

@ -1,7 +1,7 @@
#ifndef PCI_CONF_REG_INDEX
// These are defined in the PCI spec, and hence are theoretically
// inclusive of ANYTHING that uses a PCI bus.
// inclusive of ANYTHING that uses a PCI bus.
#define PCI_CONF_REG_INDEX 0xcf8
#define PCI_CONF_REG_DATA 0xcfc

2
src/arch/i386/include/arch/registers.h
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify

4
src/arch/i386/include/arch/romcc_io.h
View File

@ -85,7 +85,7 @@ static inline int log2f(int value)
typedef unsigned device_t; /* pci and pci_mmio need to have different ways to have dev */
/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G,
/* FIXME: We need to make the coreboot to run at 64bit mode, So when read/write memory above 4G,
* We don't need to set %fs, and %gs anymore
* Before that We need to use %gs, and leave %fs to other RAM access
*/
@ -303,7 +303,7 @@ static inline device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
dev = PCI_DEV(bus, 0, 0);
last = PCI_DEV(bus, 31, 7);
for(; dev <=last; dev += PCI_DEV(0,0,1)) {
unsigned int id;
id = pci_read_config32(dev, 0);

16
src/arch/i386/include/arch/smp/atomic.h
View File

@ -18,29 +18,29 @@ typedef struct { volatile int counter; } atomic_t;
/**
* atomic_read - read atomic variable
* @v: pointer of type atomic_t
*
*
* Atomically reads the value of @v. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
*/
#define atomic_read(v) ((v)->counter)
/**
* atomic_set - set atomic variable
* @v: pointer of type atomic_t
* @i: required value
*
*
* Atomically sets the value of @v to @i. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
*/
#define atomic_set(v,i) (((v)->counter) = (i))
/**
* atomic_inc - increment atomic variable
* @v: pointer of type atomic_t
*
*
* Atomically increments @v by 1. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
*/
static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
{
__asm__ __volatile__(
@ -52,10 +52,10 @@ static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
/**
* atomic_dec - decrement atomic variable
* @v: pointer of type atomic_t
*
*
* Atomically decrements @v by 1. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
*/
static __inline__ __attribute__((always_inline)) void atomic_dec(atomic_t *v)
{
__asm__ __volatile__(

14
src/arch/i386/include/arch/smp/mpspec.h
View File

@ -9,9 +9,9 @@
/*
* This tag identifies where the SMP configuration
* information is.
* information is.
*/
#define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_')
/*
@ -72,7 +72,7 @@ struct mpc_config_processor
unsigned char mpc_cpuflag;
#define MPC_CPU_ENABLED 1 /* Processor is available */
#define MPC_CPU_BOOTPROCESSOR 2 /* Processor is the BP */
unsigned long mpc_cpufeature;
unsigned long mpc_cpufeature;
#define MPC_CPU_STEPPING_MASK 0x0F
#define MPC_CPU_MODEL_MASK 0xF0
#define MPC_CPU_FAMILY_MASK 0xF00
@ -140,7 +140,7 @@ struct mpc_config_lintsrc
unsigned short mpc_irqflag;
unsigned char mpc_srcbusid;
unsigned char mpc_srcbusirq;
unsigned char mpc_destapic;
unsigned char mpc_destapic;
#define MP_APIC_ALL 0xFF
unsigned char mpc_destapiclint;
} __attribute__((packed));
@ -211,7 +211,7 @@ struct mp_exten_compatibility_address_space {
#define ADDRESS_RANGE_SUBTRACT 1
#define ADDRESS_RANGE_ADD 0
unsigned int mpe_range_list;
#define RANGE_LIST_IO_ISA 0
#define RANGE_LIST_IO_ISA 0
/* X100 - X3FF
* X500 - X7FF
* X900 - XBFF
@ -243,7 +243,7 @@ void smp_write_processors(struct mp_config_table *mc);
void smp_write_bus(struct mp_config_table *mc,
unsigned char id, const char *bustype);
void smp_write_ioapic(struct mp_config_table *mc,
unsigned char id, unsigned char ver,
unsigned char id, unsigned char ver,
unsigned long apicaddr);
void smp_write_intsrc(struct mp_config_table *mc,
unsigned char irqtype, unsigned short irqflag,
@ -269,7 +269,7 @@ void smp_write_compatibility_address_space(struct mp_config_table *mc,
unsigned int range_list);
unsigned char smp_compute_checksum(void *v, int len);
void *smp_write_floating_table(unsigned long addr);
void *smp_write_floating_table_physaddr(unsigned long addr,
void *smp_write_floating_table_physaddr(unsigned long addr,
unsigned long mpf_physptr);
unsigned long write_smp_table(unsigned long addr);

2
src/arch/i386/include/bitops.h
View File

@ -15,6 +15,6 @@ static inline unsigned long log2(unsigned long x)
"1:\n\t"
: "=r" (r) : "r" (x));
return r;
}
#endif /* I386_BITOPS_H */

8
src/arch/i386/include/stdint.h
View File

@ -9,7 +9,7 @@
/* Exact integral types */
typedef unsigned char uint8_t;
typedef signed char int8_t;
typedef signed char int8_t;
typedef unsigned short uint16_t;
typedef signed short int16_t;
@ -24,7 +24,7 @@ typedef signed long long int64_t;
/* Small types */
typedef unsigned char uint_least8_t;
typedef signed char int_least8_t;
typedef signed char int_least8_t;
typedef unsigned short uint_least16_t;
typedef signed short int_least16_t;
@ -39,7 +39,7 @@ typedef signed long long int_least64_t;
/* Fast Types */
typedef unsigned char uint_fast8_t;
typedef signed char int_fast8_t;
typedef signed char int_fast8_t;
typedef unsigned int uint_fast16_t;
typedef signed int int_fast16_t;
@ -50,7 +50,7 @@ typedef signed int int_fast32_t;
#if __HAVE_LONG_LONG__
typedef unsigned long long uint_fast64_t;
typedef signed long long int_fast64_t;
#endif
#endif
/* Types for `void *' pointers. */
typedef int intptr_t;

2
src/arch/i386/init/bootblock_prologue.c
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* Copyright (C) 2002 Eric Biederman
*
* This program is free software; you can redistribute it and/or modify

2
src/arch/i386/init/crt0_prologue.inc
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* Copyright (C) 2002 Eric Biederman
*
* This program is free software; you can redistribute it and/or modify

6
src/arch/i386/init/crt0_romcc_epilogue.inc
View File

@ -1,4 +1,4 @@
/*
/*
* Copyright 2002 Eric Biederman
*
* This file is free software; you can redistribute it and/or
@ -11,7 +11,7 @@
__main:
post_code(0x11)
cld /* clear direction flag */
movl %ebp, %esi
movl $ROMSTAGE_STACK, %esp
@ -19,7 +19,7 @@ __main:
pushl %esi
call copy_and_run
.Lhlt:
.Lhlt:
post_code(0xee)
hlt
jmp .Lhlt

2
src/arch/i386/init/ldscript.ld
View File

@ -35,6 +35,6 @@ SECTIONS {
*(.reset)
. = 15 ;
BYTE(0x00);
}
}
}

2
src/arch/i386/lib/cbfs_and_run.c
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* Copyright (C) 2008-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or

24
src/arch/i386/lib/cpu.c
View File

@ -43,7 +43,7 @@ static int have_cpuid_p(void)
* by the fact that they preserve the flags across the division of 5/2.
* PII and PPro exhibit this behavior too, but they have cpuid available.
*/
/*
* Perform the Cyrix 5/2 test. A Cyrix won't change
* the flags, while other 486 chips will.
@ -68,11 +68,11 @@ static inline int test_cyrix_52div(void)
* Detect a NexGen CPU running without BIOS hypercode new enough
* to have CPUID. (Thanks to Herbert Oppmann)
*/
static int deep_magic_nexgen_probe(void)
{
int ret;
__asm__ __volatile__ (
" movw $0x5555, %%ax\n"
" xorw %%dx,%%dx\n"
@ -81,7 +81,7 @@ static int deep_magic_nexgen_probe(void)
" movl $0, %%eax\n"
" jnz 1f\n"
" movl $1, %%eax\n"
"1:\n"
"1:\n"
: "=a" (ret) : : "cx", "dx" );
return ret;
}
@ -95,7 +95,7 @@ static struct {
} x86_vendors[] = {
{ X86_VENDOR_INTEL, "GenuineIntel", },
{ X86_VENDOR_CYRIX, "CyrixInstead", },
{ X86_VENDOR_AMD, "AuthenticAMD", },
{ X86_VENDOR_AMD, "AuthenticAMD", },
{ X86_VENDOR_UMC, "UMC UMC UMC ", },
{ X86_VENDOR_NEXGEN, "NexGenDriven", },
{ X86_VENDOR_CENTAUR, "CentaurHauls", },
@ -124,7 +124,7 @@ static const char *cpu_vendor_name(int vendor)
const char *name;
name = "<invalid cpu vendor>";
if ((vendor < (ARRAY_SIZE(x86_vendor_name))) &&
(x86_vendor_name[vendor] != 0))
(x86_vendor_name[vendor] != 0))
{
name = x86_vendor_name[vendor];
}
@ -173,7 +173,7 @@ static void identify_cpu(struct device *cpu)
vendor_name[10] = (result.ecx >> 16) & 0xff;
vendor_name[11] = (result.ecx >> 24) & 0xff;
vendor_name[12] = '\0';
/* Intel-defined flags: level 0x00000001 */
if (cpuid_level >= 0x00000001) {
cpu->device = cpuid_eax(0x00000001);
@ -200,7 +200,7 @@ static void set_cpu_ops(struct device *cpu)
struct cpu_device_id *id;
for(id = driver->id_table; id->vendor != X86_VENDOR_INVALID; id++) {
if ((cpu->vendor == id->vendor) &&
(cpu->device == id->device))
(cpu->device == id->device))
{
goto found;
}
@ -221,7 +221,7 @@ void cpu_initialize(void)
struct device *cpu;
struct cpu_info *info;
struct cpuinfo_x86 c;
info = cpu_info();
printk(BIOS_INFO, "Initializing CPU #%ld\n", info->index);
@ -240,11 +240,11 @@ void cpu_initialize(void)
printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
c.x86, c.x86_model, c.x86_mask);
/* Lookup the cpu's operations */
set_cpu_ops(cpu);
if(!cpu->ops) {
if(!cpu->ops) {
/* mask out the stepping and try again */
cpu->device -= c.x86_mask;
set_cpu_ops(cpu);
@ -252,7 +252,7 @@ void cpu_initialize(void)
if(!cpu->ops) die("Unknown cpu");
printk(BIOS_DEBUG, "Using generic cpu ops (good)\n");
}
/* Initialize the cpu */
if (cpu->ops && cpu->ops->init) {

12
src/arch/i386/lib/exception.c
View File

@ -4,7 +4,7 @@
#if defined(CONFIG_GDB_STUB) && CONFIG_GDB_STUB == 1
/* BUFMAX defines the maximum number of characters in inbound/outbound buffers.
* At least NUM_REGBYTES*2 are needed for register packets
* At least NUM_REGBYTES*2 are needed for register packets
*/
#define BUFMAX 400
enum regnames {
@ -62,7 +62,7 @@ static uint32_t gdb_stub_registers[NUM_REGS];
#define GDB_SIGSOUND 42 /* Sound completed */
#define GDB_SIGSAK 43 /* Secure attention */
#define GDB_SIGPRIO 44 /* SIGPRIO */
#define GDB_SIG33 45 /* Real-time event 33 */
#define GDB_SIG34 46 /* Real-time event 34 */
#define GDB_SIG35 47 /* Real-time event 35 */
@ -375,7 +375,7 @@ void x86_exception(struct eregs *info)
if (info->vector < ARRAY_SIZE(exception_to_signal)) {
signo = exception_to_signal[info->vector];
}
/* reply to the host that an exception has occured */
out_buffer[0] = 'S';
out_buffer[1] = hexchars[(signo>>4) & 0xf];
@ -412,7 +412,7 @@ void x86_exception(struct eregs *info)
case 'm':
/* mAA..AA,LLLL Read LLLL bytes at address AA..AA */
ptr = &in_buffer[1];
if ( parse_ulong(&ptr, &addr) &&
if ( parse_ulong(&ptr, &addr) &&
(*ptr++ == ',') &&
parse_ulong(&ptr, &length)) {
copy_to_hex(out_buffer, (void *)addr, length);
@ -423,7 +423,7 @@ void x86_exception(struct eregs *info)
case 'M':
/* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
ptr = &in_buffer[1];
if ( parse_ulong(&ptr, &addr) &&
if ( parse_ulong(&ptr, &addr) &&
(*(ptr++) == ',') &&
parse_ulong(&ptr, &length) &&
(*(ptr++) == ':')) {
@ -475,7 +475,7 @@ void x86_exception(struct eregs *info)
put_packet(out_buffer);
}
#else /* !CONFIG_GDB_STUB */
printk(BIOS_EMERG,
printk(BIOS_EMERG,
"Unexpected Exception: %d @ %02x:%08x - Halting\n"
"Code: %d eflags: %08x\n"
"eax: %08x ebx: %08x ecx: %08x edx: %08x\n"

4
src/arch/i386/lib/id.inc
View File

@ -2,9 +2,9 @@
.globl __id_start
__id_start:
vendor:
vendor:
.asciz CONFIG_MAINBOARD_VENDOR
part:
part:
.asciz CONFIG_MAINBOARD_PART_NUMBER
.long __id_end + CONFIG_ID_SECTION_OFFSET - vendor /* Reverse offset to the vendor id */
.long __id_end + CONFIG_ID_SECTION_OFFSET - part /* Reverse offset to the part number */

18
src/arch/i386/lib/ioapic.c
View File

@ -40,13 +40,13 @@ void clear_ioapic(u32 ioapic_base)
u32 low, high;
u32 i, ioapic_interrupts;
printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);
printk(BIOS_DEBUG, "IOAPIC: Clearing IOAPIC at 0x%08x\n", ioapic_base);
/* Read the available number of interrupts */
ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
if (!ioapic_interrupts || ioapic_interrupts == 0xff)
ioapic_interrupts = 24;
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
low = DISABLED;
high = NONE;
@ -70,15 +70,15 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
u32 low, high;
u32 i, ioapic_interrupts;
printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base);
printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at 0x%08x\n", ioapic_base);
printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = %02x\n",
bsp_lapicid);
if (ioapic_id) {
printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
/* Set IOAPIC ID if it has been specified */
io_apic_write(ioapic_base, 0x00,
(io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) |
io_apic_write(ioapic_base, 0x00,
(io_apic_read(ioapic_base, 0x00) & 0xfff0ffff) |
(ioapic_id << 24));
}
@ -86,7 +86,7 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
ioapic_interrupts = (io_apic_read(ioapic_base, 1) >> 16) & 0xff;
if (!ioapic_interrupts || ioapic_interrupts == 0xff)
ioapic_interrupts = 24;
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
// XXX this decision should probably be made elsewhere, and
@ -101,11 +101,11 @@ void setup_ioapic(u32 ioapic_base, u8 ioapic_id)
/* For the Pentium 4 and above APICs deliver their interrupts
* on the front side bus, enable that.
*/
printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
io_apic_write(ioapic_base, 0x03, io_apic_read(ioapic_base, 0x03) | (1 << 0));
#endif
#ifdef IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");
printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");
io_apic_write(ioapic_base, 0x03, 0);
#endif

6
src/arch/i386/lib/pci_ops_auto.c
View File

@ -33,7 +33,7 @@ static int pci_sanity_check(const struct pci_bus_operations *o)
vendor = o->read16(&pbus, bus, devfn, PCI_VENDOR_ID);
if (((class == PCI_CLASS_BRIDGE_HOST) || (class == PCI_CLASS_DISPLAY_VGA)) ||
((vendor == PCI_VENDOR_ID_INTEL) || (vendor == PCI_VENDOR_ID_COMPAQ) ||
(vendor == PCI_VENDOR_ID_MOTOROLA))) {
(vendor == PCI_VENDOR_ID_MOTOROLA))) {
return 1;
}
}
@ -54,8 +54,8 @@ static const struct pci_bus_operations *pci_check_direct(void)
outb(0x01, 0xCFB);
tmp = inl(0xCF8);
outl(0x80000000, 0xCF8);
if ((inl(0xCF8) == 0x80000000) &&
pci_sanity_check(&pci_cf8_conf1))
if ((inl(0xCF8) == 0x80000000) &&
pci_sanity_check(&pci_cf8_conf1))
{
outl(tmp, 0xCF8);
printk(BIOS_DEBUG, "PCI: Using configuration type 1\n");

2
src/arch/i386/lib/printk_init.c
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of

2
src/arch/i386/lib/stages.c
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* Copyright (C) 2010 coresystems GmbH
*
* This program is free software; you can redistribute it and/or

6
src/arch/i386/llshell/console.inc
View File

@ -149,7 +149,7 @@ jmp console0
jz 11f ; \
__CONSOLE_INLINE_TX_AL ; \
jmp 10b ; \
11:
11:
#define CONSOLE_EMERG_TX_CHAR(byte) __CONSOLE_TX_CHAR(byte)
@ -234,7 +234,7 @@ jmp console0
#define CONSOLE_SPEW_INLINE_TX_STRING(string) __CONSOLE_INLINE_TX_STRING(string)
/* uses: esp, ax, dx */
console_tx_al:
console_tx_al:
__CONSOLE_INLINE_TX_AL
RETSP
@ -333,7 +333,7 @@ console_tx_string:
cmp $0, %al
jne 9f
RETSP
9:
9:
__CONSOLE_INLINE_TX_AL
jmp console_tx_string

26
src/arch/i386/llshell/llshell.inc
View File

@ -27,16 +27,16 @@ jmp llshell_out
// Designed to be an interactive shell that operates with zero
// system resources. For example at initial boot.
// to use, jump to label "low_level_shell"
// to use, jump to label "low_level_shell"
// set %esp to the return address for exiting
#define UART_BASEADDR $0x3f8
#define UART_BASEADDR $0x3f8
#define resultreg %esi
#define subroutinereg %edi
#define freqtime $2193 // 1.93 * freq
#define timertime $6000
.equ sys_IOPL, 110
.equ sys_IOPL, 110
// .data
// .text
@ -75,9 +75,9 @@ cmds:
\r\nAll values in hex (0x prefixing ok) \
\r\n"
cr:
cr:
.string "\r\n"
spaces:
spaces:
.string " "
// .globl _start
@ -187,7 +187,7 @@ jz wmemw
cmp $0x00776d6c,%eax
jz wmeml
cmp $0x0000646d,%eax
jz dodmem
jz dodmem
cmp $0x6d656d74,%eax
jz memt // mem test
cmp $0x00727374,%eax
@ -195,7 +195,7 @@ jz rst // reset
cmp $0x00525354,%eax
jz RST
cmp $0x62656570,%eax
jz beep
jz beep
cmp $0x0000646c,%eax
jz dodl // download to mem <loc> <size>
cmp $0x006a6d70,%eax
@ -203,7 +203,7 @@ jz jmpto // jump to location (eax holds return addr)
cmp $0x62617564,%eax
jz baud // change baudrate
cmp $0x00696e74,%eax
jz doint // trigger an interrupt
jz doint // trigger an interrupt
cmp $0x63616c6c,%eax
jz callto // call assumes memory
cmp $0x70757368,%eax
@ -270,7 +270,7 @@ processchar:
cmp $0x3A,%al
jl subnum
cmp $0x47,%al
jl subcaps
jl subcaps
//sublc:
sub $0x57,%al
jmp additupn
@ -370,7 +370,7 @@ jmp displaystring
doneshow1:
dec %cx
cmp $0x0,%cx
jz exitdmem
jz exitdmem
add $0x04,%ebx
jmp dmemloop
exitdmem:
@ -517,7 +517,7 @@ movl $int1a, subroutinereg
jmp readnibbles
int1a:
mov resultreg,%eax
// need to lookup int table?
// need to lookup int table?
// int %eax
jmp readcommand
@ -560,7 +560,7 @@ jmp *subroutinereg
displayhexlinear:
mov resultreg,%eax
xchg %al,%ah
xchg %al,%ah
rol $0x10,%eax
xchg %al,%ah
mov %eax,resultreg
@ -602,7 +602,7 @@ jmp *subroutinereg
displayasciilinear:
mov resultreg,%eax
xchg %al,%ah
xchg %al,%ah
rol $0x10,%eax
xchg %al,%ah
mov %eax,resultreg

14
src/arch/i386/llshell/pci.inc
View File

@ -11,7 +11,7 @@
*
* Notes: This routine is optimized for minimal register usage.
* And the tricks it does cannot scale beyond writing a single byte.
*
*
* What it does is almost simple.
* It preserves %eax (baring special bits) until it is written
* out to the appropriate port. And hides the data byte
@ -52,7 +52,7 @@
* Effects: writes a single byte to pci config space
*
* Notes: This routine is optimized for minimal register usage.
*
*
* What it does is almost simple.
* It preserves %eax (baring special bits) until it is written
* out to the appropriate port. And hides the least significant
@ -91,7 +91,7 @@
* Effects: writes a single byte to pci config space
*
* Notes: This routine is optimized for minimal register usage.
*
*
* What it does is almost simple.
* It preserves %eax (baring special bits) until it is written
* out to the appropriate port. And hides the least significant
@ -118,7 +118,7 @@
/*
* Macro: PCI_READ_CONFIG_BYTE
* Arguments: %eax address to read from (includes bus, device, function, &offset)
@ -129,7 +129,7 @@
* Effects: reads a single byte from pci config space
*
* Notes: This routine is optimized for minimal register usage.
*
*
* What it does is almost simple.
* It preserves %eax (baring special bits) until it is written
* out to the appropriate port. And hides the least significant
@ -165,7 +165,7 @@
* Effects: reads a 2 bytes from pci config space
*
* Notes: This routine is optimized for minimal register usage.
*
*
* What it does is almost simple.
* It preserves %eax (baring special bits) until it is written
* out to the appropriate port. And hides the least significant
@ -201,7 +201,7 @@
* Effects: reads 4 bytes from pci config space
*
* Notes: This routine is optimized for minimal register usage.
*
*
* What it does is almost simple.
* It preserves %eax (baring special bits) until it is written
* out to the appropriate port. And hides the least significant

8
src/arch/i386/llshell/ramtest.inc
View File

@ -6,7 +6,7 @@
jmp rt_skip
#define RAMTEST 1
#if RAMTEST
#if RAMTEST
.section ".rom.data"
rt_test: .string "Testing SDRAM : "
@ -16,7 +16,7 @@ rt_toomany: .string "Too many errors.\r\n"
rt_done: .string "Done.\r\n"
.previous
#endif
ramtest:
#if RAMTEST
mov %eax, %esi
@ -41,7 +41,7 @@ ramtest:
/* Display address being filled */
/* CONSOLE_INFO_TX_HEX32(arg) will overwrite %ebx with arg */
CONSOLE_INFO_TX_HEX32(%ebx)
CONSOLE_INFO_TX_CHAR($'\r')
2:
@ -110,7 +110,7 @@ ramtest:
sub $1, %ecx
jz 5f
jmp 3b
5:
5:
CONSOLE_INFO_TX_STRING($rt_toomany)
post_code(0xf1)
jmp .Lhlt

12
src/boot/hardwaremain.c
View File

@ -45,10 +45,10 @@ it with the version available from LANL.
/**
* @brief Main function of the RAM part of coreboot.
*
* Coreboot is divided into Pre-RAM part and RAM part.
*
* Coreboot is divided into Pre-RAM part and RAM part.
*
* Device Enumeration:
* In the dev_enumerate() phase,
* In the dev_enumerate() phase,
*/
void hardwaremain(int boot_complete);
@ -61,10 +61,10 @@ void hardwaremain(int boot_complete)
/* console_init() MUST PRECEDE ALL printk()! */
console_init();
post_code(0x39);
printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",
printk(BIOS_NOTICE, "coreboot-%s%s %s %s...\n",
coreboot_version, coreboot_extra_version, coreboot_build,
(boot_complete)?"rebooting":"booting");
@ -76,7 +76,7 @@ void hardwaremain(int boot_complete)
}
/* FIXME: Is there a better way to handle this? */
init_timer();
init_timer();
/* Find the devices we don't have hard coded knowledge about. */
dev_enumerate();

2
src/console/Kconfig
View File

@ -98,7 +98,7 @@ config USBDEBUG_DIRECT
It also requires a USB2 controller which supports the EHCI
Debug Port capability. Controllers which are known to work:
* 10b9:5239 ALi Corporation USB 2.0 (USB PCI card)
* 8086:24cd Intel ICH4/ICH4-M
* 8086:24dd Intel ICH5

12
src/console/btext_console.c
View File

@ -62,8 +62,8 @@ u32 boot_text_mapped;
boot_infos_t disp_bi;
#define BTEXT
#define BTDATA
#define BTEXT
#define BTDATA
/* This function will enable the early boot text when doing OF booting. This
@ -100,7 +100,7 @@ btext_setup_display(u32 width, u32 height, u32 depth, u32 pitch,
* changes.
*/
void
void
map_boot_text(void)
{
#if 0
@ -111,9 +111,9 @@ map_boot_text(void)
return;
base = ((unsigned long) bi->dispDeviceBase) & 0xFFFFF000UL;
offset = ((unsigned long) bi->dispDeviceBase) - base;
size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset
size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset
+ bi->dispDeviceRect[0];
bi->logicalDisplayBase = ioremap(base,0x800000 );
bi->logicalDisplayBase = ioremap(base,0x800000 );
if (bi->logicalDisplayBase == 0)
return;
// bi->logicalDisplayBase += offset;
@ -360,7 +360,7 @@ static u32 expand_bits_8[16] BTDATA = {
0x0000ffff,0xff00ffff,0x00ffffff,0xffffffff
#else
#error FIXME: No endianness??
#endif
#endif
};
#if 0
static const u32 expand_bits_16[4] BTDATA = {

8
src/console/console.c
View File

@ -1,5 +1,5 @@
/*
* Bootstrap code for the INTEL
* Bootstrap code for the INTEL
*/
#include <console/console.h>
@ -18,7 +18,7 @@ void console_init(void)
struct console_driver *driver;
if(get_option(&console_loglevel, "debug_level"))
console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
for(driver = console_drivers; driver < econsole_drivers; driver++) {
if (!driver->init)
continue;
@ -38,7 +38,7 @@ void console_tx_flush(void)
{
struct console_driver *driver;
for(driver = console_drivers; driver < econsole_drivers; driver++) {
if (!driver->tx_flush)
if (!driver->tx_flush)
continue;
driver->tx_flush();
}
@ -99,7 +99,7 @@ void __attribute__((noreturn)) die(const char *msg)
void console_init(void)
{
static const char console_test[] =
static const char console_test[] =
"\n\ncoreboot-"
COREBOOT_VERSION
COREBOOT_EXTRA_VERSION

2
src/console/logbuf_console.c
View File

@ -2,7 +2,7 @@
#define LOGBUF_SIZE 1024
// KEEP THIS GLOBAL.
// KEEP THIS GLOBAL.
// I need the address so I can watch it with the ARIUM hardware. RGM.
char logbuf[LOGBUF_SIZE];
int logbuf_offset = 0;

6
src/console/uart8250_console.c
View File

@ -38,17 +38,17 @@ static void ttyS0_init(void)
uart8250_init(CONFIG_TTYS0_BASE, divisor, CONFIG_TTYS0_LCS);
}
static void ttyS0_tx_byte(unsigned char data)
static void ttyS0_tx_byte(unsigned char data)
{
uart8250_tx_byte(CONFIG_TTYS0_BASE, data);
}
static unsigned char ttyS0_rx_byte(void)
static unsigned char ttyS0_rx_byte(void)
{
return uart8250_rx_byte(CONFIG_TTYS0_BASE);
}
static int ttyS0_tst_byte(void)
static int ttyS0_tst_byte(void)
{
return uart8250_can_rx_byte(CONFIG_TTYS0_BASE);
}

2
src/console/vsprintf.c
View File

@ -1,6 +1,6 @@
/*
* This file is part of the coreboot project.
*
*
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or

10
src/console/vtxprintf.c
View File

@ -30,7 +30,7 @@ static int skip_atoi(const char **s)
#define SPECIAL 32 /* 0x */
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
static int number(void (*tx_byte)(unsigned char byte),
static int number(void (*tx_byte)(unsigned char byte),
unsigned long long num, int base, int size, int precision, int type)
{
char c,sign,tmp[66];
@ -112,7 +112,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
int precision; /* min. # of digits for integers; max
number of chars for from string */
int qualifier; /* 'h', 'l', or 'L' for integer fields */
int count;
for (count=0; *fmt ; ++fmt) {
@ -120,7 +120,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
tx_byte(*fmt), count++;
continue;
}
/* process flags */
flags = 0;
repeat:
@ -132,7 +132,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
case '#': flags |= SPECIAL; goto repeat;
case '0': flags |= ZEROPAD; goto repeat;
}
/* get field width */
field_width = -1;
if (is_digit(*fmt))
@ -150,7 +150,7 @@ int vtxprintf(void (*tx_byte)(unsigned char byte), const char *fmt, va_list args
/* get the precision */
precision = -1;
if (*fmt == '.') {
++fmt;
++fmt;
if (is_digit(*fmt))
precision = skip_atoi(&fmt);
else if (*fmt == '*') {

2
src/cpu/amd/dualcore/Makefile.inc
View File

@ -1,2 +1,2 @@
# This is a leaf Makefile, no conditionals. If it is included it will be used.
# This is a leaf Makefile, no conditionals. If it is included it will be used.
obj-y += amd_sibling.o

20
src/cpu/amd/dualcore/amd_sibling.c
View File

@ -27,12 +27,12 @@ static int get_max_siblings(int nodes)
for(nodeid=0; nodeid<nodes; nodeid++){
int j;
dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 3));
j = (pci_read_config32(dev, 0xe8) >> 12) & 3;
j = (pci_read_config32(dev, 0xe8) >> 12) & 3;
if(siblings < j) {
siblings = j;
}
}
return siblings;
}
@ -47,7 +47,7 @@ static void enable_apic_ext_id(int nodes)
dev = dev_find_slot(0, PCI_DEVFN(0x18+nodeid, 0));
val = pci_read_config32(dev, 0x68);
val |= (1<<17)|(1<<18);
pci_write_config32(dev, 0x68, val);
pci_write_config32(dev, 0x68, val);
}
}
@ -70,9 +70,9 @@ unsigned get_apicid_base(unsigned ioapic_num)
siblings = get_max_siblings(nodes);
if(bsp_apic_id > 0) { // io apic could start from 0
return 0;
return 0;
} else if(pci_read_config32(dev, 0x68) & ( (1<<17) | (1<<18)) ) { // enabled ext id but bsp = 0
return 1;
return 1;
}
nb_cfg_54 = read_nb_cfg_54();
@ -100,7 +100,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
//4:10 for two way 8:12 for four way 16:16 for eight way
//Use CONFIG_MAX_PHYSICAL_CPUS instead of nodes for better consistency?
apicid_base = nb_cfg_54 ? (siblings+1) * nodes : 8 * siblings + nodes;
apicid_base = nb_cfg_54 ? (siblings+1) * nodes : 8 * siblings + nodes;
}
else {
@ -112,7 +112,7 @@ unsigned get_apicid_base(unsigned ioapic_num)
printk(BIOS_INFO, "if the IO APIC device doesn't support 256 apic id, \n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\n");
enable_apic_ext_id(nodes);
}
return apicid_base;
}
@ -145,7 +145,7 @@ void amd_sibling_init(device_t cpu)
siblings);
#endif
nb_cfg_54 = read_nb_cfg_54();
nb_cfg_54 = read_nb_cfg_54();
#if 1
id = get_node_core_id(nb_cfg_54); // pre e0 nb_cfg_54 can not be set
@ -159,7 +159,7 @@ void amd_sibling_init(device_t cpu)
return;
}
#endif
/* I am the primary cpu start up my siblings */
for(i = 1; i <= siblings; i++) {
@ -191,7 +191,7 @@ void amd_sibling_init(device_t cpu)
new->path.apic.core_id = i;
#if 1
printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",
printk(BIOS_DEBUG, "CPU: %u has sibling %u\n",
cpu->path.apic.apic_id,
new->path.apic.apic_id);
#endif

Some files were not shown because too many files have changed in this diff Show More