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arch/riscv: In trap handler, don't print SP twice 

The stack pointer (SP) is already printed in print_trap_information.
Don't print it again in handle_misaligned_{load,store}.

Change-Id: I156cf5734a16605decc2280e54e6db3089e094a2
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16996
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Jonathan Neuschäfer 2016-10-12 00:18:02 +02:00 committed by Martin Roth
parent 96aff03dcd
commit 0bc12abc2b
1 changed files with 0 additions and 2 deletions
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2
src/arch/riscv/trap_handler.c
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@ -173,7 +173,6 @@ static uint32_t fetch_instruction(uintptr_t vaddr) {
void handle_misaligned_load(trapframe *tf) {
printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]);
uintptr_t faultingInstructionAddr = tf->epc;
insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr);
printk(BIOS_DEBUG, "Faulting instruction: 0x%x\n", faultingInstruction);
@ -203,7 +202,6 @@ void handle_misaligned_load(trapframe *tf) {
void handle_misaligned_store(trapframe *tf) {
printk(BIOS_DEBUG, "Trapframe ptr: %p\n", tf);
printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]);
uintptr_t faultingInstructionAddr = tf->epc;
insn_t faultingInstruction = fetch_instruction(faultingInstructionAddr);
printk(BIOS_DEBUG, "Faulting instruction: 0x%x\n", faultingInstruction);