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Code Issues Releases Wiki Activity

nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400 

The 100 MHz reference clock seems to be unstable when using high
multipliers. Use the 133 MHz reference clock instead.

Change-Id: I400e4f91776306d54d818fa249d7a845020ac37b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45503
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-09-18 00:52:26 +02:00 committed by Patrick Georgi
parent fe276fb250
commit 0a20872de0
1 changed files with 1 additions and 1 deletions
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2
src/northbridge/intel/sandybridge/raminit_native.c
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@ -218,7 +218,7 @@ static void normalize_tclk(ramctr_timing *ctrl, bool ref_100mhz_support)
{
if (ctrl->tCK <= TCK_1200MHZ) {
ctrl->tCK = TCK_1200MHZ;
ctrl->base_freq = 100;
ctrl->base_freq = 133;
} else if (ctrl->tCK <= TCK_1100MHZ) {
ctrl->tCK = TCK_1100MHZ;
ctrl->base_freq = 100;