Documentation: Add tutorial for me_cleaner on Lenovo devices

Add a tutorial how to use ME cleaner, and give some basic steps to
strip the ME. Update the Lenovo Sandy Bridge documentation that no
issues could be observed on X220 and give an example flash layout.

Tested on Lenovo X220 with stripped ME and found no issues:
commit: cbc5b99ac9

* Displayport
* VGA
* USB
* Bluetooth
* Wifi
* Wifi-kill switch
* libgfxinit
* SATA
* Audio
* SD-card
* Ethernet
* Keyboard
* Fn-Keys
* Display brightness
* ACPI S3 resume
* Battery events
* CPU temperature reporting
* FAN managment
* Stress test stable
  * Youtube videos over Wifi
  * stress -c 2 -m 1 -d 1
  * glxgears

Change-Id: I0b1d04f00b5dbb38cf04333f2b345749b740a375
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39129
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2020-02-26 14:09:04 +01:00 committed by Patrick Georgi
parent 24a974a8cb
commit 0751d7bded
3 changed files with 163 additions and 4 deletions

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@ -33,9 +33,7 @@
usable by coreboot.
* ROM chip size should be set to 8MiB.
```eval_rst
Please also have a look at :doc:`../../flash_tutorial/index`.
```
Please also have a look at the [flashing tutorial]
## Flash layout
There's one 8MiB flash which contains IFD, GBE, ME and BIOS regions.
@ -46,3 +44,26 @@ region. The update is then written into the EC once.
[fl]: flashlayout_Sandy_Bridge.svg
## Reducing Intel Managment Engine firmware size
It is possible to reduce the Intel ME firmware size to free additional
space for the `bios` region. This is usually refered to as *cleaning the ME* or
*stripping the ME*.
After reducing the Intel ME firmware size you must modify the original IFD
and then write a full ROM using an [external programmer].
Have a look at the [me_cleaner] for more information.
Tests on Lenovo X220 showed no issues with a stripped ME firmware.
**Modified flash layout:**
![][fl2]
[fl2]: flashlayout_Sandy_Bridge_stripped_me.svg
The overall size of the `gbe`, `me,` `ifd` region is less than 128KiB, leaving
the remaining space for the `bios` partition.
[me_cleaner]: ../../northbridge/intel/sandybridge/me_cleaner.md
[external programmer]: ../../flash_tutorial/index.md

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@ -0,0 +1,74 @@
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@ -5,7 +5,7 @@ from the ME firmware partition. In this state the ME errors out and doesn't
operate any more.
**Using a 'cleaned' ME partition may lead to issues and its use should be
carefully evaulated.**
carefully evaluated.**
## Observations with 'cleaned' ME
@ -18,3 +18,67 @@ carefully evaulated.**
Always test with unmodified IFD and ME section before reporting bugs to the
coreboot project.
## Tutorial reducing the Intel ME firmware size
By default the cleaned ME firmware will still occupy the same space in
the firmware image. It's possible to change the firmware partition layout
and reclaim the space for the use by coreboot.
With the reduced Intel ME firmware the `ifd`, `gbe` and `me` regions require
less than 128 KiB of space in the ROM, which leaves the remaining for the
`bios` region.
This tutorial will guide you through the steps necessary.
### 1. Obtain a full ROM
You need a full and working ROM with a full Intel ME firmware.
### 2. Running me_cleaner
You need to run the *me_cleaner* on a full ROM, here called `fulldump.rom`:
The full ROM contains:
* IFD
* fully working Intel ME
* GbE (optional)
* BIOS (any firmware)
Running the command will generate two new files:
```console
./util/me_cleaner/me_cleaner.py -D patched_desciptor.bin -M stripped_me.bin fulldump.rom -t -r -S
```
The generated files are:
* a patched IFD called `patched_desciptor.bin`
* stripped Intel ME called `stripped_me.bin`
The patched IFD has the *AltMeDisable* bit set and a modified flash layout.
*Note:* coreboot allows to select `CONFIG_ME_CLEANER` as part of the
build-process, but that doesn't rework the flash layout, it only removes
files from ME and sets the *AltMeDisable*-bit.
### 3. Build coreboot
1. Now include the two new files from the previous step into coreboot's
build system.
2. Make sure to also increase the CBFS size
* 0x7E0000 for a 8MiB ROM
* 0xBE0000 for a 12MiB ROM
* 0xFE0000 for a 16MiB ROM
3. Make sure to **not** enable me_cleaner in Kconfig again as
you have already run it
### 4. Flashing the ROM
As you have modified the layout you need to write the **full ROM** to flash
using an [external programmer].
Make sure to include all partitions into the ROM:
* IFD
* EC (might be unused)
* GbE (might be unused)
* ME
* BIOS
[external programmer]: ../../../flash_tutorial/index.md