/*
 * This file is part of the coreboot project.
 *
 * Copyright 2018 Google LLC
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
 * GNU General Public License for more details.
 */

#ifndef VARIANT_GPIO_H
#define VARIANT_GPIO_H

#include <baseboard/gpio.h>

/* Memory configuration board straps */
#define GPIO_MEM_CONFIG_0	GPP_H19
#define GPIO_MEM_CONFIG_1	GPP_H22
#define GPIO_MEM_CONFIG_2	GPP_F10
#define GPIO_MEM_CONFIG_3	GPP_F3

#endif
