214 lines
6.0 KiB
C
214 lines
6.0 KiB
C
/* Copyright 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* IT83xx development board configuration */
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#include "adc.h"
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#include "adc_chip.h"
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#include "clock.h"
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#include "common.h"
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#include "console.h"
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#include "it83xx_pd.h"
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#include "fan.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "i2c.h"
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#include "intc.h"
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#include "keyboard_scan.h"
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#include "lid_switch.h"
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#include "lpc.h"
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#include "power_button.h"
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#include "pwm.h"
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#include "pwm_chip.h"
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#include "registers.h"
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#include "spi.h"
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#include "switch.h"
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#include "system.h"
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#include "task.h"
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#include "timer.h"
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#include "uart.h"
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#include "usb_pd.h"
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#include "usb_pd_tcpm.h"
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#include "util.h"
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#if IT83XX_PD_EVB
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int board_get_battery_soc(void)
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{
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return 100;
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}
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const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
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{-1, -1, &it83xx_tcpm_drv},
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{-1, -1, &it83xx_tcpm_drv},
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};
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void board_pd_vconn_ctrl(int port, int cc_pin, int enabled)
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{
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int cc1_enabled = 0, cc2_enabled = 0;
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if (cc_pin)
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cc2_enabled = enabled;
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else
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cc1_enabled = enabled;
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if (port) {
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gpio_set_level(GPIO_USBPD_PORTB_CC2_VCONN, cc2_enabled);
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gpio_set_level(GPIO_USBPD_PORTB_CC1_VCONN, cc1_enabled);
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} else {
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gpio_set_level(GPIO_USBPD_PORTA_CC2_VCONN, cc2_enabled);
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gpio_set_level(GPIO_USBPD_PORTA_CC1_VCONN, cc1_enabled);
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}
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}
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void board_pd_vbus_ctrl(int port, int enabled)
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{
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if (port) {
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gpio_set_level(GPIO_USBPD_PORTB_VBUS_INPUT, !enabled);
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gpio_set_level(GPIO_USBPD_PORTB_VBUS_OUTPUT, enabled);
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if (!enabled) {
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gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 1);
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udelay(MSEC);
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}
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gpio_set_level(GPIO_USBPD_PORTB_VBUS_DROP, 0);
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} else {
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gpio_set_level(GPIO_USBPD_PORTA_VBUS_INPUT, !enabled);
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gpio_set_level(GPIO_USBPD_PORTA_VBUS_OUTPUT, enabled);
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if (!enabled) {
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gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 1);
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udelay(MSEC);
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}
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gpio_set_level(GPIO_USBPD_PORTA_VBUS_DROP, 0);
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}
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}
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#else
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/* EC EVB */
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void pd_task(void)
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{
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while (1)
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task_wait_event(-1);
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}
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#endif
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#include "gpio_list.h"
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/*
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* PWM channels. Must be in the exactly same order as in enum pwm_channel.
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* There total three 16 bits clock prescaler registers for all pwm channels,
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* so use the same frequency and prescaler register setting is required if
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* number of pwm channel greater than three.
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*/
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const struct pwm_t pwm_channels[] = {
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{7, 0, 30000, PWM_PRESCALER_C4},
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{0, PWM_CONFIG_DSLEEP, 100, PWM_PRESCALER_C6},
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};
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BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
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const struct fan_conf fan_conf_0 = {
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.flags = FAN_USE_RPM_MODE,
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.ch = 0, /* Use MFT id to control fan */
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.pgood_gpio = -1,
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.enable_gpio = -1,
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};
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const struct fan_rpm fan_rpm_0 = {
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.rpm_min = 1500,
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.rpm_start = 1500,
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.rpm_max = 6500,
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};
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struct fan_t fans[] = {
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{ .conf = &fan_conf_0, .rpm = &fan_rpm_0, },
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};
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BUILD_ASSERT(ARRAY_SIZE(fans) == CONFIG_FANS);
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/*
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* PWM HW channelx binding tachometer channelx for fan control.
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* Four tachometer input pins but two tachometer modules only,
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* so always binding [TACH_CH_TACH0A | TACH_CH_TACH0B] and/or
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* [TACH_CH_TACH1A | TACH_CH_TACH1B]
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*/
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const struct fan_tach_t fan_tach[] = {
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{TACH_CH_NULL, -1, -1, -1},
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{TACH_CH_NULL, -1, -1, -1},
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{TACH_CH_NULL, -1, -1, -1},
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{TACH_CH_NULL, -1, -1, -1},
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{TACH_CH_NULL, -1, -1, -1},
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{TACH_CH_NULL, -1, -1, -1},
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{TACH_CH_NULL, -1, -1, -1},
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{TACH_CH_TACH0A, 2, 50, 30},
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};
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BUILD_ASSERT(ARRAY_SIZE(fan_tach) == PWM_HW_CH_TOTAL);
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/* Wake-up pins for hibernate */
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const enum gpio_signal hibernate_wake_pins[] = {
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GPIO_POWER_BUTTON_L, GPIO_LID_OPEN
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};
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const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
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/* Initialize board. */
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static void board_init(void)
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{
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}
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DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
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/* ADC channels. Must be in the exactly same order as in enum adc_channel. */
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const struct adc_t adc_channels[] = {
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/* Convert to mV (3000mV/1024). */
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{"ADC_VBUSSA", 3000, 1024, 0, CHIP_ADC_CH0}, /* GPI0, ADC0 */
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{"ADC_VBUSSB", 3000, 1024, 0, CHIP_ADC_CH1}, /* GPI1, ADC1 */
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{"ADC_EVB_CH_13", 3000, 1024, 0, CHIP_ADC_CH13}, /* GPL0, ADC13 */
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{"ADC_EVB_CH_14", 3000, 1024, 0, CHIP_ADC_CH14}, /* GPL1, ADC14 */
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{"ADC_EVB_CH_15", 3000, 1024, 0, CHIP_ADC_CH15}, /* GPL2, ADC15 */
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{"ADC_EVB_CH_16", 3000, 1024, 0, CHIP_ADC_CH16}, /* GPL3, ADC16 */
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};
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BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
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/* Keyboard scan setting */
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struct keyboard_scan_config keyscan_config = {
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.output_settle_us = 35,
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.debounce_down_us = 5 * MSEC,
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.debounce_up_us = 40 * MSEC,
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.scan_period_us = 3 * MSEC,
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.min_post_scan_delay_us = 1000,
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.poll_timeout_us = 100 * MSEC,
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.actual_key_mask = {
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0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
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0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */
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},
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};
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/*
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* I2C channels (A, B, and C) are using the same timing registers (00h~07h)
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* at default.
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* In order to set frequency independently for each channels,
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* We use timing registers 09h~0Bh, and the supported frequency will be:
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* 50KHz, 100KHz, 400KHz, or 1MHz.
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* I2C channels (D, E and F) can be set different frequency on different ports.
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* The I2C(D/E/F) frequency depend on the frequency of SMBus Module and
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* the individual prescale register.
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* The frequency of SMBus module is 24MHz on default.
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* The allowed range of I2C(D/E/F) frequency is as following setting.
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* SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1)
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* (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8)
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* Channel D has multi-function and can be used as UART interface.
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* Channel F is reserved for EC debug.
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*/
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/* I2C ports */
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const struct i2c_port_t i2c_ports[] = {
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{"battery", IT83XX_I2C_CH_C, 100, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA},
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{"evb-1", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA},
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{"evb-2", IT83XX_I2C_CH_B, 100, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA},
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{"opt-4", IT83XX_I2C_CH_E, 100, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA},
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};
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const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
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/* SPI devices */
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const struct spi_device_t spi_devices[] = {
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{ CONFIG_SPI_FLASH_PORT, 0, -1},
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};
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const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
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