226 lines
6.0 KiB
C
226 lines
6.0 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Configuration for Scarlet */
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* Optional modules */
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#define CONFIG_ADC
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#undef CONFIG_ADC_WATCHDOG
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#define CONFIG_CHIPSET_RK3399
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#define CONFIG_CMD_ACCELS
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#define CONFIG_CMD_RTC
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#define CONFIG_EMULATED_SYSRQ
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#undef CONFIG_HIBERNATE
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#define CONFIG_HOSTCMD_RTC
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#define CONFIG_I2C
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#define CONFIG_I2C_MASTER
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#define CONFIG_I2C_VIRTUAL_BATTERY
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#define CONFIG_I2C_PASSTHRU_RESTRICTED
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#define CONFIG_LED_COMMON
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#define CONFIG_LOW_POWER_IDLE
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#define CONFIG_LOW_POWER_IDLE_LIMITED
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#define CONFIG_POWER_COMMON
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#define CONFIG_SPI
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#define CONFIG_SPI_MASTER
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#define CONFIG_STM_HWTIMER32
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/* Source RTCCLK from external 32.768kHz source on PC15/OSC32_IN. */
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#define CONFIG_STM32_CLOCK_LSE
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#define CONFIG_SWITCH
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#define CONFIG_WATCHDOG_HELP
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#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands for testing */
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#undef CONFIG_UART_CONSOLE
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#define CONFIG_UART_CONSOLE 1
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#define CONFIG_UART_RX_DMA
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/* Enable a different power-on sequence than the one on gru */
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#undef CONFIG_CHIPSET_POWER_SEQ_VERSION
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#define CONFIG_CHIPSET_POWER_SEQ_VERSION 1
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/* Optional features */
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#define CONFIG_BOARD_PRE_INIT
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#define CONFIG_BOARD_VERSION_CUSTOM
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#define CONFIG_BUTTON_TRIGGERED_RECOVERY
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#define CONFIG_CHARGER_ILIM_PIN_DISABLED
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#define CONFIG_FORCE_CONSOLE_RESUME
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#define CONFIG_HOST_COMMAND_STATUS
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/* Required for FAFT */
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#define CONFIG_CMD_BUTTON
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/* By default, set hcdebug to off */
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#undef CONFIG_HOSTCMD_DEBUG_MODE
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#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF
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#undef CONFIG_LID_SWITCH
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#undef CONFIG_LTO
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#define CONFIG_POWER_BUTTON
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#define CONFIG_POWER_BUTTON_IGNORE_LID
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#define CONFIG_POWER_TRACK_HOST_SLEEP_STATE
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#define CONFIG_SOFTWARE_PANIC
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#define CONFIG_VBOOT_HASH
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#define CONFIG_VOLUME_BUTTONS
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_RT9467
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#define CONFIG_CHARGER_INPUT_CURRENT 512
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#define CONFIG_CHARGER_V2
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#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 2
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#define CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT 2
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#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 15000
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#define CONFIG_CHARGER_PROFILE_OVERRIDE
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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#define CONFIG_CHARGER_OTG
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#define CONFIG_USB_CHARGER
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#define CONFIG_USB_MUX_VIRTUAL
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/* Increase tx buffer size, as we'd like to stream EC log to AP. */
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#undef CONFIG_UART_TX_BUF_SIZE
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#define CONFIG_UART_TX_BUF_SIZE 4096
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/* Motion Sensors */
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#define CONFIG_ACCELGYRO_BMI160
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#define CONFIG_ACCEL_INTERRUPTS
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#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \
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TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL)
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/* Camera VSYNC */
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#define CONFIG_SYNC
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#define CONFIG_SYNC_COMMAND
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#define CONFIG_SYNC_INT_EVENT \
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TASK_EVENT_MOTION_SENSOR_INTERRUPT(VSYNC)
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/* To be able to indicate the device is in tablet mode. */
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#define CONFIG_TABLET_MODE
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#define CONFIG_TABLET_MODE_SWITCH
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/* FIFO size is in power of 2. */
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#define CONFIG_ACCEL_FIFO 256
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#define CONFIG_ACCEL_FIFO_THRES 10
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/* USB PD config */
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#define CONFIG_CHARGE_MANAGER
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_ALT_MODE
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USB_PD_DISCHARGE_GPIO
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_LOGGING
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#define CONFIG_USB_PD_PORT_COUNT 1
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#define CONFIG_USB_PD_TCPM_FUSB302
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#define CONFIG_USB_PD_TCPM_TCPCI
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#define CONFIG_USB_PD_VBUS_DETECT_TCPC
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#define CONFIG_USB_PD_5V_CHARGER_CTRL
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USBC_VCONN
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#define CONFIG_USBC_VCONN_SWAP
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#define CONFIG_USB_PD_COMM_LOCKED
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#define CONFIG_BATTERY_CUT_OFF
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#define CONFIG_BATTERY_PRESENT_CUSTOM
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#define CONFIG_BATTERY_RETRY_NACK
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#define CONFIG_BATTERY_REVIVE_DISCONNECT
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#define CONFIG_BATTERY_MAX17055
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/* Battery parameters for max17055 ModelGauge m5 algorithm. */
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#define BATTERY_MAX17055_RSENSE 5 /* m-ohm */
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#define BATTERY_DESIRED_CHARGING_CURRENT 4000 /* mA */
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#define CONFIG_THROTTLE_AP_ON_BAT_DISCHG_CURRENT
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#define BAT_MAX_DISCHG_CURRENT 5000 /* mA */
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#define CONFIG_THROTTLE_AP_ON_BAT_VOLTAGE
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#define BAT_LOW_VOLTAGE_THRESH 3200 /* mV */
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#define PD_OPERATING_POWER_MW 15000
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#define PD_MAX_POWER_MW ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000)
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#define PD_MAX_CURRENT_MA 3000
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#define PD_MAX_VOLTAGE_MV 12850
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#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
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#define PD_POWER_SUPPLY_TURN_OFF_DELAY 50000 /* us */
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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/* Timer selection */
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#define TIM_CLOCK32 2
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#define TIM_WATCHDOG 7
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/* 48 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 48000000
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/* Optional for testing */
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#undef CONFIG_PECI
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#undef CONFIG_PSTORE
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/* Modules we want to exclude */
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#undef CONFIG_CMD_BATTFAKE
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_HASH
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#undef CONFIG_CMD_I2C_SCAN
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#undef CONFIG_CMD_MD
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#undef CONFIG_CMD_POWERINDEBUG
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#undef CONFIG_CMD_TIMERINFO
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#define CONFIG_TASK_PROFILING
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#define I2C_PORT_CHARGER 0
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#define I2C_PORT_BATTERY 0
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#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY
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#define I2C_PORT_TCPC0 1
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/* Route sbs host requests to virtual battery driver */
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#define VIRTUAL_BATTERY_ADDR_FLAGS 0x0B
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/* Enable Accel over SPI */
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#define CONFIG_SPI_ACCEL_PORT 0 /* The first SPI master port (SPI2) */
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#define CONFIG_KEYBOARD_PROTOCOL_MKBP
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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/* Define the host events which are allowed to wakeup AP in S3. */
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#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \
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(EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON) |\
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EC_HOST_EVENT_MASK(EC_HOST_EVENT_RTC))
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#ifndef __ASSEMBLER__
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enum adc_channel {
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/* Real ADC channels begin here */
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ADC_BOARD_ID = 0,
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ADC_CH_COUNT
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};
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/* power signal definitions */
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enum power_signal {
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PP1250_S3_PWR_GOOD = 0,
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PP900_S0_PWR_GOOD,
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AP_PWR_GOOD,
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SUSPEND_DEASSERTED,
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/* Number of signals */
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POWER_SIGNAL_COUNT,
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};
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/* Motion sensors */
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enum sensor_id {
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LID_ACCEL = 0,
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LID_GYRO,
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VSYNC,
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SENSOR_COUNT,
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};
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#include "gpio_signal.h"
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#include "registers.h"
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void board_reset_pd_mcu(void);
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int board_get_version(void);
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#endif /* !__ASSEMBLER__ */
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#endif /* __CROS_EC_BOARD_H */
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