218 lines
5.9 KiB
C
218 lines
5.9 KiB
C
/* Copyright 2018 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Common code for VARIANT_OCTOPUS_USBC_STANDALONE_TCPCS configuration */
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#include "charge_state.h"
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#include "common.h"
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#include "console.h"
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#include "driver/ppc/nx20p348x.h"
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#include "driver/tcpm/anx7447.h"
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#include "driver/tcpm/ps8xxx.h"
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#include "driver/tcpm/tcpci.h"
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#include "driver/tcpm/tcpm.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "system.h"
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#include "tcpci.h"
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#include "usb_mux.h"
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#include "usbc_ppc.h"
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#include "util.h"
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#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
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#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
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#define USB_PD_PORT_TCPC_0 0
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#define USB_PD_PORT_TCPC_1 1
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/******************************************************************************/
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/* USB-C TPCP Configuration */
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const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
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[USB_PD_PORT_TCPC_0] = {
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#if defined(VARIANT_OCTOPUS_TCPC_0_PS8751)
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.bus_type = EC_BUS_TYPE_I2C,
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.i2c_info = {
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.port = I2C_PORT_TCPC0,
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.addr_flags = PS8751_I2C_ADDR1_FLAGS,
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},
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.drv = &ps8xxx_tcpm_drv,
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#else
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.bus_type = EC_BUS_TYPE_I2C,
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.i2c_info = {
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.port = I2C_PORT_TCPC0,
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.addr_flags = AN7447_TCPC0_I2C_ADDR_FLAGS,
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},
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.drv = &anx7447_tcpm_drv,
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#endif
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},
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[USB_PD_PORT_TCPC_1] = {
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.bus_type = EC_BUS_TYPE_I2C,
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.i2c_info = {
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.port = I2C_PORT_TCPC1,
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.addr_flags = PS8751_I2C_ADDR1_FLAGS,
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},
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.drv = &ps8xxx_tcpm_drv,
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},
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};
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/******************************************************************************/
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/* USB-C MUX Configuration */
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#if defined(VARIANT_OCTOPUS_TCPC_0_PS8751)
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static int ps8751_tune_mux(int port)
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{
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/* Tune USB mux registers for casta's port 0 Rx measurement */
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mux_write(port, PS8XXX_REG_MUX_USB_C2SS_EQ, 0x40);
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return EC_SUCCESS;
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}
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#endif
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struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
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[USB_PD_PORT_TCPC_0] = {
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#if defined(VARIANT_OCTOPUS_TCPC_0_PS8751)
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.driver = &tcpci_tcpm_usb_mux_driver,
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.hpd_update = &ps8xxx_tcpc_update_hpd_status,
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.board_init = &ps8751_tune_mux,
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#else
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.driver = &anx7447_usb_mux_driver,
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.hpd_update = &anx7447_tcpc_update_hpd_status,
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#endif
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},
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[USB_PD_PORT_TCPC_1] = {
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.driver = &tcpci_tcpm_usb_mux_driver,
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.hpd_update = &ps8xxx_tcpc_update_hpd_status,
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}
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};
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/******************************************************************************/
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/* USB-C PPC Configuration */
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struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_COUNT] = {
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[USB_PD_PORT_TCPC_0] = {
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.i2c_port = I2C_PORT_TCPC0,
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.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
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.drv = &nx20p348x_drv,
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},
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[USB_PD_PORT_TCPC_1] = {
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.i2c_port = I2C_PORT_TCPC1,
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.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
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.drv = &nx20p348x_drv,
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},
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};
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unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
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/******************************************************************************/
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/* Power Delivery and charing functions */
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void tcpc_alert_event(enum gpio_signal signal)
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{
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int port = -1;
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switch (signal) {
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case GPIO_USB_C0_MUX_INT_ODL:
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port = 0;
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break;
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case GPIO_USB_C1_MUX_INT_ODL:
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port = 1;
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break;
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default:
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return;
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}
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schedule_deferred_pd_interrupt(port);
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}
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void variant_tcpc_init(void)
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{
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/* Enable PPC interrupts. */
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gpio_enable_interrupt(GPIO_USB_PD_C0_INT_ODL);
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gpio_enable_interrupt(GPIO_USB_PD_C1_INT_ODL);
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/* Enable TCPC interrupts. */
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gpio_enable_interrupt(GPIO_USB_C0_MUX_INT_ODL);
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gpio_enable_interrupt(GPIO_USB_C1_MUX_INT_ODL);
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}
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/* Called after the baseboard_tcpc_init (via +3) */
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DECLARE_HOOK(HOOK_INIT, variant_tcpc_init, HOOK_PRIO_INIT_I2C + 3);
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uint16_t tcpc_get_alert_status(void)
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{
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uint16_t status = 0;
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if (!gpio_get_level(GPIO_USB_C0_MUX_INT_ODL)) {
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#if defined(VARIANT_OCTOPUS_TCPC_0_PS8751)
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if (gpio_get_level(GPIO_USB_C0_PD_RST_ODL))
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#else
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if (!gpio_is_implemented(GPIO_USB_C0_PD_RST) ||
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!gpio_get_level(GPIO_USB_C0_PD_RST))
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#endif
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status |= PD_STATUS_TCPC_ALERT_0;
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}
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if (!gpio_get_level(GPIO_USB_C1_MUX_INT_ODL)) {
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if (gpio_get_level(GPIO_USB_C1_PD_RST_ODL))
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status |= PD_STATUS_TCPC_ALERT_1;
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}
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return status;
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}
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/**
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* Reset all system PD/TCPC MCUs -- currently only called from
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* handle_pending_reboot() in common/power.c just before hard
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* resetting the system. This logic is likely not needed as the
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* PP3300_A rail should be dropped on EC reset.
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*/
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void board_reset_pd_mcu(void)
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{
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#if defined(VARIANT_OCTOPUS_TCPC_0_PS8751)
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/*
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* C0: Assert reset to TCPC0 (PS8751) for required delay if we have a
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* battery
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*/
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if (battery_is_present() == BP_YES) {
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/*
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* TODO(crbug:846412): After refactor, ensure that battery has
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* enough charge to last the reboot as well
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*/
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gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 0);
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msleep(PS8XXX_RESET_DELAY_MS);
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gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 1);
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}
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#else
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/*
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* C0: Assert reset to TCPC0 (ANX7447) for required delay (1ms) only if
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* we have a battery
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*
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* Note: The TEST_R pin is not hooked up to a GPIO on all boards, so
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* verify the name exists before setting it. After the name is
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* introduced for later board firmware, this pin will still be wired
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* to USB2_OTG_ID on the proto boards, which should be set to open
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* drain so it can't be driven high.
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*/
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if (gpio_is_implemented(GPIO_USB_C0_PD_RST) &&
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battery_is_present() == BP_YES) {
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gpio_set_level(GPIO_USB_C0_PD_RST, 1);
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msleep(ANX74XX_RESET_HOLD_MS);
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gpio_set_level(GPIO_USB_C0_PD_RST, 0);
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msleep(ANX74XX_RESET_FINISH_MS);
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}
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#endif
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/*
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* C1: Assert reset to TCPC1 (PS8751) for required delay (1ms) only if
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* we have a battery, otherwise we may brown out the system.
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*/
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if (battery_is_present() == BP_YES) {
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/*
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* TODO(crbug:846412): After refactor, ensure that battery has
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* enough charge to last the reboot as well
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*/
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gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
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msleep(PS8XXX_RESET_DELAY_MS);
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gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
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} else {
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CPRINTS("Skipping C1 TCPC reset because no battery");
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}
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}
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