603 lines
14 KiB
C
603 lines
14 KiB
C
/* Copyright 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Per-test config flags */
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#ifndef __TEST_TEST_CONFIG_H
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#define __TEST_TEST_CONFIG_H
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/* Test config flags only apply for test builds */
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#ifdef TEST_BUILD
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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#endif
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/* Host commands are sorted. */
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#define CONFIG_HOSTCMD_SECTION_SORTED
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/* Don't compile features unless specifically testing for them */
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#undef CONFIG_VBOOT_HASH
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#undef CONFIG_USB_PD_LOGGING
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#ifdef TEST_AES
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#define CONFIG_AES
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#define CONFIG_AES_GCM
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#endif
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#ifdef TEST_BASE32
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#define CONFIG_BASE32
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#endif
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#ifdef TEST_BKLIGHT_LID
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#define CONFIG_BACKLIGHT_LID
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#endif
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#ifdef TEST_BKLIGHT_PASSTHRU
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#define CONFIG_BACKLIGHT_LID
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#define CONFIG_BACKLIGHT_REQ_GPIO GPIO_PCH_BKLTEN
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#endif
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#ifdef TEST_FLASH_LOG
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#define CONFIG_CRC8
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#define CONFIG_FLASH_ERASED_VALUE32 (-1U)
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#define CONFIG_FLASH_LOG
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#define CONFIG_FLASH_LOG_BASE (CONFIG_PROGRAM_MEMORY_BASE + 0x800)
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#define CONFIG_FLASH_LOG_SPACE 0x800
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#define CONFIG_MALLOC
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#endif
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#ifdef TEST_KB_8042
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#define CONFIG_KEYBOARD_PROTOCOL_8042
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#endif
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#ifdef TEST_KB_MKBP
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#define CONFIG_KEYBOARD_PROTOCOL_MKBP
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_KB_SCAN
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#define CONFIG_KEYBOARD_PROTOCOL_MKBP
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_MATH_UTIL
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#define CONFIG_MATH_UTIL
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#endif
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#ifdef TEST_MAG_CAL
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#define CONFIG_MAG_CALIBRATE
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#endif
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#ifdef TEST_STILLNESS_DETECTOR
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#define CONFIG_FPU
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#define CONFIG_ONLINE_CALIB
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#define CONFIG_TEMP_CACHE_STALE_THRES (5 * SECOND)
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_FLOAT
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#define CONFIG_FPU
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#define CONFIG_MAG_CALIBRATE
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#endif
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#ifdef TEST_FP
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#undef CONFIG_FPU
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#define CONFIG_MAG_CALIBRATE
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#endif
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#if defined(TEST_FPSENSOR) || defined(TEST_FPSENSOR_STATE) || \
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defined(TEST_FPSENSOR_CRYPTO)
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#define CONFIG_AES
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#define CONFIG_AES_GCM
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#define CONFIG_ROLLBACK_SECRET_SIZE 32
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#define CONFIG_SHA256
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#endif
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#ifdef TEST_MOTION_SENSE_FIFO
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#define CONFIG_ACCEL_FIFO
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#define CONFIG_ACCEL_FIFO_SIZE 256
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#define CONFIG_ACCEL_FIFO_THRES 10
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#endif
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#ifdef TEST_KASA
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#define CONFIG_FPU
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#define CONFIG_ONLINE_CALIB
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_ACCEL_CAL
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#define CONFIG_FPU
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#define CONFIG_ONLINE_CALIB
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#define CONFIG_ACCEL_CAL_MIN_TEMP 20.0f
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#define CONFIG_ACCEL_CAL_MAX_TEMP 40.0f
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#define CONFIG_ACCEL_CAL_KASA_RADIUS_THRES 0.1f
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#define CONFIG_ACCEL_CAL_NEWTON_RADIUS_THRES 0.1f
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_NEWTON_FIT
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#define CONFIG_FPU
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#define CONFIG_ONLINE_CALIB
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_STILLNESS_DETECTOR
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_ONLINE_CALIBRATION
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#define CONFIG_FPU
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#define CONFIG_ONLINE_CALIB
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#ifdef TEST_ONLINE_CALIBRATION_SPOOF
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#define CONFIG_FPU
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#define CONFIG_ONLINE_CALIB
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#define CONFIG_ONLINE_CALIB_SPOOF_MODE
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#endif /* TEST_ONLINE_CALIBRATION_SPOOF */
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#ifdef TEST_GYRO_CAL
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#define CONFIG_FPU
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#define CONFIG_ONLINE_CALIB
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#define CONFIG_MKBP_EVENT
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#define CONFIG_MKBP_USE_GPIO
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#endif
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#if defined(CONFIG_ONLINE_CALIB) && \
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!defined(CONFIG_TEMP_CACHE_STALE_THRES)
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#define CONFIG_TEMP_CACHE_STALE_THRES (1 * SECOND)
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#endif /* CONFIG_ONLINE_CALIB && !CONFIG_TEMP_CACHE_STALE_THRES */
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#if defined(CONFIG_ONLINE_CALIB) || \
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defined(TEST_BODY_DETECTION) || \
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defined(TEST_MOTION_ANGLE) || \
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defined(TEST_MOTION_ANGLE_TABLET) || \
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defined(TEST_MOTION_LID) || \
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defined(TEST_MOTION_SENSE_FIFO)
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enum sensor_id {
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BASE,
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LID,
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SENSOR_COUNT,
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};
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#define CONFIG_LID_ANGLE
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#define CONFIG_LID_ANGLE_SENSOR_BASE BASE
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#define CONFIG_LID_ANGLE_SENSOR_LID LID
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#define CONFIG_TABLET_MODE
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#define CONFIG_MOTION_FILL_LPC_SENSE_DATA
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#endif
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#if defined(TEST_MOTION_ANGLE)
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#define CONFIG_ACCEL_FORCE_MODE_MASK \
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((1 << CONFIG_LID_ANGLE_SENSOR_BASE) | \
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(1 << CONFIG_LID_ANGLE_SENSOR_LID))
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#define CONFIG_ACCEL_STD_REF_FRAME_OLD
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#endif
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#if defined(TEST_MOTION_ANGLE_TABLET) || \
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defined(TEST_MOTION_LID)
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#define CONFIG_ACCEL_FORCE_MODE_MASK \
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((1 << CONFIG_LID_ANGLE_SENSOR_BASE) | \
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(1 << CONFIG_LID_ANGLE_SENSOR_LID))
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#endif
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#if defined(TEST_BODY_DETECTION)
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#define CONFIG_BODY_DETECTION
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#define CONFIG_BODY_DETECTION_SENSOR BASE
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#endif
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#ifdef TEST_RMA_AUTH
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/* Test server public and private keys */
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#define RMA_KEY_BLOB { \
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0x03, 0xae, 0x2d, 0x2c, 0x06, 0x23, 0xe0, 0x73, \
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0x0d, 0xd3, 0xb7, 0x92, 0xac, 0x54, 0xc5, 0xfd, \
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0x7e, 0x9c, 0xf0, 0xa8, 0xeb, 0x7e, 0x2a, 0xb5, \
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0xdb, 0xf4, 0x79, 0x5f, 0x8a, 0x0f, 0x28, 0x3f, \
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0x10 \
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}
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#define RMA_TEST_SERVER_PRIVATE_KEY { \
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0x47, 0x3b, 0xa5, 0xdb, 0xc4, 0xbb, 0xd6, 0x77, \
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0x20, 0xbd, 0xd8, 0xbd, 0xc8, 0x7a, 0xbb, 0x07, \
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0x03, 0x79, 0xba, 0x7b, 0x52, 0x8c, 0xec, 0xb3, \
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0x4d, 0xaa, 0x69, 0xf5, 0x65, 0xb4, 0x31, 0xad}
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#define RMA_TEST_SERVER_KEY_ID 0x10
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#define CONFIG_BASE32
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#define CONFIG_CURVE25519
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#define CONFIG_RMA_AUTH
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#define CONFIG_RNG
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#define CONFIG_SHA256
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#define CC_EXTENSION CC_COMMAND
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#endif
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#ifdef TEST_CRC
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#define CONFIG_CRC8
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#define CONFIG_SW_CRC
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#endif
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#ifdef TEST_RSA
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#define CONFIG_RSA
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#ifdef CONFIG_RSA_EXPONENT_3
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#error Your board uses RSA exponent 3, please build rsa3 test instead!
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#endif
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#define CONFIG_RWSIG_TYPE_RWSIG
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#endif
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#ifdef TEST_RSA3
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#define CONFIG_RSA
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#define CONFIG_RSA_EXPONENT_3
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#define CONFIG_RWSIG_TYPE_RWSIG
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#endif
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#ifdef TEST_SHA256
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#define CONFIG_SHA256
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#endif
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#ifdef TEST_SHA256_UNROLLED
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#define CONFIG_SHA256
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#define CONFIG_SHA256_UNROLLED
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#endif
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#ifdef TEST_SHMALLOC
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#define CONFIG_MALLOC
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#endif
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#ifdef TEST_SBS_CHARGING_V2
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#define CONFIG_BATTERY
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#define CONFIG_BATTERY_MOCK
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#define CONFIG_BATTERY_SMART
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#define CONFIG_CHARGER
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#define CONFIG_CHARGER_PROFILE_OVERRIDE
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#define CONFIG_CHARGER_INPUT_CURRENT 4032
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#define CONFIG_CHARGER_DISCHARGE_ON_AC
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#define CONFIG_CHARGER_DISCHARGE_ON_AC_CUSTOM
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#define CONFIG_I2C
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#define CONFIG_I2C_CONTROLLER
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int board_discharge_on_ac(int enabled);
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#define I2C_PORT_MASTER 0
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#define I2C_PORT_BATTERY 0
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#define I2C_PORT_CHARGER 0
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#endif
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#ifdef TEST_THERMAL
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#define CONFIG_CHIPSET_CAN_THROTTLE
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#define CONFIG_FANS 1
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#define CONFIG_I2C
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#define CONFIG_I2C_CONTROLLER
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#define CONFIG_TEMP_SENSOR
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#define CONFIG_THROTTLE_AP
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#define CONFIG_THERMISTOR
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#define CONFIG_THERMISTOR_NCP15WB
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#define I2C_PORT_THERMAL 0
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int ncp15wb_calculate_temp(uint16_t adc);
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#endif
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#ifdef TEST_FAN
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#define CONFIG_FANS 1
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#endif
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#ifdef TEST_BUTTON
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#define CONFIG_KEYBOARD_PROTOCOL_8042
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#undef CONFIG_KEYBOARD_VIVALDI
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#define CONFIG_VOLUME_BUTTONS
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#define CONFIG_HOSTCMD_BUTTON
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#endif
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#ifdef TEST_BATTERY_GET_PARAMS_SMART
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#define CONFIG_BATTERY_MOCK
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#define CONFIG_BATTERY_SMART
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#define CONFIG_CHARGER_INPUT_CURRENT 4032
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#define CONFIG_I2C
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#define CONFIG_I2C_CONTROLLER
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#define I2C_PORT_MASTER 0
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#define I2C_PORT_BATTERY 0
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#define I2C_PORT_CHARGER 0
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#endif
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#ifdef TEST_CEC
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#define CONFIG_CEC
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#endif
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#ifdef TEST_LIGHTBAR
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#define CONFIG_I2C
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#define CONFIG_I2C_CONTROLLER
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#define I2C_PORT_LIGHTBAR 0
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#define CONFIG_ALS_LIGHTBAR_DIMMING 0
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#endif
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#ifdef TEST_USB_COMMON
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_TCPMV1
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USB_PD_TCPC
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#define CONFIG_USB_PD_TCPM_STUB
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#define CONFIG_SHA256
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#define CONFIG_SW_CRC
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#endif
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#if defined(TEST_USB_SM_FRAMEWORK_H3) || \
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defined(TEST_USB_SM_FRAMEWORK_H2) || \
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defined(TEST_USB_SM_FRAMEWORK_H1) || \
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defined(TEST_USB_SM_FRAMEWORK_H0)
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#define CONFIG_TEST_SM
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#endif
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#if defined(TEST_USB_PRL_OLD) || defined(TEST_USB_PRL_NOEXTENDED)
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USB_PD_REV30
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#if defined(TEST_USB_PRL_OLD)
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#define CONFIG_USB_PD_EXTENDED_MESSAGES
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#endif
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#define CONFIG_USB_PD_TCPMV2
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#undef CONFIG_USB_PE_SM
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#undef CONFIG_USB_TYPEC_SM
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#undef CONFIG_USB_PD_HOST_CMD
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#define CONFIG_USB_PRL_SM
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#define CONFIG_USB_PD_TCPC
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#define CONFIG_USB_PD_TCPM_STUB
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_SHA256
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#define CONFIG_SW_CRC
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#endif
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#if defined(TEST_USB_PRL)
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USB_PD_REV30
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#define CONFIG_USB_PD_EXTENDED_MESSAGES
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#define CONFIG_USB_PD_TCPMV2
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#undef CONFIG_USB_PE_SM
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#undef CONFIG_USB_TYPEC_SM
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#undef CONFIG_USB_PD_HOST_CMD
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#define CONFIG_USB_PRL_SM
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#define CONFIG_USB_POWER_DELIVERY
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#endif
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#if defined(TEST_USB_PE_DRP_OLD) || defined(TEST_USB_PE_DRP_OLD_NOEXTENDED)
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#define CONFIG_TEST_USB_PE_SM
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USB_PE_SM
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#define CONFIG_USB_PID 0x5036
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#define CONFIG_USB_POWER_DELIVERY
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#undef CONFIG_USB_PRL_SM
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#define CONFIG_USB_PD_REV30
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#if defined(TEST_USB_PE_DRP_OLD)
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#define CONFIG_USB_PD_EXTENDED_MESSAGES
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#endif
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#define CONFIG_USB_PD_TCPMV2
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#define CONFIG_USB_PD_DECODE_SOP
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#undef CONFIG_USB_TYPEC_SM
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#define CONFIG_USBC_VCONN
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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#define CONFIG_USB_PD_DISCHARGE_GPIO
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#undef CONFIG_USB_PD_HOST_CMD
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USBC_SS_MUX
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#endif
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#if defined(TEST_USB_PE_DRP) || defined(TEST_USB_PE_DRP_NOEXTENDED)
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#define CONFIG_TEST_USB_PE_SM
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USB_PE_SM
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#define CONFIG_USB_PID 0x5036
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#define CONFIG_USB_POWER_DELIVERY
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#undef CONFIG_USB_PRL_SM
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#define CONFIG_USB_PD_REV30
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#if defined(TEST_USB_PE_DRP)
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#define CONFIG_USB_PD_EXTENDED_MESSAGES
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#endif
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#define CONFIG_USB_PD_TCPMV2
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#define CONFIG_USB_PD_DECODE_SOP
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#undef CONFIG_USB_TYPEC_SM
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#define CONFIG_USBC_VCONN
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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#define CONFIG_USB_PD_DISCHARGE_GPIO
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#undef CONFIG_USB_PD_HOST_CMD
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USBC_SS_MUX
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#endif
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/* Common TypeC tests defines */
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#if defined(TEST_USB_TYPEC_VPD) || \
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defined(TEST_USB_TYPEC_CTVPD)
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#define CONFIG_USB_PID 0x5036
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#define VPD_HW_VERSION 0x0001
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#define VPD_FW_VERSION 0x0001
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#define USB_BCD_DEVICE 0
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/* Vbus impedance in milliohms */
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#define VPD_VBUS_IMPEDANCE 65
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/* GND impedance in milliohms */
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#define VPD_GND_IMPEDANCE 33
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USB_PD_REV30
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#define CONFIG_USB_PD_EXTENDED_MESSAGES
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#define CONFIG_USB_PD_TCPMV2
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#define CONFIG_USB_PE_SM
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#define CONFIG_USB_PRL_SM
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#define CONFIG_USB_TYPEC_SM
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#define CONFIG_USB_PD_TCPC
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#define CONFIG_USB_PD_TCPM_STUB
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_SW_CRC
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#undef CONFIG_USB_PD_HOST_CMD
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#endif /* Common TypeC test defines */
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#ifdef TEST_USB_TYPEC_VPD
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#define CONFIG_USB_VPD
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#endif
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#ifdef TEST_USB_TYPEC_CTVPD
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#define CONFIG_USB_CTVPD
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#endif
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#ifdef TEST_USB_TYPEC_DRP_ACC_TRYSRC
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#define CONFIG_USB_DRP_ACC_TRYSRC
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_TRY_SRC
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#define CONFIG_USB_TYPEC_SM
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#define CONFIG_USB_PD_TCPMV2
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
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#define CONFIG_USB_PD_VBUS_DETECT_TCPC
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#define CONFIG_USB_POWER_DELIVERY
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#undef CONFIG_USB_PRL_SM
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#undef CONFIG_USB_PE_SM
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#undef CONFIG_USB_PD_HOST_CMD
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#endif
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#ifdef TEST_USB_TCPMV2_TCPCI
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#define CONFIG_USB_DRP_ACC_TRYSRC
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
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#define CONFIG_USB_PD_REV30
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#undef CONFIG_PD_RETRY_COUNT
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#define CONFIG_PD_RETRY_COUNT 2
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#define CONFIG_USB_PD_TCPC_LOW_POWER
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#define CONFIG_USB_PD_TRY_SRC
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#define CONFIG_USB_PD_TCPMV2
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USBC_SS_MUX
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#define CONFIG_USB_PD_VBUS_DETECT_TCPC
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_TEST_USB_PE_SM
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#define CONFIG_USB_PD_ALT_MODE_DFP
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#define CONFIG_USBC_VCONN
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#define CONFIG_USBC_VCONN_SWAP
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#define CONFIG_USB_PID 0x5036
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#define PD_VCONN_SWAP_DELAY 5000 /* us */
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#define CONFIG_USB_PD_TCPM_TCPCI
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#define CONFIG_I2C
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#define CONFIG_I2C_CONTROLLER
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#define I2C_PORT_HOST_TCPC 0
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#define CONFIG_USB_PD_DEBUG_LEVEL 3
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#define CONFIG_USB_PD_EXTENDED_MESSAGES
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#define CONFIG_USB_PD_DECODE_SOP
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#endif
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#ifdef TEST_USB_PD_INT
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_TCPMV1
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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#define CONFIG_USB_PD_TCPC
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#define CONFIG_USB_PD_TCPM_STUB
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#define CONFIG_SHA256
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#define CONFIG_SW_CRC
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#endif
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#if defined(TEST_USB_PD) || defined(TEST_USB_PD_GIVEBACK) || \
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defined(TEST_USB_PD_REV30)
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#define CONFIG_USB_POWER_DELIVERY
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#define CONFIG_USB_PD_TCPMV1
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#define CONFIG_USB_PD_DUAL_ROLE
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#define CONFIG_USB_PD_PORT_MAX_COUNT 2
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|
#define CONFIG_USB_PD_TCPC
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|
#define CONFIG_USB_PD_TCPM_STUB
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#define CONFIG_SHA256
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|
#define CONFIG_SW_CRC
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#ifdef TEST_USB_PD_REV30
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|
#define CONFIG_USB_PD_REV30
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#define CONFIG_USB_PD_EXTENDED_MESSAGES
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#define CONFIG_USB_PID 0x5000
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|
#endif
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#ifdef TEST_USB_PD_GIVEBACK
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#define CONFIG_USB_PD_GIVE_BACK
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|
#endif
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#endif /* TEST_USB_PD || TEST_USB_PD_GIVEBACK || TEST_USB_PD_REV30 */
|
|
|
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#ifdef TEST_USB_PPC
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|
#define CONFIG_USB_PD_PORT_MAX_COUNT 1
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|
#define CONFIG_USB_PD_VBUS_DETECT_PPC
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|
#define CONFIG_USBC_PPC
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|
#define CONFIG_USBC_PPC_POLARITY
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|
#define CONFIG_USBC_PPC_SBU
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|
#define CONFIG_USBC_PPC_VCONN
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|
#endif
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|
|
|
#if defined(TEST_CHARGE_MANAGER) || defined(TEST_CHARGE_MANAGER_DRP_CHARGING)
|
|
#define CONFIG_CHARGE_MANAGER
|
|
#define CONFIG_USB_PD_DUAL_ROLE
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|
#define CONFIG_USB_PD_PORT_MAX_COUNT 2
|
|
#define CONFIG_BATTERY
|
|
#define CONFIG_BATTERY_SMART
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|
#define CONFIG_I2C
|
|
#define CONFIG_I2C_CONTROLLER
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|
#define I2C_PORT_BATTERY 0
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|
#endif /* TEST_CHARGE_MANAGER_* */
|
|
|
|
#ifdef TEST_CHARGE_MANAGER_DRP_CHARGING
|
|
#define CONFIG_CHARGE_MANAGER_DRP_CHARGING
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|
#else
|
|
#undef CONFIG_CHARGE_MANAGER_DRP_CHARGING
|
|
#endif /* TEST_CHARGE_MANAGER_DRP_CHARGING */
|
|
|
|
#ifdef TEST_CHARGE_RAMP
|
|
#define CONFIG_CHARGE_RAMP_SW
|
|
#define CONFIG_USB_PD_PORT_MAX_COUNT 2
|
|
#endif
|
|
|
|
#ifdef TEST_RTC
|
|
#define CONFIG_HOSTCMD_RTC
|
|
#endif
|
|
|
|
#ifdef TEST_VBOOT
|
|
#define CONFIG_RWSIG
|
|
#define CONFIG_SHA256
|
|
#define CONFIG_RSA
|
|
#define CONFIG_RWSIG_TYPE_RWSIG
|
|
#define CONFIG_RW_B
|
|
#define CONFIG_RW_B_MEM_OFF CONFIG_RO_MEM_OFF
|
|
#undef CONFIG_RO_SIZE
|
|
#define CONFIG_RO_SIZE (CONFIG_FLASH_SIZE / 4)
|
|
#undef CONFIG_RW_SIZE
|
|
#define CONFIG_RW_SIZE CONFIG_RO_SIZE
|
|
#define CONFIG_RW_A_STORAGE_OFF CONFIG_RW_STORAGE_OFF
|
|
#define CONFIG_RW_B_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \
|
|
CONFIG_RW_SIZE)
|
|
#define CONFIG_RW_A_SIGN_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \
|
|
CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE)
|
|
#define CONFIG_RW_B_SIGN_STORAGE_OFF (CONFIG_RW_B_STORAGE_OFF + \
|
|
CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE)
|
|
#endif
|
|
|
|
#ifdef TEST_X25519
|
|
#define CONFIG_CURVE25519
|
|
#endif /* TEST_X25519 */
|
|
|
|
#ifdef TEST_I2C_BITBANG
|
|
#define CONFIG_I2C
|
|
#define CONFIG_I2C_CONTROLLER
|
|
#define CONFIG_I2C_BITBANG
|
|
#define I2C_BITBANG_PORT_COUNT 1
|
|
#endif
|
|
|
|
#endif /* TEST_BUILD */
|
|
#endif /* __TEST_TEST_CONFIG_H */
|