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it83xx: Add support for interrupt and 1.8v selection of GPJ7 

BUG=b:162805450
BRANCH=none
TEST=not yet

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ie1525b8a0f67a4700649163b536d09bef9a9671a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335518
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
This commit is contained in:
Dino Li 2020-08-04 15:11:27 +08:00 committed by Commit Bot
parent 9a96e4e5c6
commit ff9651857b
3 changed files with 7 additions and 2 deletions
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4
chip/it83xx/gpio.c
View File

@ -185,6 +185,7 @@ static const struct {
[IT83XX_IRQ_WKO132] = {GPIO_J, BIT(4), 14, BIT(4)},
[IT83XX_IRQ_WKO133] = {GPIO_J, BIT(5), 14, BIT(5)},
[IT83XX_IRQ_WKO134] = {GPIO_J, BIT(6), 14, BIT(6)},
[IT83XX_IRQ_WKO135] = {GPIO_J, BIT(7), 14, BIT(7)},
[IT83XX_IRQ_WKO136] = {GPIO_L, BIT(0), 15, BIT(0)},
[IT83XX_IRQ_WKO137] = {GPIO_L, BIT(1), 15, BIT(1)},
[IT83XX_IRQ_WKO138] = {GPIO_L, BIT(2), 15, BIT(2)},
@ -320,7 +321,8 @@ static const struct gpio_1p8v_t gpio_1p8v_sel[GPIO_PORT_COUNT][8] = {
[3] = {&IT83XX_GPIO_GRC23, BIT(3)},
[4] = {&IT83XX_GPIO_GCR27, BIT(0)},
[5] = {&IT83XX_GPIO_GCR27, BIT(1)},
[6] = {&IT83XX_GPIO_GCR27, BIT(2)} },
[6] = {&IT83XX_GPIO_GCR27, BIT(2)},
[7] = {&IT83XX_GPIO_GCR33, BIT(2)} },
[GPIO_K] = { [0] = {&IT83XX_GPIO_GCR26, BIT(0)},
[1] = {&IT83XX_GPIO_GCR26, BIT(1)},
[2] = {&IT83XX_GPIO_GCR26, BIT(2)},

2
chip/it83xx/irq.c
View File

@ -36,7 +36,7 @@ static const struct {
IRQ_GROUP(13, { 2, 2, 2, 2, 2, 2, 2, 2}),
IRQ_GROUP(14, { 2, 2, 2, 2, 2, 2, 2, 2}),
IRQ_GROUP(15, { 2, 2, 2, 2, 2, 2, 2, 2}),
IRQ_GROUP(16, { 2, 2, 2, 2, 2, 2, 2, -1}),
IRQ_GROUP(16, { 2, 2, 2, 2, 2, 2, 2, 2}),
IRQ_GROUP(17, { 2, 2, 2, 2, 2, 2, 2, 2}),
IRQ_GROUP(18, { 2, 2, 2, 2, -1, 4, 4, 7}),
IRQ_GROUP(19, { 6, 6, 12, 3, 3, 3, 3, 3}),

3
chip/it83xx/registers.h
View File

@ -164,6 +164,7 @@
#define IT83XX_IRQ_WKO132 132
#define IT83XX_IRQ_WKO133 133
#define IT83XX_IRQ_WKO134 134
#define IT83XX_IRQ_WKO135 135
/* Group 17 */
#define IT83XX_IRQ_WKO136 136
#define IT83XX_IRQ_WKO137 137
@ -407,6 +408,7 @@
#define IT83XX_CPU_INT_IRQ_132 2
#define IT83XX_CPU_INT_IRQ_133 2
#define IT83XX_CPU_INT_IRQ_134 2
#define IT83XX_CPU_INT_IRQ_135 2
#define IT83XX_CPU_INT_IRQ_136 2
#define IT83XX_CPU_INT_IRQ_137 2
#define IT83XX_CPU_INT_IRQ_138 2
@ -774,6 +776,7 @@
#define IT83XX_GPIO_GCR30 REG8(IT83XX_GPIO_BASE+0xED)
#define IT83XX_GPIO_GCR31 REG8(IT83XX_GPIO_BASE+0xD5)
#define IT83XX_GPIO_GCR32 REG8(IT83XX_GPIO_BASE+0xD6)
#define IT83XX_GPIO_GCR33 REG8(IT83XX_GPIO_BASE+0xD7)
#define IT83XX_VBATPC_BGPOPSCR REG8(IT83XX_GPIO2_BASE+0xF0)
#define IT83XX_VBATPC_XLPIER REG8(IT83XX_GPIO2_BASE+0xF5)