test: Add tests for flash option bytes and control register
BRANCH=none BUG=b:155897971 TEST=On dragonclaw v0.2 with Segger J-Trace and servo micro attached: ./test/run_device_tests.py -t flash_physical => PASS Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I9a71cdcc2947d13cf2f1d44fdbd57cf20ed6402f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2220737 Commit-Queue: Yicheng Li <yichengli@chromium.org> Tested-by: Yicheng Li <yichengli@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
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@ -66,6 +66,9 @@ void lock_flash_option_bytes(void);
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/**
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* Disable the flash option bytes register.
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*
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* This function expects that bus faults have not already been ignored when
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* called.
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*
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* Once this function is called any attempt at accessing the flash option
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* bytes register will generate a bus fault until the next reset.
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*
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@ -76,6 +79,9 @@ void disable_flash_option_bytes(void);
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/**
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* Disable the flash control register.
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*
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* This function expects that bus faults have not already been ignored when
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* called.
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*
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* Once this function is called any attempt at accessing the flash control
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* register will generate a bus fault until the next reset.
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*
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@ -3,7 +3,9 @@
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* found in the LICENSE file.
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*/
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#include "chip/stm32/flash-f.h"
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#include "flash.h"
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#include "panic.h"
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#include "test_util.h"
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struct flash_info {
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@ -28,6 +30,87 @@ struct flash_info flash_info = {
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#error "Flash info not defined for this chip. Please add it."
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#endif
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test_static int test_lock_option_bytes(void)
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{
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TEST_EQ(flash_option_bytes_locked(), true, "%d");
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unlock_flash_option_bytes();
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TEST_EQ(flash_option_bytes_locked(), false, "%d");
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lock_flash_option_bytes();
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TEST_EQ(flash_option_bytes_locked(), true, "%d");
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unlock_flash_option_bytes();
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TEST_EQ(flash_option_bytes_locked(), false, "%d");
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return EC_SUCCESS;
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}
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test_static int test_disable_option_bytes(void)
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{
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TEST_EQ(flash_option_bytes_locked(), false, "%d");
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disable_flash_option_bytes();
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TEST_EQ(flash_option_bytes_locked(), true, "%d");
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/* Since we've disabled the option bytes we'll get a bus fault. */
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ignore_bus_fault(1);
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unlock_flash_option_bytes();
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ignore_bus_fault(0);
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/* Option bytes should still be locked. */
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TEST_EQ(flash_option_bytes_locked(), true, "%d");
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return EC_SUCCESS;
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}
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test_static int test_lock_flash_control_register(void)
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{
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TEST_EQ(flash_control_register_locked(), true, "%d");
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unlock_flash_control_register();
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TEST_EQ(flash_control_register_locked(), false, "%d");
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lock_flash_control_register();
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TEST_EQ(flash_control_register_locked(), true, "%d");
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unlock_flash_control_register();
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TEST_EQ(flash_control_register_locked(), false, "%d");
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return EC_SUCCESS;
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}
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test_static int test_disable_flash_control_register(void)
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{
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TEST_EQ(flash_control_register_locked(), false, "%d");
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disable_flash_control_register();
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TEST_EQ(flash_control_register_locked(), true, "%d");
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/* Since we've disabled the option bytes we'll get a bus fault. */
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ignore_bus_fault(1);
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unlock_flash_control_register();
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ignore_bus_fault(0);
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/* Control register should still be locked. */
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TEST_EQ(flash_control_register_locked(), true, "%d");
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return EC_SUCCESS;
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}
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test_static int test_flash_config(void)
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{
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TEST_EQ(PHYSICAL_BANKS, flash_info.num_flash_banks, "%d");
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@ -40,5 +123,15 @@ void run_test(int argc, char **argv)
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{
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ccprintf("Running flash physical test\n");
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RUN_TEST(test_flash_config);
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/*
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* TODO(b/157692395): These should be implemented for the STM32H743 as
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* well.
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*/
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#if defined(CHIP_VARIANT_STM32F412)
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RUN_TEST(test_lock_option_bytes);
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RUN_TEST(test_disable_option_bytes);
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RUN_TEST(test_lock_flash_control_register);
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RUN_TEST(test_disable_flash_control_register);
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#endif
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test_print_result();
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}
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