Merge remote-tracking branch cros/main into firmware-rex-15709.B-main
Generated by: util/update_release_branch.py -r --zephyr --board rex firmware-
rex-15709.B-main
Relevant changes:
git log --oneline 7093cb9984..abaacea8ca -- zephyr/program/rex
util/getversion.sh
85d7598eda
Prepend *sleep() family functions with crec_
BUG=b:321092852
TEST=`emerge-[rex,ovis] chromeos-zephyr`
Cq-Depend: chromium:5454891
Force-Relevant-Builds: all
Change-Id: I468c5dae3b6956e0b05c46671a461c3322a18c98
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/5454851
Commit-Queue: caveh jalali <caveh@chromium.org>
Tested-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
This commit is contained in:
commit
9d770e72f7
|
@ -2,7 +2,7 @@
|
|||
# Use of this source code is governed by a BSD-style license that can be
|
||||
# found in the LICENSE file.
|
||||
|
||||
image: jbettis/ubuntu-23jan24
|
||||
image: jbettis/ubuntu-05apr24
|
||||
|
||||
# You can update that image using this repo:
|
||||
# https://gitlab.com/zephyr-ec/gitlab-ci-runner/-/tree/main
|
||||
|
|
|
@ -374,9 +374,9 @@ Most code run on the EC after initialization is run in the context of a task
|
|||
there is no heap (malloc). All variable storage must be explicitly declared at
|
||||
build-time. The EC (and system) will reboot if any task has a stack overflow.
|
||||
Tasks typically have a top-level loop with a call to task_wait_event() or
|
||||
usleep() to set a delay in uSec before continuing. A watchdog will trigger if a
|
||||
task runs for too long. The watchdog timeout varies by EC chip and the clock
|
||||
speed the EC is running at.
|
||||
crec_usleep() to set a delay in uSec before continuing. A watchdog will trigger
|
||||
if a task runs for too long. The watchdog timeout varies by EC chip and the
|
||||
clock speed the EC is running at.
|
||||
|
||||
The list of tasks for a board is specified in ec.tasklist in the `board/$BOARD/`
|
||||
sub-directory. Tasks are listed in priority order with the lowest priority task
|
||||
|
|
|
@ -53,7 +53,7 @@ static int adc_value_to_numeric_id(enum adc_channel ch)
|
|||
|
||||
gpio_set_level(GPIO_EN_EC_ID_ODL, 0);
|
||||
/* Wait to allow cap charge */
|
||||
msleep(10);
|
||||
crec_msleep(10);
|
||||
|
||||
mv = adc_read_channel(ch);
|
||||
if (mv == ADC_READ_ERROR)
|
||||
|
|
|
@ -108,7 +108,7 @@ __override int svdm_dp_attention(int port, uint32_t *payload)
|
|||
uint64_t now = get_time().val;
|
||||
/* wait for the minimum spacing between IRQ_HPD if needed */
|
||||
if (now < svdm_hpd_deadline[port])
|
||||
usleep(svdm_hpd_deadline[port] - now);
|
||||
crec_usleep(svdm_hpd_deadline[port] - now);
|
||||
|
||||
/* generate IRQ_HPD pulse */
|
||||
svdm_set_hpd_gpio(port, 0);
|
||||
|
|
|
@ -13,7 +13,7 @@ test_mockable enum fp_transport_type get_fp_transport_type(void)
|
|||
enum fp_transport_type ret;
|
||||
|
||||
gpio_set_level(GPIO_DIVIDER_HIGHSIDE, 1);
|
||||
usleep(1);
|
||||
crec_usleep(1);
|
||||
switch (gpio_get_level(GPIO_TRANSPORT_SEL)) {
|
||||
case 0:
|
||||
ret = FP_TRANSPORT_TYPE_UART;
|
||||
|
|
|
@ -13,7 +13,7 @@ test_mockable enum fp_sensor_type fpsensor_detect_get_type(void)
|
|||
enum fp_sensor_type ret;
|
||||
|
||||
gpio_set_level(GPIO_DIVIDER_HIGHSIDE, 1);
|
||||
usleep(1);
|
||||
crec_usleep(1);
|
||||
switch (gpio_get_level(GPIO_FP_SENSOR_SEL)) {
|
||||
case 0:
|
||||
ret = FP_SENSOR_TYPE_ELAN;
|
||||
|
|
|
@ -207,7 +207,7 @@ static int svdm_tbt_compat_response_enter_mode(int port, uint32_t *payload)
|
|||
* before sending the reply without violating that timer.
|
||||
*/
|
||||
if (!usb_mux_set_completed(port))
|
||||
usleep(PD_T_VDM_E_MODE / 2);
|
||||
crec_usleep(PD_T_VDM_E_MODE / 2);
|
||||
|
||||
CPRINTS("UFP Enter TBT mode");
|
||||
return 1; /* ACK */
|
||||
|
|
|
@ -247,7 +247,7 @@ static int svdm_tbt_compat_response_enter_mode(int port, uint32_t *payload)
|
|||
* before sending the reply without violating that timer.
|
||||
*/
|
||||
if (!usb_mux_set_completed(port))
|
||||
usleep(PD_T_VDM_E_MODE / 2);
|
||||
crec_usleep(PD_T_VDM_E_MODE / 2);
|
||||
|
||||
CPRINTS("UFP Enter TBT mode");
|
||||
return 1; /* ACK */
|
||||
|
|
|
@ -119,7 +119,7 @@ __override int svdm_dp_attention(int port, uint32_t *payload)
|
|||
uint64_t now = get_time().val;
|
||||
/* wait for the minimum spacing between IRQ_HPD if needed */
|
||||
if (now < svdm_hpd_deadline[port])
|
||||
usleep(svdm_hpd_deadline[port] - now);
|
||||
crec_usleep(svdm_hpd_deadline[port] - now);
|
||||
|
||||
/* generate IRQ_HPD pulse */
|
||||
svdm_set_hpd_gpio(port, 0);
|
||||
|
|
|
@ -53,7 +53,7 @@ static int adc_value_to_numeric_id(enum adc_channel ch)
|
|||
|
||||
gpio_set_level(GPIO_EN_EC_ID_ODL, 0);
|
||||
/* Wait to allow cap charge */
|
||||
msleep(10);
|
||||
crec_msleep(10);
|
||||
|
||||
mv = adc_read_channel(ch);
|
||||
if (mv == ADC_READ_ERROR)
|
||||
|
|
|
@ -216,14 +216,14 @@ void board_set_tcpc_power_mode(int port, int mode)
|
|||
switch (mode) {
|
||||
case ANX74XX_NORMAL_MODE:
|
||||
gpio_set_level(GPIO_EN_USB_C0_TCPC_PWR, 1);
|
||||
msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
break;
|
||||
case ANX74XX_STANDBY_MODE:
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
crec_msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
gpio_set_level(GPIO_EN_USB_C0_TCPC_PWR, 0);
|
||||
msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
@ -241,7 +241,7 @@ void board_reset_pd_mcu(void)
|
|||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
|
||||
/* TCPC1 (ps8751) requires 1ms reset down assertion */
|
||||
msleep(MAX(1, ANX74XX_RST_L_PWR_L_DELAY_MS));
|
||||
crec_msleep(MAX(1, ANX74XX_RST_L_PWR_L_DELAY_MS));
|
||||
|
||||
/* Deassert reset to TCPC1 */
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
|
@ -251,18 +251,18 @@ void board_reset_pd_mcu(void)
|
|||
/*
|
||||
* anx3429 requires 10ms reset/power down assertion
|
||||
*/
|
||||
msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
board_set_tcpc_power_mode(USB_PD_PORT_ANX74XX, 1);
|
||||
#elif defined(VARIANT_GRUNT_TCPC_0_ANX3447)
|
||||
/* Assert reset to TCPC0 (anx3447) */
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST, 1);
|
||||
msleep(ANX74XX_RESET_HOLD_MS);
|
||||
crec_msleep(ANX74XX_RESET_HOLD_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST, 0);
|
||||
msleep(ANX74XX_RESET_FINISH_MS);
|
||||
crec_msleep(ANX74XX_RESET_FINISH_MS);
|
||||
|
||||
/* Assert reset to TCPC1 (ps8751) */
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -586,11 +586,11 @@ static void reset_nct38xx_port(int port)
|
|||
}
|
||||
|
||||
gpio_set_level(reset_gpio_l, 0);
|
||||
msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
crec_msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
gpio_set_level(reset_gpio_l, 1);
|
||||
nct38xx_reset_notify(port);
|
||||
if (NCT3807_RESET_POST_DELAY_MS != 0)
|
||||
msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
crec_msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
|
||||
/* Re-init ioex after resetting the TCPC */
|
||||
ioex_init(port);
|
||||
|
@ -711,7 +711,7 @@ void board_pwrbtn_to_pch(int level)
|
|||
if (!level && !gpio_get_level(GPIO_PCH_RSMRST_L)) {
|
||||
start = get_time();
|
||||
do {
|
||||
usleep(200);
|
||||
crec_usleep(200);
|
||||
if (gpio_get_level(GPIO_PCH_RSMRST_L))
|
||||
break;
|
||||
} while (time_since32(start) < timeout_rsmrst_rise_us);
|
||||
|
@ -719,7 +719,7 @@ void board_pwrbtn_to_pch(int level)
|
|||
if (!gpio_get_level(GPIO_PCH_RSMRST_L))
|
||||
ccprints("Error pwrbtn: RSMRST_L still low");
|
||||
|
||||
msleep(G3_TO_PWRBTN_DELAY_MS);
|
||||
crec_msleep(G3_TO_PWRBTN_DELAY_MS);
|
||||
}
|
||||
gpio_set_level(GPIO_PCH_PWRBTN_L, level);
|
||||
}
|
||||
|
@ -740,7 +740,7 @@ void board_hibernate(void)
|
|||
pd_request_source_voltage(port, SAFE_RESET_VBUS_MV);
|
||||
|
||||
/* Give PD task and PPC chip time to get to 5V */
|
||||
msleep(SAFE_RESET_VBUS_DELAY_MS);
|
||||
crec_msleep(SAFE_RESET_VBUS_DELAY_MS);
|
||||
}
|
||||
|
||||
/* Try to put our battery fuel gauge into sleep mode */
|
||||
|
|
|
@ -176,7 +176,7 @@ void board_hibernate(void)
|
|||
* needs time to work through the transitions. Also, it
|
||||
* works.
|
||||
*/
|
||||
msleep(300);
|
||||
crec_msleep(300);
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
|
@ -252,10 +252,10 @@ static void reset_pd_port(int port, enum gpio_signal reset_gpio, int hold_delay,
|
|||
int level = !!(tcpc_config[port].flags & TCPC_FLAGS_RESET_ACTIVE_HIGH);
|
||||
|
||||
gpio_set_level(reset_gpio, level);
|
||||
msleep(hold_delay);
|
||||
crec_msleep(hold_delay);
|
||||
gpio_set_level(reset_gpio, !level);
|
||||
if (finish_delay)
|
||||
msleep(finish_delay);
|
||||
crec_msleep(finish_delay);
|
||||
}
|
||||
|
||||
void board_reset_pd_mcu(void)
|
||||
|
|
|
@ -68,7 +68,7 @@ __maybe_unused static void board_power_sequence(int enable)
|
|||
board_power_seq[i].level);
|
||||
CPRINTS("power seq: rail = %d", i);
|
||||
if (board_power_seq[i].delay_ms)
|
||||
msleep(board_power_seq[i].delay_ms);
|
||||
crec_msleep(board_power_seq[i].delay_ms);
|
||||
}
|
||||
} else {
|
||||
for (i = board_power_seq_count - 1; i >= 0; i--) {
|
||||
|
@ -171,10 +171,10 @@ void baseboard_set_mst_lane_control(int mf)
|
|||
if (mf != gpio_get_level(GPIO_MST_HUB_LANE_SWITCH)) {
|
||||
/* put MST into reset */
|
||||
gpio_set_level(GPIO_MST_RST_L, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
gpio_set_level(GPIO_MST_HUB_LANE_SWITCH, mf);
|
||||
CPRINTS("MST: lane control = %s", mf ? "high" : "low");
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
/* lane control is set, take MST out of reset */
|
||||
gpio_set_level(GPIO_MST_RST_L, 1);
|
||||
}
|
||||
|
@ -187,7 +187,7 @@ static void baseboard_enable_mp4245(void)
|
|||
|
||||
mp4245_set_voltage_out(5000);
|
||||
mp4245_votlage_out_enable(1);
|
||||
msleep(MP4245_VOUT_5V_DELAY_MS);
|
||||
crec_msleep(MP4245_VOUT_5V_DELAY_MS);
|
||||
mp3245_get_vbus(&mv, &ma);
|
||||
CPRINTS("mp4245: vout @ %d mV enabled", mv);
|
||||
}
|
||||
|
@ -281,7 +281,7 @@ static void baseboard_power_on(void)
|
|||
*/
|
||||
for (port = 0; port < port_max; port++) {
|
||||
ppc_init(port);
|
||||
msleep(1000);
|
||||
crec_msleep(1000);
|
||||
/* Inform TC state machine that it can resume */
|
||||
pd_set_suspend(port, 0);
|
||||
}
|
||||
|
@ -336,7 +336,7 @@ static void baseboard_toggle_mf(void)
|
|||
* take effect.
|
||||
*/
|
||||
pd_set_suspend(USB_PD_PORT_HOST, 1);
|
||||
msleep(250);
|
||||
crec_msleep(250);
|
||||
pd_set_suspend(USB_PD_PORT_HOST, 0);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -288,7 +288,7 @@ void pd_transition_voltage(int idx)
|
|||
* msec. The max loop count and this sleep time gives plenty
|
||||
* of time for this change.
|
||||
*/
|
||||
msleep(2);
|
||||
crec_msleep(2);
|
||||
}
|
||||
|
||||
CPRINTS("usbc[%d]: Vbus transition timeout: target = %d, measure = %d",
|
||||
|
|
|
@ -72,7 +72,7 @@ static int baseboard_ppc_enable_sink_path(int port)
|
|||
status = write_reg(port, SN5S330_FUNC_SET1, SN5S330_ILIM_3_06);
|
||||
if (status) {
|
||||
retries++;
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -326,7 +326,7 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* retimer_init() function ensures power is up before calling
|
||||
* this function.
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
ioex_set_level((enum ioex_signal)bb_controls[me->usb_port]
|
||||
.retimer_rst_gpio,
|
||||
1);
|
||||
|
@ -335,13 +335,13 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
|
||||
} else {
|
||||
ioex_set_level((enum ioex_signal)bb_controls[me->usb_port]
|
||||
.retimer_rst_gpio,
|
||||
0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
ioex_set_level((enum ioex_signal)bb_controls[me->usb_port]
|
||||
.usb_ls_en_gpio,
|
||||
0);
|
||||
|
|
|
@ -150,7 +150,7 @@ int ioexpander_read_intelrvp_version(int *port0, int *port1)
|
|||
PCA9555_CMD_INPUT_PORT_1, port1))
|
||||
return 0;
|
||||
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
|
||||
/* pca9555 read failed */
|
||||
|
|
|
@ -217,7 +217,7 @@ const int usb_port_enable[USB_PORT_COUNT] = {
|
|||
void board_reset_pd_mcu(void)
|
||||
{
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -156,7 +156,7 @@ int board_get_version(void)
|
|||
|
||||
gpio_set_level(GPIO_EC_BOARD_ID_EN_L, 0);
|
||||
/* Wait to allow cap charge */
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
mv = adc_read_channel(ADC_BOARD_ID);
|
||||
|
||||
if (mv == ADC_READ_ERROR)
|
||||
|
|
|
@ -257,11 +257,11 @@ __override int svdm_dp_attention(int port, uint32_t *payload)
|
|||
uint64_t now = get_time().val;
|
||||
/* wait for the minimum spacing between IRQ_HPD if needed */
|
||||
if (now < svdm_hpd_deadline[port])
|
||||
usleep(svdm_hpd_deadline[port] - now);
|
||||
crec_usleep(svdm_hpd_deadline[port] - now);
|
||||
|
||||
/* generate IRQ_HPD pulse */
|
||||
gpio_set_level(GPIO_USB_C0_HPD_OD, 0);
|
||||
usleep(HPD_DSTREAM_DEBOUNCE_IRQ);
|
||||
crec_usleep(HPD_DSTREAM_DEBOUNCE_IRQ);
|
||||
gpio_set_level(GPIO_USB_C0_HPD_OD, 1);
|
||||
|
||||
#ifdef VARIANT_KUKUI_DP_MUX_GPIO
|
||||
|
|
|
@ -24,7 +24,12 @@
|
|||
#endif
|
||||
|
||||
/* IPI configs */
|
||||
#if defined(CHIP_VARIANT_MT8188)
|
||||
#define CONFIG_IPC_SHARED_OBJ_BUF_SIZE 600
|
||||
#else
|
||||
#define CONFIG_IPC_SHARED_OBJ_BUF_SIZE 288
|
||||
#endif /* CHIP_VARIANT_MT8188 */
|
||||
|
||||
#define CONFIG_IPC_SHARED_OBJ_ADDR \
|
||||
(SCP_FW_END - \
|
||||
(CONFIG_IPC_SHARED_OBJ_BUF_SIZE + 2 * 4 /* int32_t */) * 2)
|
||||
|
|
|
@ -14,7 +14,11 @@
|
|||
* IMPORTANT:
|
||||
* Please check MAX_MTKCAM_IPI_EVENT_SIZE if IPI message structure changes
|
||||
*/
|
||||
#if defined(CHIP_VARIANT_MT8188)
|
||||
#define MAX_MTKCAM_IPI_EVENT_SIZE 588
|
||||
#else
|
||||
#define MAX_MTKCAM_IPI_EVENT_SIZE 86
|
||||
#endif /* CHIP_VARIANT_MT8188 */
|
||||
|
||||
struct cam_msg {
|
||||
unsigned char id;
|
||||
|
|
|
@ -363,5 +363,5 @@ void board_hibernate(void)
|
|||
* with any PD contract renegotiation, and tcpm to put TCPC into low
|
||||
* power mode if required.
|
||||
*/
|
||||
msleep(1500);
|
||||
crec_msleep(1500);
|
||||
}
|
||||
|
|
|
@ -65,7 +65,7 @@ static void board_it83xx_hpd_status(const struct usb_mux *me,
|
|||
gpio_set_level(gpio, hpd_lvl);
|
||||
if (hpd_irq) {
|
||||
gpio_set_level(gpio, 1);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
gpio_set_level(gpio, hpd_lvl);
|
||||
}
|
||||
}
|
||||
|
@ -144,7 +144,7 @@ void board_reset_pd_mcu(void)
|
|||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 0);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
|
||||
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 1);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
|
||||
|
|
|
@ -180,7 +180,7 @@ void board_reset_pd_mcu(void)
|
|||
* enough charge to last the reboot as well
|
||||
*/
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 1);
|
||||
}
|
||||
#else
|
||||
|
@ -197,9 +197,9 @@ void board_reset_pd_mcu(void)
|
|||
if (gpio_is_implemented(GPIO_USB_C0_PD_RST) &&
|
||||
battery_is_present() == BP_YES) {
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST, 1);
|
||||
msleep(ANX74XX_RESET_HOLD_MS);
|
||||
crec_msleep(ANX74XX_RESET_HOLD_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST, 0);
|
||||
msleep(ANX74XX_RESET_FINISH_MS);
|
||||
crec_msleep(ANX74XX_RESET_FINISH_MS);
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
|
@ -212,7 +212,7 @@ void board_reset_pd_mcu(void)
|
|||
* enough charge to last the reboot as well
|
||||
*/
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
|
||||
} else {
|
||||
CPRINTS("Skipping C1 TCPC reset because no battery");
|
||||
|
|
|
@ -231,12 +231,12 @@ __override int svdm_dp_attention(int port, uint32_t *payload)
|
|||
uint64_t now = get_time().val;
|
||||
/* Wait for the minimum spacing between IRQ_HPD if needed */
|
||||
if (now < svdm_hpd_deadline[port])
|
||||
usleep(svdm_hpd_deadline[port] - now);
|
||||
crec_usleep(svdm_hpd_deadline[port] - now);
|
||||
|
||||
/* Generate IRQ_HPD pulse */
|
||||
CPRINTS("C%d: Recv IRQ. HPD->0", port);
|
||||
gpio_set_level(hpd, 0);
|
||||
usleep(HPD_DSTREAM_DEBOUNCE_IRQ);
|
||||
crec_usleep(HPD_DSTREAM_DEBOUNCE_IRQ);
|
||||
gpio_set_level(hpd, 1);
|
||||
CPRINTS("C%d: Recv IRQ. HPD->1", port);
|
||||
|
||||
|
|
|
@ -28,6 +28,10 @@
|
|||
|
||||
/* System safe mode for improved panic debugging */
|
||||
#define CONFIG_SYSTEM_SAFE_MODE
|
||||
#define CONFIG_PANIC_ON_WATCHDOG_WARNING
|
||||
/* Increase watchdog timeout since system will panic on warning */
|
||||
#undef CONFIG_WATCHDOG_PERIOD_MS
|
||||
#define CONFIG_WATCHDOG_PERIOD_MS 2100
|
||||
|
||||
/* EC Defines */
|
||||
#define CONFIG_LTO
|
||||
|
|
|
@ -201,7 +201,7 @@ static int svdm_tbt_compat_response_enter_mode(int port, uint32_t *payload)
|
|||
* before sending the reply without violating that timer.
|
||||
*/
|
||||
if (!usb_mux_set_completed(port))
|
||||
usleep(PD_T_VDM_E_MODE / 2);
|
||||
crec_usleep(PD_T_VDM_E_MODE / 2);
|
||||
|
||||
CPRINTS("UFP Enter TBT mode");
|
||||
return 1; /* ACK */
|
||||
|
|
|
@ -230,7 +230,7 @@ void board_hibernate(void)
|
|||
pd_request_source_voltage(port, SAFE_RESET_VBUS_MV);
|
||||
|
||||
/* Give PD task and PPC chip time to get to 5V */
|
||||
msleep(900);
|
||||
crec_msleep(900);
|
||||
}
|
||||
|
||||
zork_board_hibernate();
|
||||
|
@ -309,7 +309,7 @@ void board_pwrbtn_to_pch(int level)
|
|||
* From measurement, wait 80 ms for RSMRST_L to rise after
|
||||
* S5_PGOOD.
|
||||
*/
|
||||
msleep(80);
|
||||
crec_msleep(80);
|
||||
|
||||
if (!gpio_get_level(GPIO_S5_PGOOD))
|
||||
ccprints("Error: pwrbtn S5_PGOOD low");
|
||||
|
|
|
@ -275,11 +275,11 @@ static void reset_nct38xx_port(int port)
|
|||
return;
|
||||
|
||||
gpio_set_level(reset_gpio_l, 0);
|
||||
msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
crec_msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
gpio_set_level(reset_gpio_l, 1);
|
||||
nct38xx_reset_notify(port);
|
||||
if (NCT3807_RESET_POST_DELAY_MS != 0)
|
||||
msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
crec_msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
}
|
||||
|
||||
void board_reset_pd_mcu(void)
|
||||
|
|
|
@ -1303,6 +1303,11 @@ def all_targets():
|
|||
core = "cortex-m",
|
||||
zephyr = False,
|
||||
)
|
||||
ec_target(
|
||||
name = "kyogre",
|
||||
board = "kyogre",
|
||||
extra_modules = ["cmsis"],
|
||||
)
|
||||
ec_target(
|
||||
name = "lalala",
|
||||
baseboard = "keeby",
|
||||
|
@ -2034,6 +2039,10 @@ def all_targets():
|
|||
core = "cortex-m",
|
||||
zephyr = False,
|
||||
)
|
||||
ec_target(
|
||||
name = "skitty",
|
||||
board = "skitty",
|
||||
)
|
||||
ec_target(
|
||||
name = "skyrim",
|
||||
board = "skyrim",
|
||||
|
@ -2118,6 +2127,11 @@ def all_targets():
|
|||
core = "cortex-m",
|
||||
zephyr = False,
|
||||
)
|
||||
ec_target(
|
||||
name = "sundance",
|
||||
board = "sundance",
|
||||
extra_modules = ["cmsis"],
|
||||
)
|
||||
ec_target(
|
||||
name = "sweetberry",
|
||||
board = "sweetberry",
|
||||
|
|
|
@ -609,10 +609,10 @@ void board_reset_pd_mcu(void)
|
|||
TCPC_FLAGS_RESET_ACTIVE_HIGH);
|
||||
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_RST, level);
|
||||
msleep(BOARD_TCPC_C0_RESET_HOLD_DELAY);
|
||||
crec_msleep(BOARD_TCPC_C0_RESET_HOLD_DELAY);
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_RST, !level);
|
||||
if (BOARD_TCPC_C0_RESET_POST_DELAY)
|
||||
msleep(BOARD_TCPC_C0_RESET_POST_DELAY);
|
||||
crec_msleep(BOARD_TCPC_C0_RESET_POST_DELAY);
|
||||
}
|
||||
|
||||
int board_set_active_charge_port(int port)
|
||||
|
|
|
@ -218,6 +218,6 @@ void led_task(void *u)
|
|||
* the duration exceeds the tick time, then don't sleep.
|
||||
*/
|
||||
if (task_duration < LED_TICK_INTERVAL_MS)
|
||||
usleep(LED_TICK_INTERVAL_MS - task_duration);
|
||||
crec_usleep(LED_TICK_INTERVAL_MS - task_duration);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -187,10 +187,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -203,7 +203,7 @@ void board_reset_pd_mcu(void)
|
|||
/*
|
||||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
crec_msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 1);
|
||||
gpio_set_level(GPIO_USB_C1_TCPC_RST_ODL, 1);
|
||||
|
@ -213,7 +213,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
/* wait for chips to come up */
|
||||
if (NCT3807_RESET_POST_DELAY_MS != 0)
|
||||
msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
crec_msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
}
|
||||
|
||||
static void board_tcpc_init(void)
|
||||
|
|
|
@ -216,7 +216,7 @@ const struct usb_mux_chain usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
|
|||
void board_reset_pd_mcu(void)
|
||||
{
|
||||
gpio_set_level(GPIO_USB_PD_RST_L, 0);
|
||||
msleep(PS8XXX_RST_L_RST_H_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RST_L_RST_H_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_PD_RST_L, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -185,10 +185,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -200,9 +200,9 @@ __override int bb_retimer_reset(const struct usb_mux *me)
|
|||
* QS Silicon is complete
|
||||
*/
|
||||
bb_retimer_power_enable(me, false);
|
||||
msleep(5);
|
||||
crec_msleep(5);
|
||||
bb_retimer_power_enable(me, true);
|
||||
msleep(25);
|
||||
crec_msleep(25);
|
||||
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -223,13 +223,13 @@ void board_reset_pd_mcu(void)
|
|||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(tcpc_rst, 1);
|
||||
|
||||
/* wait for chips to come up */
|
||||
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
static void enable_ioex(int ioex)
|
||||
|
|
|
@ -189,9 +189,9 @@ void board_reset_pd_mcu(void)
|
|||
cflush();
|
||||
|
||||
gpio_set_level(GPIO_USBC_UF_RESET_L, 0);
|
||||
msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
gpio_set_level(GPIO_USBC_UF_RESET_L, 1);
|
||||
msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
}
|
||||
|
||||
void board_enable_usbc_interrupts(void)
|
||||
|
@ -340,10 +340,10 @@ static int command_dplane(int argc, const char **argv)
|
|||
|
||||
/* put MST into reset */
|
||||
gpio_set_level(GPIO_MST_RST_L, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
/* Set lane control to requested level */
|
||||
gpio_set_level(GPIO_MST_HUB_LANE_SWITCH, lane == 2 ? 1 : 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
/* Take MST out of reset */
|
||||
gpio_set_level(GPIO_MST_RST_L, 1);
|
||||
|
||||
|
|
|
@ -368,10 +368,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -386,7 +386,7 @@ void board_reset_pd_mcu(void)
|
|||
/*
|
||||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
crec_msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_C1_TCPC_RST_ODL, 1);
|
||||
gpio_set_level(GPIO_USB_C2_C3_TCPC_RST_ODL, 1);
|
||||
|
||||
|
@ -397,7 +397,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
/* wait for chips to come up */
|
||||
if (NCT3808_RESET_POST_DELAY_MS != 0)
|
||||
msleep(NCT3808_RESET_POST_DELAY_MS);
|
||||
crec_msleep(NCT3808_RESET_POST_DELAY_MS);
|
||||
}
|
||||
|
||||
static void board_tcpc_init(void)
|
||||
|
|
|
@ -133,7 +133,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -347,7 +347,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -326,7 +326,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -95,7 +95,7 @@ static void board_chipset_resume(void)
|
|||
|
||||
if (ec_config_has_hdmi_retimer_pi3hdx1204()) {
|
||||
ioex_set_level(IOEX_HDMI_POWER_EN_DB, 1);
|
||||
msleep(PI3HDX1204_POWER_ON_DELAY_MS);
|
||||
crec_msleep(PI3HDX1204_POWER_ON_DELAY_MS);
|
||||
pi3hdx1204_enable(I2C_PORT_TCPC1, PI3HDX1204_I2C_ADDR_FLAGS,
|
||||
check_hdmi_hpd_status());
|
||||
}
|
||||
|
|
|
@ -499,7 +499,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -312,9 +312,10 @@ static void ps8815_reset(void)
|
|||
int val;
|
||||
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
/*
|
||||
* b/144397088
|
||||
|
|
|
@ -135,7 +135,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -237,10 +237,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -252,9 +252,9 @@ __override int bb_retimer_reset(const struct usb_mux *me)
|
|||
* QS Silicon is complete
|
||||
*/
|
||||
bb_retimer_power_enable(me, false);
|
||||
msleep(5);
|
||||
crec_msleep(5);
|
||||
bb_retimer_power_enable(me, true);
|
||||
msleep(25);
|
||||
crec_msleep(25);
|
||||
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -276,14 +276,14 @@ void board_reset_pd_mcu(void)
|
|||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(tcpc_rst, 1);
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_R_L, 1);
|
||||
|
||||
/* wait for chips to come up */
|
||||
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
static void enable_ioex(int ioex)
|
||||
|
|
|
@ -316,10 +316,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -348,7 +348,7 @@ void board_reset_pd_mcu(void)
|
|||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(tcpc_rst, 1);
|
||||
if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
|
||||
|
@ -358,7 +358,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
/* wait for chips to come up */
|
||||
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
static void board_tcpc_init(void)
|
||||
|
|
|
@ -801,7 +801,7 @@ static void panel_power_change_deferred(void)
|
|||
}
|
||||
if (board_id < 4) {
|
||||
gpio_set_level(GPIO_EN_LCD_ENP, signal);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
gpio_set_level(GPIO_EN_LCD_ENN, signal);
|
||||
} else if (signal != 0) {
|
||||
i2c_write8(I2C_PORT_LCD, I2C_ADDR_ISL98607_FLAGS,
|
||||
|
|
|
@ -521,7 +521,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -814,7 +814,7 @@ static int command_h1_reset(int argc, const char **argv)
|
|||
VREF_MON_DIS_H1_RST_HELD,
|
||||
"H1 reset");
|
||||
if (rv == EC_SUCCESS) {
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
rv = command_vref_alternate(
|
||||
c, cmd_off, GPIO_SPIVREF_RSVD_H1VREF_H1_RST_ODL,
|
||||
GPIO_EN_SPIVREF_RSVD_H1VREF_H1_RST,
|
||||
|
@ -891,7 +891,7 @@ static inline void drain_vref_lines(void)
|
|||
|
||||
/* Ensure we have enough time to drain line. Not in mutex */
|
||||
mutex_unlock(&vref_bus_state_mutex);
|
||||
msleep(5);
|
||||
crec_msleep(5);
|
||||
mutex_lock(&vref_bus_state_mutex);
|
||||
if (vref_monitor_disable) {
|
||||
mutex_unlock(&vref_bus_state_mutex);
|
||||
|
@ -916,7 +916,7 @@ static inline void drain_vref_lines(void)
|
|||
|
||||
mutex_unlock(&vref_bus_state_mutex);
|
||||
/* Ensure we have enough time to charge line up to real voltage */
|
||||
msleep(10);
|
||||
crec_msleep(10);
|
||||
}
|
||||
|
||||
/* This if forward declared as a deferred function above */
|
||||
|
|
|
@ -127,7 +127,7 @@ void i2c_start_xfer_notify(const int port, const uint16_t addr_flags)
|
|||
if (time_delta_us >= BATTERY_FREE_MIN_DELTA_US)
|
||||
return;
|
||||
|
||||
usleep(BATTERY_FREE_MIN_DELTA_US - time_delta_us);
|
||||
crec_usleep(BATTERY_FREE_MIN_DELTA_US - time_delta_us);
|
||||
}
|
||||
|
||||
void i2c_end_xfer_notify(const int port, const uint16_t addr_flags)
|
||||
|
|
|
@ -311,7 +311,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -132,9 +132,10 @@ static void ps8815_reset(void)
|
|||
int val;
|
||||
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
/*
|
||||
* b/144397088
|
||||
|
|
|
@ -606,7 +606,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
}
|
||||
|
|
|
@ -417,9 +417,10 @@ static void ps8815_reset(int port)
|
|||
}
|
||||
|
||||
gpio_set_level(ps8xxx_rst_odl, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(ps8xxx_rst_odl, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
CPRINTS("[C%d] %s: patching ps8815 registers", port, __func__);
|
||||
|
||||
|
|
|
@ -200,10 +200,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -215,9 +215,9 @@ __override int bb_retimer_reset(const struct usb_mux *me)
|
|||
* QS Silicon is complete
|
||||
*/
|
||||
bb_retimer_power_enable(me, false);
|
||||
msleep(5);
|
||||
crec_msleep(5);
|
||||
bb_retimer_power_enable(me, true);
|
||||
msleep(25);
|
||||
crec_msleep(25);
|
||||
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -238,13 +238,13 @@ void board_reset_pd_mcu(void)
|
|||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(tcpc_rst, 1);
|
||||
|
||||
/* wait for chips to come up */
|
||||
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
void pd_reset_deferred(void)
|
||||
|
|
|
@ -327,14 +327,14 @@ void board_set_tcpc_power_mode(int port, int mode)
|
|||
switch (mode) {
|
||||
case ANX74XX_NORMAL_MODE:
|
||||
gpio_set_level(GPIO_EN_USB_TCPC_PWR, 1);
|
||||
msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
break;
|
||||
case ANX74XX_STANDBY_MODE:
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
crec_msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
gpio_set_level(GPIO_EN_USB_TCPC_PWR, 0);
|
||||
msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
@ -356,7 +356,7 @@ void board_reset_pd_mcu(void)
|
|||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
|
||||
/* TCPC1 (ps8751) requires 1ms reset down assertion */
|
||||
msleep(MAX(1, ANX74XX_RST_L_PWR_L_DELAY_MS));
|
||||
crec_msleep(MAX(1, ANX74XX_RST_L_PWR_L_DELAY_MS));
|
||||
|
||||
/* Deassert reset to TCPC1 */
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
|
||||
|
@ -366,7 +366,7 @@ void board_reset_pd_mcu(void)
|
|||
/*
|
||||
* anx3429 requires 10ms reset/power down assertion
|
||||
*/
|
||||
msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
board_set_tcpc_power_mode(USB_PD_PORT_ANX74XX, 1);
|
||||
}
|
||||
|
||||
|
@ -378,7 +378,7 @@ static void board_tcpc_init(void)
|
|||
/* Wait for disconnected battery to wake up */
|
||||
while (battery_hw_present() == BP_YES &&
|
||||
battery_is_present() == BP_NO) {
|
||||
usleep(100 * MSEC);
|
||||
crec_usleep(100 * MSEC);
|
||||
/* Give up waiting after 2 seconds */
|
||||
if (++count > 20)
|
||||
break;
|
||||
|
@ -812,7 +812,7 @@ void board_hibernate(void)
|
|||
chipset_do_shutdown();
|
||||
|
||||
/* Added delay to allow AP to settle down */
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
|
||||
/* Enable both the VBUS & VCC ports before entering PG3 */
|
||||
bd9995x_select_input_port(BD9995X_CHARGE_PORT_BOTH, 1);
|
||||
|
@ -870,7 +870,7 @@ static int board_read_version(enum adc_channel chan)
|
|||
/* ID/SKU enable is active high */
|
||||
gpio_set_flags(GPIO_EC_BRD_ID_EN, GPIO_OUT_HIGH);
|
||||
/* Wait to allow cap charge */
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
mv = adc_read_channel(chan);
|
||||
CPRINTS("ID/SKU ADC %d = %d mV", chan, mv);
|
||||
/* Disable ID/SKU circuit */
|
||||
|
@ -937,7 +937,7 @@ static void print_form_factor_list(int low, int high)
|
|||
SKU_IS_CONVERTIBLE(id) ? "Convertible" : "Clamshell");
|
||||
/* Don't print too many lines at once */
|
||||
if (!(++count % 5))
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -252,10 +252,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -272,13 +272,13 @@ void board_reset_pd_mcu(void)
|
|||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(tcpc_rst, 1);
|
||||
|
||||
/* wait for chips to come up */
|
||||
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
static void board_tcpc_init(void)
|
||||
|
|
|
@ -201,7 +201,7 @@ static void board_chipset_resume(void)
|
|||
|
||||
if (ec_config_has_hdmi_retimer_pi3hdx1204()) {
|
||||
ioex_set_level(IOEX_EN_PWR_HDMI_DB, 1);
|
||||
msleep(PI3HDX1204_POWER_ON_DELAY_MS);
|
||||
crec_msleep(PI3HDX1204_POWER_ON_DELAY_MS);
|
||||
pi3hdx1204_enable(I2C_PORT_TCPC1, PI3HDX1204_I2C_ADDR_FLAGS, 1);
|
||||
}
|
||||
}
|
||||
|
@ -463,11 +463,11 @@ static void reset_nct38xx_port(int port)
|
|||
return;
|
||||
|
||||
gpio_set_level(reset_gpio_l, 0);
|
||||
msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
crec_msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
gpio_set_level(reset_gpio_l, 1);
|
||||
nct38xx_reset_notify(port);
|
||||
if (NCT3807_RESET_POST_DELAY_MS != 0)
|
||||
msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
crec_msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
}
|
||||
|
||||
void board_reset_pd_mcu(void)
|
||||
|
|
|
@ -311,7 +311,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -304,9 +304,10 @@ static void ps8815_reset(int port)
|
|||
}
|
||||
|
||||
gpio_set_level(ps8xxx_rst_odl, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(ps8xxx_rst_odl, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
CPRINTS("[C%d] %s: patching ps8815 registers", port, __func__);
|
||||
|
||||
|
|
|
@ -293,11 +293,11 @@ static void reset_nct38xx_port(int port)
|
|||
return;
|
||||
|
||||
gpio_set_level(reset_gpio_l, 0);
|
||||
msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
crec_msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
gpio_set_level(reset_gpio_l, 1);
|
||||
nct38xx_reset_notify(port);
|
||||
if (NCT3807_RESET_POST_DELAY_MS != 0)
|
||||
msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
crec_msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
}
|
||||
|
||||
void board_reset_pd_mcu(void)
|
||||
|
|
|
@ -830,11 +830,11 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_RST, level0);
|
||||
gpio_set_level(GPIO_USB_C1_TCPC_RST, level1);
|
||||
msleep(BOARD_TCPC_C0_RESET_HOLD_DELAY);
|
||||
crec_msleep(BOARD_TCPC_C0_RESET_HOLD_DELAY);
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_RST, !level0);
|
||||
gpio_set_level(GPIO_USB_C1_TCPC_RST, !level1);
|
||||
if (BOARD_TCPC_C0_RESET_POST_DELAY)
|
||||
msleep(BOARD_TCPC_C0_RESET_POST_DELAY);
|
||||
crec_msleep(BOARD_TCPC_C0_RESET_POST_DELAY);
|
||||
}
|
||||
|
||||
int board_set_active_charge_port(int port)
|
||||
|
|
|
@ -539,7 +539,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -362,9 +362,10 @@ static void ps8815_reset(void)
|
|||
int val;
|
||||
|
||||
gpio_set_level(ps8xxx_rst_odl, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(ps8xxx_rst_odl, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
/*
|
||||
* b/144397088
|
||||
|
|
|
@ -264,9 +264,10 @@ static void ps8815_reset(void)
|
|||
int val;
|
||||
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
/*
|
||||
* b/144397088
|
||||
|
|
|
@ -554,7 +554,7 @@ static int board_battery_disable_cto(uint32_t value)
|
|||
board_battery_write_flash(SB_VENDOR_ENABLED_PROTECT_C,
|
||||
EXPECTED_CTO_DISABLE_VALUE, 1);
|
||||
/* After flash write, allow time for it to complete */
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
/* Read the current protect_c register value */
|
||||
if (board_battery_read_flash(SB_VENDOR_ENABLED_PROTECT_C, 1,
|
||||
&protect_c) == EC_SUCCESS)
|
||||
|
@ -565,7 +565,7 @@ static int board_battery_disable_cto(uint32_t value)
|
|||
|
||||
if (board_battery_seal()) {
|
||||
/* If failed, then wait one more time and seal again */
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
if (board_battery_seal())
|
||||
return EC_RES_ERROR;
|
||||
}
|
||||
|
@ -591,7 +591,7 @@ static int board_battery_fix_otd_recovery_temp(uint32_t value)
|
|||
board_battery_write_flash(SB_VENDOR_OTD_RECOVERY_TEMP,
|
||||
EXPECTED_OTD_RECOVERY_TEMP, 2);
|
||||
/* After flash write, allow time for it to complete */
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
/* Read the current OTD recovery temperature */
|
||||
if (!board_battery_read_flash(SB_VENDOR_OTD_RECOVERY_TEMP, 2,
|
||||
(uint8_t *)&otd_recovery_temp))
|
||||
|
@ -602,7 +602,7 @@ static int board_battery_fix_otd_recovery_temp(uint32_t value)
|
|||
|
||||
if (board_battery_seal()) {
|
||||
/* If failed, then wait one more time and seal again */
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
if (board_battery_seal())
|
||||
return EC_RES_ERROR;
|
||||
}
|
||||
|
|
|
@ -282,25 +282,25 @@ void board_set_tcpc_power_mode(int port, int mode)
|
|||
case 0:
|
||||
if (mode) {
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_PWR, 1);
|
||||
msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
} else {
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
crec_msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_PWR, 0);
|
||||
msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
}
|
||||
break;
|
||||
case 1:
|
||||
if (mode) {
|
||||
gpio_set_level(GPIO_USB_C1_TCPC_PWR, 1);
|
||||
msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
} else {
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
crec_msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C1_TCPC_PWR, 0);
|
||||
msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
@ -311,15 +311,15 @@ void board_reset_pd_mcu(void)
|
|||
/* Assert reset */
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
crec_msleep(ANX74XX_RST_L_PWR_L_DELAY_MS);
|
||||
/* Disable power */
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_PWR, 0);
|
||||
gpio_set_level(GPIO_USB_C1_TCPC_PWR, 0);
|
||||
msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS);
|
||||
/* Enable power */
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_PWR, 1);
|
||||
gpio_set_level(GPIO_USB_C1_TCPC_PWR, 1);
|
||||
msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
crec_msleep(ANX74XX_PWR_H_RST_H_DELAY_MS);
|
||||
/* Deassert reset */
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
|
@ -333,7 +333,7 @@ void board_tcpc_init(void)
|
|||
/* Wait for disconnected battery to wake up */
|
||||
while (battery_hw_present() == BP_YES &&
|
||||
battery_is_present() == BP_NO) {
|
||||
usleep(100 * MSEC);
|
||||
crec_usleep(100 * MSEC);
|
||||
/* Give up waiting after 2 seconds */
|
||||
if (++count > 20)
|
||||
break;
|
||||
|
|
|
@ -398,7 +398,7 @@ static void led_change_color(void)
|
|||
/* Move one step in the transition table */
|
||||
led_adjust_color_step(i);
|
||||
}
|
||||
msleep(LED_STEP_MSEC);
|
||||
crec_msleep(LED_STEP_MSEC);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -595,7 +595,7 @@ void led_task(void *u)
|
|||
|
||||
led_init();
|
||||
|
||||
usleep(SECOND);
|
||||
crec_usleep(SECOND);
|
||||
|
||||
while (1) {
|
||||
enum led_pattern pattern_desired[LED_BOTH];
|
||||
|
@ -626,7 +626,7 @@ void led_task(void *u)
|
|||
* the duration exceeds the tick time, then don't sleep.
|
||||
*/
|
||||
if (task_duration < LED_TICK_TIME)
|
||||
usleep(LED_TICK_TIME - task_duration);
|
||||
crec_usleep(LED_TICK_TIME - task_duration);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -645,7 +645,7 @@ static void board_chipset_resume(void)
|
|||
|
||||
if (ec_config_has_hdmi_retimer_pi3hdx1204()) {
|
||||
ioex_set_level(IOEX_HDMI_POWER_EN_DB, 1);
|
||||
msleep(PI3HDX1204_POWER_ON_DELAY_MS);
|
||||
crec_msleep(PI3HDX1204_POWER_ON_DELAY_MS);
|
||||
pi3hdx1204_enable(I2C_PORT_TCPC1, PI3HDX1204_I2C_ADDR_FLAGS,
|
||||
check_hdmi_hpd_status());
|
||||
}
|
||||
|
|
|
@ -252,10 +252,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
gpio_or_ioex_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -276,7 +276,7 @@ void board_reset_pd_mcu(void)
|
|||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 1);
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
|
||||
|
@ -286,7 +286,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
/* wait for chips to come up */
|
||||
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
static void enable_ioex(int ioex)
|
||||
|
|
|
@ -315,7 +315,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -248,7 +248,7 @@ const int usb_port_enable[USB_PORT_COUNT] = {
|
|||
void board_reset_pd_mcu(void)
|
||||
{
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -92,12 +92,12 @@ static int command_cc_flip(int argc, const char *argv[])
|
|||
gpio_set_level(enabled_port, 0);
|
||||
gpio_set_level(GPIO_EN_USB_MUX2, 0);
|
||||
/* Wait long enough for CC to discharge. */
|
||||
usleep(500 * MSEC);
|
||||
crec_usleep(500 * MSEC);
|
||||
}
|
||||
|
||||
gpio_set_level(GPIO_EN_CC_FLIP, enable);
|
||||
/* Allow some time for new CC configuration to settle. */
|
||||
usleep(500 * MSEC);
|
||||
crec_usleep(500 * MSEC);
|
||||
|
||||
if (output_en) {
|
||||
gpio_set_level(enabled_port, 1);
|
||||
|
@ -213,10 +213,10 @@ static void board_init(void)
|
|||
/* Do a sweeping LED dance. */
|
||||
for (enum led_ch led = 0; led < LED_COUNT; led++) {
|
||||
set_led(led, 1);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
}
|
||||
|
||||
msleep(500);
|
||||
crec_msleep(500);
|
||||
|
||||
for (enum led_ch led = 0; led < LED_COUNT; led++)
|
||||
set_led(led, 0);
|
||||
|
@ -293,7 +293,7 @@ static int command_portctl(int argc, const char **argv)
|
|||
CPRINTS("Port %d: disabled", enabled_port - GPIO_EN_C0);
|
||||
|
||||
/* Allow time for an "unplug" to allow VBUS and CC to fall. */
|
||||
usleep(1 * SECOND);
|
||||
crec_usleep(1 * SECOND);
|
||||
|
||||
/*
|
||||
* The USB 2.0 lines are arranged using 3x 8:1 muxes. Ports 0-7 are
|
||||
|
|
|
@ -33,10 +33,10 @@ static void expander_write(uint8_t data)
|
|||
static void pulse_enable(uint8_t data)
|
||||
{
|
||||
expander_write(data | LCD_EN); /* En high */
|
||||
usleep(1); /* enable pulse must be >450ns */
|
||||
crec_usleep(1); /* enable pulse must be >450ns */
|
||||
|
||||
expander_write(data & ~LCD_EN); /* En low */
|
||||
usleep(50); /* commands need > 37us to settle */
|
||||
crec_usleep(50); /* commands need > 37us to settle */
|
||||
}
|
||||
|
||||
static void write_4bits(uint8_t value)
|
||||
|
@ -64,7 +64,7 @@ static void command(uint8_t value)
|
|||
void lcd_clear(void)
|
||||
{
|
||||
command(LCD_CLEAR_DISPLAY); /* clear display, set cursor to zero */
|
||||
usleep(2000); /* this command takes a long time! */
|
||||
crec_usleep(2000); /* this command takes a long time! */
|
||||
}
|
||||
|
||||
void lcd_set_cursor(uint8_t col, uint8_t row)
|
||||
|
@ -124,12 +124,12 @@ void lcd_init(uint8_t cols, uint8_t rows, uint8_t dotsize)
|
|||
* above 2.7V before sending commands. Arduino can turn on way
|
||||
* before 4.5V so we'll wait 50
|
||||
*/
|
||||
usleep(50);
|
||||
crec_usleep(50);
|
||||
|
||||
/* Now we pull both RS and R/W low to begin commands */
|
||||
/* reset expanderand turn backlight off (Bit 8 =1) */
|
||||
expander_write(state.backlightval);
|
||||
usleep(1000);
|
||||
crec_usleep(1000);
|
||||
|
||||
/* put the LCD into 4 bit mode
|
||||
* this is according to the hitachi HD44780 datasheet
|
||||
|
@ -137,13 +137,13 @@ void lcd_init(uint8_t cols, uint8_t rows, uint8_t dotsize)
|
|||
* we start in 8bit mode, try to set 4 bit mode
|
||||
*/
|
||||
write_4bits(0x03 << 4);
|
||||
usleep(4500); /* wait min 4.1ms */
|
||||
crec_usleep(4500); /* wait min 4.1ms */
|
||||
/*second try */
|
||||
write_4bits(0x03 << 4);
|
||||
usleep(4500); /* wait min 4.1ms */
|
||||
crec_usleep(4500); /* wait min 4.1ms */
|
||||
/* third go! */
|
||||
write_4bits(0x03 << 4);
|
||||
usleep(150);
|
||||
crec_usleep(150);
|
||||
/* finally, set to 4-bit interface */
|
||||
write_4bits(0x02 << 4);
|
||||
|
||||
|
|
|
@ -147,9 +147,10 @@ static void ps8815_reset(int port)
|
|||
}
|
||||
|
||||
gpio_set_level(ps8xxx_rst_odl, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(ps8xxx_rst_odl, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
CPRINTS("[C%d] %s: patching ps8815 registers", port, __func__);
|
||||
|
||||
|
@ -157,7 +158,7 @@ static void ps8815_reset(int port)
|
|||
CPRINTS("ps8815: reg 0x0f was %02x", val);
|
||||
else {
|
||||
CPRINTS("delay 10ms to make sure ps8815 is waken from idle");
|
||||
msleep(10);
|
||||
crec_msleep(10);
|
||||
}
|
||||
|
||||
if (i2c_write8(i2c_port, i2c_addr_flags, 0x0f, 0x31) == EC_SUCCESS)
|
||||
|
|
|
@ -882,7 +882,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -599,7 +599,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
}
|
||||
|
|
|
@ -167,13 +167,14 @@ void board_reset_pd_mcu(void)
|
|||
if (battery_hw_present())
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
|
||||
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
|
||||
gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 1);
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
|
||||
|
||||
/* wait for chips to come up */
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
}
|
||||
|
||||
static void board_tcpc_init(void)
|
||||
|
|
|
@ -233,10 +233,10 @@ void board_reset_pd_mcu(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_USBC_DP_PD_RST_L, 0);
|
||||
gpio_set_level(GPIO_USBC_UF_RESET_L, 0);
|
||||
msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
gpio_set_level(GPIO_USBC_DP_PD_RST_L, 1);
|
||||
gpio_set_level(GPIO_USBC_UF_RESET_L, 1);
|
||||
msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
}
|
||||
|
||||
/* Power Delivery and charging functions */
|
||||
|
|
|
@ -390,11 +390,11 @@ static void reset_nct38xx_port(int port)
|
|||
return;
|
||||
|
||||
gpio_set_level(reset_gpio_l, 0);
|
||||
msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
crec_msleep(NCT38XX_RESET_HOLD_DELAY_MS);
|
||||
gpio_set_level(reset_gpio_l, 1);
|
||||
nct38xx_reset_notify(port);
|
||||
if (NCT3807_RESET_POST_DELAY_MS != 0)
|
||||
msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
crec_msleep(NCT3807_RESET_POST_DELAY_MS);
|
||||
}
|
||||
|
||||
void board_reset_pd_mcu(void)
|
||||
|
|
|
@ -253,14 +253,14 @@ void board_touchpad_reset(void)
|
|||
{
|
||||
#ifdef HAS_EN_PP3300_TP_ACTIVE_HIGH
|
||||
gpio_set_level(GPIO_EN_PP3300_TP, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_EN_PP3300_TP, 1);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
#else
|
||||
gpio_set_level(GPIO_EN_PP3300_TP_ODL, 1);
|
||||
msleep(10);
|
||||
crec_msleep(10);
|
||||
gpio_set_level(GPIO_EN_PP3300_TP_ODL, 0);
|
||||
msleep(10);
|
||||
crec_msleep(10);
|
||||
#endif
|
||||
}
|
||||
#endif /* !HAS_NO_TOUCHPAD */
|
||||
|
@ -300,7 +300,7 @@ int board_get_entropy(void *buffer, int len)
|
|||
while (!(STM32_CRS_ISR & STM32_CRS_ISR_SYNCOKF)) {
|
||||
if ((__hw_clock_source_read() - start) > timeout)
|
||||
return 0;
|
||||
usleep(500);
|
||||
crec_usleep(500);
|
||||
}
|
||||
/* Pick 8 bits, including FEDIR and 7 LSB of FECAP. */
|
||||
data[i] = STM32_CRS_ISR >> 15;
|
||||
|
|
|
@ -549,7 +549,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
}
|
||||
|
|
|
@ -332,7 +332,7 @@ static void dap_reset_target(size_t peek_c)
|
|||
|
||||
if (shield_reset_pin != GPIO_COUNT) {
|
||||
gpio_set_level(shield_reset_pin, false);
|
||||
usleep(100000);
|
||||
crec_usleep(100000);
|
||||
gpio_set_level(shield_reset_pin, true);
|
||||
tx_buffer[2] = 1;
|
||||
} else {
|
||||
|
@ -367,7 +367,7 @@ static void dap_swj_pins(size_t peek_c)
|
|||
if ((pin_mask & PIN_Reset) && shield_reset_pin != GPIO_COUNT)
|
||||
gpio_set_level(shield_reset_pin, !!(pin_value & PIN_Reset));
|
||||
|
||||
usleep(wait_us);
|
||||
crec_usleep(wait_us);
|
||||
|
||||
tx_buffer[1] = 0;
|
||||
queue_add_units(&cmsis_dap_tx_queue, tx_buffer, 2);
|
||||
|
|
|
@ -243,7 +243,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -324,7 +324,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -259,7 +259,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -175,10 +175,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
gpio_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -196,14 +196,14 @@ void board_reset_pd_mcu(void)
|
|||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(GPIO_USB_C0_RT_RST_ODL, 1);
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
|
||||
|
||||
/* wait for chips to come up */
|
||||
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
static void board_tcpc_init(void)
|
||||
|
|
|
@ -252,7 +252,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -267,7 +267,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -248,10 +248,10 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8805_FW_INIT_DELAY_MS);
|
||||
}
|
||||
|
||||
void board_set_tcpc_power_mode(int port, int mode)
|
||||
|
|
|
@ -103,12 +103,12 @@ void board_reset_pd_mcu(void)
|
|||
/*
|
||||
* delay for power-on to reset-off and min. assertion time
|
||||
*/
|
||||
msleep(20);
|
||||
crec_msleep(20);
|
||||
|
||||
gpio_set_level(GPIO_USB_C0_RT_RST_R_ODL, 1);
|
||||
|
||||
/* wait for chips to come up */
|
||||
msleep(50);
|
||||
crec_msleep(50);
|
||||
}
|
||||
|
||||
static void board_tcpc_init(void)
|
||||
|
|
|
@ -263,7 +263,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -513,7 +513,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -290,7 +290,7 @@ static void board_init(void)
|
|||
/* If the reset cause is external, pulse PMIC force reset. */
|
||||
if (system_get_reset_flags() == EC_RESET_FLAG_RESET_PIN) {
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
|
||||
msleep(100);
|
||||
crec_msleep(100);
|
||||
gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
|
||||
}
|
||||
|
||||
|
|
|
@ -128,10 +128,10 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
|
|||
* Allow 1ms time for the retimer to power up lc_domain
|
||||
* which powers I2C controller within retimer
|
||||
*/
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
} else {
|
||||
gpio_set_level(rst_signal, 0);
|
||||
msleep(1);
|
||||
crec_msleep(1);
|
||||
}
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
@ -143,9 +143,9 @@ __override int bb_retimer_reset(const struct usb_mux *me)
|
|||
* QS Silicon is complete
|
||||
*/
|
||||
bb_retimer_power_enable(me, false);
|
||||
msleep(5);
|
||||
crec_msleep(5);
|
||||
bb_retimer_power_enable(me, true);
|
||||
msleep(25);
|
||||
crec_msleep(25);
|
||||
|
||||
return EC_SUCCESS;
|
||||
}
|
||||
|
|
|
@ -650,7 +650,7 @@ __override void board_pulse_entering_rw(void)
|
|||
*/
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 1);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 1);
|
||||
usleep(MSEC);
|
||||
crec_usleep(MSEC);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW, 0);
|
||||
gpio_set_level(GPIO_EC_ENTERING_RW2, 0);
|
||||
}
|
||||
|
|
|
@ -286,7 +286,7 @@ void board_reset_pd_mcu(void)
|
|||
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 0);
|
||||
msleep(PS8XXX_RESET_DELAY_MS);
|
||||
crec_msleep(PS8XXX_RESET_DELAY_MS);
|
||||
gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
|
||||
gpio_set_level(GPIO_USB_C1_PD_RST_L, 1);
|
||||
}
|
||||
|
|
|
@ -411,9 +411,10 @@ static void ps8815_reset(void)
|
|||
int val;
|
||||
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 0);
|
||||
msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
crec_msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS,
|
||||
PS8815_PWR_H_RST_H_DELAY_MS));
|
||||
gpio_set_level(GPIO_USB_C1_RT_RST_ODL, 1);
|
||||
msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
crec_msleep(PS8815_FW_INIT_DELAY_MS);
|
||||
|
||||
/*
|
||||
* b/144397088
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue