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i2c: add support for i2c bit-banging 

Krane/Jacuzzi need a 100KHz SMBus port for battery, in addition to the
existing two i2c ports.

This CL adds a bit-bang driver that supports i2c/smbus bit-banging
through a set of pre-defined gpio pins.

BUG=b:138161741,b:138415463
TEST=On a reworked jacuzzi (battery i2c connected to other gpios),
     1) `battery` shows reasonable output (this verifies i2c_readN,
     i2c_read_string)
     2) `i2cscan` works for port 3 (bitbang port)
     3) `cutoff` (verifies i2c_writeN)
     4) `i2ctest` stress test
BRANCH=master

Change-Id: I78020e5c51707c3d9f0fd54f2c299e2f29cabe2f
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1765110
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
This commit is contained in:
Ting Shen 2019-10-23 20:02:10 +08:00 committed by Commit Bot
parent 7c89289e32
commit 7b61704fd1
11 changed files with 652 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
board/host/gpio.inc
View File

@ -31,3 +31,6 @@ GPIO(BASE_CHG_VDD_EN, PIN(0, 12), 0)
GPIO(SPI1_NSS, PIN(0, 13), GPIO_OUT_HIGH)
GPIO(USB_C0_DISCHARGE, PIN(0, 15), 0)
GPIO(I2C_SCL, PIN(0, 16), GPIO_INPUT)
GPIO(I2C_SDA, PIN(0, 17), GPIO_INPUT)

1
common/build.mk
View File

@ -86,6 +86,7 @@ common-$(CONFIG_HOSTCMD_RTC)+=rtc.o
common-$(CONFIG_I2C_DEBUG)+=i2c_trace.o
common-$(CONFIG_I2C_MASTER)+=i2c_master.o
common-$(CONFIG_I2C_SLAVE)+=i2c_slave.o
common-$(CONFIG_I2C_BITBANG)+=i2c_bitbang.o
common-$(CONFIG_I2C_VIRTUAL_BATTERY)+=virtual_battery.o
common-$(CONFIG_INDUCTIVE_CHARGING)+=inductive_charging.o
common-$(CONFIG_KEYBOARD_PROTOCOL_8042)+=keyboard_8042.o \

363
common/i2c_bitbang.c Normal file
View File

@ -0,0 +1,363 @@
/* Copyright 2019 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "console.h"
#include "gpio.h"
#include "i2c_bitbang.h"
#include "task.h"
#include "timer.h"
#include "util.h"
#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
static int started;
/* TODO: respect i2c_port->kbps setting */
static void i2c_delay(void)
{
udelay(5);
}
/* Number of attempts to unwedge each pin. */
#define UNWEDGE_SCL_ATTEMPTS 10
#define UNWEDGE_SDA_ATTEMPTS 3
static void i2c_bitbang_unwedge(const struct i2c_port_t *i2c_port)
{
int i, j;
gpio_set_level(i2c_port->scl, 1);
/*
* If clock is low, wait for a while in case of clock stretched
* by a slave.
*/
if (!gpio_get_level(i2c_port->scl)) {
for (i = 0;; i++) {
if (i >= UNWEDGE_SCL_ATTEMPTS) {
/*
* If we get here, a slave is holding the clock
* low and there is nothing we can do.
*/
CPRINTS("I2C%d unwedge failed, "
"SCL is held low", i2c_port->port);
return;
}
i2c_delay();
if (gpio_get_level(i2c_port->scl))
break;
}
}
if (gpio_get_level(i2c_port->sda))
return;
CPRINTS("I2C%d unwedge called with SDA held low", i2c_port->port);
/* Keep trying to unwedge the SDA line until we run out of attempts. */
for (i = 0; i < UNWEDGE_SDA_ATTEMPTS; i++) {
/* Drive the clock high. */
gpio_set_level(i2c_port->scl, 0);
i2c_delay();
/*
* Clock through the problem by clocking out 9 bits. If slave
* releases the SDA line, then we can stop clocking bits and
* send a STOP.
*/
for (j = 0; j < 9; j++) {
if (gpio_get_level(i2c_port->sda))
break;
gpio_set_level(i2c_port->scl, 0);
i2c_delay();
gpio_set_level(i2c_port->scl, 1);
i2c_delay();
}
/* Take control of SDA line and issue a STOP command. */
gpio_set_level(i2c_port->sda, 0);
i2c_delay();
gpio_set_level(i2c_port->sda, 1);
i2c_delay();
/* Check if the bus is unwedged. */
if (gpio_get_level(i2c_port->sda) &&
gpio_get_level(i2c_port->scl))
break;
}
if (!gpio_get_level(i2c_port->sda))
CPRINTS("I2C%d unwedge failed, SDA still low", i2c_port->port);
if (!gpio_get_level(i2c_port->scl))
CPRINTS("I2C%d unwedge failed, SCL still low", i2c_port->port);
}
static void i2c_stop_cond(const struct i2c_port_t *i2c_port)
{
int i;
if (!started)
return;
gpio_set_level(i2c_port->sda, 0);
i2c_delay();
gpio_set_level(i2c_port->scl, 1);
/*
* SMBus 3.0, 4.2.5
*
* the recommendation is that if SMBDAT is still low tTIMEOUT,MAX after
* SMBCLK has gone high at the end of a transaction the master should
* hold SMBCLK low for at least tTIMEOUT,MAX in an attempt to reset the
* SMBus interface of all of the devices on the bus.
*/
for (i = 0; i < 7000; i++) {
if (gpio_get_level(i2c_port->scl))
break;
i2c_delay();
}
i2c_delay();
/* SCL is high, set SDA from 0 to 1 */
gpio_set_level(i2c_port->sda, 1);
i2c_delay();
started = 0;
}
static int clock_stretching(const struct i2c_port_t *i2c_port)
{
int i;
i2c_delay();
/* 5us * 7000 iterations ~= 35ms */
for (i = 0; i < 7000; i++) {
if (gpio_get_level(i2c_port->scl))
return 0;
i2c_delay();
}
/*
* SMBus 3.0, Note 3
* Devices participating in a transfer can abort the transfer in
* progress and release the bus when any single clock low interval
* exceeds the value of tTIMEOUT,MIN(=25ms).
* After the master in a transaction detects this condition, it must
* generate a stop condition within or after the current data byte in
* the transfer process.
*/
i2c_stop_cond(i2c_port);
CPRINTS("clock low timeout");
return EC_ERROR_TIMEOUT;
}
static int i2c_start_cond(const struct i2c_port_t *i2c_port)
{
int err;
if (started) {
gpio_set_level(i2c_port->sda, 1);
i2c_delay();
gpio_set_level(i2c_port->scl, 1);
err = clock_stretching(i2c_port);
if (err)
return err;
i2c_delay();
if (gpio_get_level(i2c_port->sda) == 0) {
CPRINTS("%s: arbitration lost", __func__);
started = 0;
return EC_ERROR_UNKNOWN;
}
}
/* check if bus is idle before starting */
if (gpio_get_level(i2c_port->scl) == 0 ||
gpio_get_level(i2c_port->sda) == 0)
return EC_ERROR_UNKNOWN;
gpio_set_level(i2c_port->sda, 0);
i2c_delay();
gpio_set_level(i2c_port->scl, 0);
started = 1;
return 0;
}
static int i2c_write_bit(const struct i2c_port_t *i2c_port, int bit)
{
int err;
gpio_set_level(i2c_port->sda, !!bit);
i2c_delay();
gpio_set_level(i2c_port->scl, 1);
err = clock_stretching(i2c_port);
if (err)
return err;
i2c_delay();
if (bit && gpio_get_level(i2c_port->sda) == 0) {
CPRINTS("%s: arbitration lost", __func__);
started = 0;
return EC_ERROR_UNKNOWN;
}
gpio_set_level(i2c_port->scl, 0);
return 0;
}
static int i2c_read_bit(const struct i2c_port_t *i2c_port, int *bit)
{
int err;
gpio_set_level(i2c_port->sda, 1);
i2c_delay();
gpio_set_level(i2c_port->scl, 1);
err = clock_stretching(i2c_port);
if (err)
return err;
i2c_delay();
*bit = gpio_get_level(i2c_port->sda);
gpio_set_level(i2c_port->scl, 0);
return 0;
}
static int i2c_write_byte(const struct i2c_port_t *i2c_port, uint8_t byte)
{
int i, nack, err;
for (i = 7; i >= 0; i--) {
err = i2c_write_bit(i2c_port, byte & (1 << i));
if (err)
return err;
}
err = i2c_read_bit(i2c_port, &nack);
if (err)
return err;
if (nack) {
/*
* The slave device detects an invalid command or invalid data.
* In this case the slave device must NACK the received byte.
* The master upon detection of this condition must generate a
* STOP condition and retry the transaction
*/
i2c_stop_cond(i2c_port);
/* return EC_ERROR_BUSY to indicate i2c_xfer() to retry */
return EC_ERROR_BUSY;
}
return 0;
}
static int i2c_read_byte(const struct i2c_port_t *i2c_port, uint8_t *byte,
int nack)
{
int i;
*byte = 0;
for (i = 0; i < 8; i++) {
int bit = 0, err;
err = i2c_read_bit(i2c_port, &bit);
if (err)
return err;
*byte = (*byte << 1) | bit;
}
return i2c_write_bit(i2c_port, nack);
}
static int i2c_bitbang_xfer(const struct i2c_port_t *i2c_port,
const uint16_t slave_addr_flags,
const uint8_t *out, int out_size,
uint8_t *in, int in_size, int flags)
{
uint16_t addr_8bit = slave_addr_flags << 1, err = EC_SUCCESS;
int i = 0;
if (i2c_port->kbps != 100)
CPRINTS("warning: bitbang driver only supports 100kbps");
if (out_size) {
if (flags & I2C_XFER_START) {
err = i2c_start_cond(i2c_port);
if (err)
goto exit;
err = i2c_write_byte(i2c_port, addr_8bit);
if (err)
goto exit;
}
for (i = 0; i < out_size; i++) {
err = i2c_write_byte(i2c_port, out[i]);
if (err)
goto exit;
}
}
if (in_size) {
if (flags & I2C_XFER_START) {
err = i2c_start_cond(i2c_port);
if (err)
goto exit;
err = i2c_write_byte(i2c_port, addr_8bit | 1);
if (err)
goto exit;
}
for (i = 0; i < in_size; i++) {
err = i2c_read_byte(i2c_port, &in[i],
(flags & I2C_XFER_STOP) && (i == in_size - 1));
if (err)
goto exit;
}
}
if (flags & I2C_XFER_STOP)
i2c_stop_cond(i2c_port);
exit:
if (err) {
i2c_bitbang_unwedge(i2c_port);
started = 0;
}
return err;
}
const struct i2c_drv bitbang_drv = {
.xfer = &i2c_bitbang_xfer
};
#ifdef TEST_BUILD
int bitbang_start_cond(const struct i2c_port_t *i2c_port)
{
return i2c_start_cond(i2c_port);
}
void bitbang_stop_cond(const struct i2c_port_t *i2c_port)
{
i2c_stop_cond(i2c_port);
}
int bitbang_write_byte(const struct i2c_port_t *i2c_port, uint8_t byte)
{
return i2c_write_byte(i2c_port, byte);
}
void bitbang_set_started(int val)
{
started = val;
}
#endif

37
common/i2c_master.c
View File

@ -13,6 +13,7 @@
#include "host_command.h"
#include "gpio.h"
#include "i2c.h"
#include "i2c_bitbang.h"
#include "system.h"
#include "task.h"
#include "usb_pd.h"
@ -37,11 +38,15 @@
#define I2C_CONTROLLER_COUNT I2C_PORT_COUNT
#endif
static struct mutex port_mutex[I2C_CONTROLLER_COUNT];
#ifndef CONFIG_I2C_BITBANG
#define I2C_BITBANG_PORT_COUNT 0
#endif
static struct mutex port_mutex[I2C_CONTROLLER_COUNT + I2C_BITBANG_PORT_COUNT];
/* A bitmap of the controllers which are currently servicing a request. */
static uint32_t i2c_port_active_list;
BUILD_ASSERT(I2C_CONTROLLER_COUNT < 32);
static uint8_t port_protected[I2C_PORT_COUNT];
BUILD_ASSERT(ARRAY_SIZE(port_mutex) < 32);
static uint8_t port_protected[I2C_PORT_COUNT + I2C_BITBANG_PORT_COUNT];
/**
* Non-deterministically test the lock status of the port. If another task
@ -73,6 +78,13 @@ const struct i2c_port_t *get_i2c_port(const int port)
return &i2c_ports[i];
}
if (IS_ENABLED(CONFIG_I2C_BITBANG)) {
for (i = 0; i < i2c_bitbang_ports_used; i++) {
if (i2c_bitbang_ports[i].port == port)
return &i2c_bitbang_ports[i];
}
}
return NULL;
}
@ -83,6 +95,7 @@ static int chip_i2c_xfer_with_notify(const int port,
{
int ret;
uint16_t addr_flags = slave_addr_flags;
const struct i2c_port_t *i2c_port = get_i2c_port(port);
if (IS_ENABLED(CONFIG_I2C_DEBUG))
i2c_trace_notify(port, slave_addr_flags, 0, out, out_size);
@ -96,8 +109,12 @@ static int chip_i2c_xfer_with_notify(const int port,
* remove the flag so it won't confuse chip driver.
*/
addr_flags &= ~I2C_FLAG_PEC;
ret = chip_i2c_xfer(port, addr_flags, out, out_size, in, in_size,
flags);
if (i2c_port->drv)
ret = i2c_port->drv->xfer(i2c_port, addr_flags,
out, out_size, in, in_size, flags);
else
ret = chip_i2c_xfer(port, addr_flags,
out, out_size, in, in_size, flags);
if (IS_ENABLED(CONFIG_I2C_XFER_BOARD_CALLBACK))
i2c_end_xfer_notify(port, slave_addr_flags);
@ -226,7 +243,7 @@ void i2c_prepare_sysjump(void)
int i;
/* Lock all i2c controllers */
for (i = 0; i < I2C_CONTROLLER_COUNT; ++i)
for (i = 0; i < ARRAY_SIZE(port_mutex); ++i)
mutex_lock(port_mutex + i);
}
@ -1163,7 +1180,7 @@ DECLARE_HOST_COMMAND(EC_CMD_I2C_PASSTHRU, i2c_command_passthru, EC_VER_MASK(0));
static void i2c_passthru_protect_port(uint32_t port)
{
if (port < I2C_PORT_COUNT)
if (port < ARRAY_SIZE(port_protected))
port_protected[port] = 1;
else
PTHRUPRINTS("Invalid I2C port %d to be protected\n", port);
@ -1322,6 +1339,12 @@ static int command_scan(int argc, char **argv)
if (argc == 1) {
for (port = 0; port < i2c_ports_used; port++)
scan_bus(i2c_ports[port].port, i2c_ports[port].name);
if (IS_ENABLED(CONFIG_I2C_BITBANG))
for (port = 0; port < i2c_bitbang_ports_used; port++)
scan_bus(i2c_bitbang_ports[port].port,
i2c_bitbang_ports[port].name);
return EC_SUCCESS;
}

12
include/config.h
View File

@ -2306,6 +2306,18 @@
*/
#undef CONFIG_I2C_MULTI_PORT_CONTROLLER
/*
* Enable I2C bitbang driver.
*
* If defined, the board must define array i2c_bitbang_ports[] and
* i2c_bitbang_ports_count (same as i2c_ports/i2c_ports_count), but with
* port number starting from I2C_PORT_COUNT, and .drv=&bitbang_drv.
*
* For example:
* {"battery", 2, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA, .drv = &bitbang_drv},
*/
#undef CONFIG_I2C_BITBANG
/*
* Packet error checking support for SMBus.
*

10
include/i2c.h
View File

@ -92,6 +92,15 @@ struct i2c_info_t {
uint16_t addr_flags;
};
struct i2c_port_t; /* forward declaration */
struct i2c_drv {
int (*xfer)(const struct i2c_port_t *i2c_port,
const uint16_t slave_addr_flags,
const uint8_t *out, int out_size,
uint8_t *in, int in_size, int flags);
};
/* Data structure to define I2C port configuration. */
struct i2c_port_t {
const char *name; /* Port name */
@ -103,6 +112,7 @@ struct i2c_port_t {
* If the function is not defined, the default value is true. */
int (*passthru_allowed)(const struct i2c_port_t *port,
uint16_t addr_flags);
const struct i2c_drv *drv;
};
extern const struct i2c_port_t i2c_ports[];

23
include/i2c_bitbang.h Normal file
View File

@ -0,0 +1,23 @@
/* Copyright 2019 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#ifndef __CROS_EC_I2C_BITBANG_H
#define __CROS_EC_I2C_BITBANG_H
#include "i2c.h"
extern const struct i2c_drv bitbang_drv;
extern const struct i2c_port_t i2c_bitbang_ports[];
extern const unsigned int i2c_bitbang_ports_used;
/* expose static functions for testing */
#ifdef TEST_BUILD
int bitbang_start_cond(const struct i2c_port_t *i2c_port);
void bitbang_stop_cond(const struct i2c_port_t *i2c_port);
int bitbang_write_byte(const struct i2c_port_t *i2c_port, uint8_t byte);
void bitbang_set_started(int val);
#endif
#endif /* __CROS_EC_I2C_BITBANG_H */

2
test/build.mk
View File

@ -33,6 +33,7 @@ test-list-host += fp
test-list-host += fpsensor
test-list-host += hooks
test-list-host += host_command
test-list-host += i2c_bitbang
test-list-host += inductive_charging
test-list-host += interrupt
test-list-host += is_enabled
@ -109,6 +110,7 @@ flash_log-y=flash_log.o
fpsensor-y=fpsensor.o
hooks-y=hooks.o
host_command-y=host_command.o
i2c_bitbang-y=i2c_bitbang.o
inductive_charging-y=inductive_charging.o
interrupt-y=interrupt.o
is_enabled-y=is_enabled.o

192
test/i2c_bitbang.c Normal file
View File

@ -0,0 +1,192 @@
/* Copyright 2019 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
#include "console.h"
#include "i2c.h"
#include "i2c_bitbang.h"
#include "test_util.h"
#include "util.h"
const struct i2c_port_t i2c_bitbang_ports[] = {
{"", 0, 100, GPIO_I2C_SCL, GPIO_I2C_SDA}
};
const unsigned int i2c_bitbang_ports_used = 1;
struct pin_state {
int scl, sda;
} history[64];
int history_count;
void reset_state(void)
{
history[0] = (struct pin_state) {1, 1};
history_count = 1;
bitbang_set_started(0);
}
void gpio_set_level(enum gpio_signal signal, int level)
{
struct pin_state new = history[history_count - 1];
/* reject if stack is full */
if (history_count >= ARRAY_SIZE(history))
return;
if (signal == GPIO_I2C_SDA)
new.sda = level;
else if (signal == GPIO_I2C_SCL)
new.scl = level;
if (new.scl != history[history_count - 1].scl ||
new.sda != history[history_count - 1].sda)
history[history_count++] = new;
}
int gpio_get_level(enum gpio_signal signal)
{
if (signal == GPIO_I2C_SDA)
return history[history_count - 1].sda;
else if (signal == GPIO_I2C_SCL)
return history[history_count - 1].scl;
return 0;
}
static int test_i2c_start_stop(void)
{
struct pin_state expected[] = {
/* start */
{1, 1},
{1, 0},
{0, 0},
/* stop */
{1, 0},
{1, 1},
};
int i;
reset_state();
bitbang_start_cond(&i2c_bitbang_ports[0]);
bitbang_stop_cond(&i2c_bitbang_ports[0]);
TEST_EQ((int)ARRAY_SIZE(expected), history_count, "%d");
for (i = 0; i < ARRAY_SIZE(expected); i++) {
TEST_EQ(expected[i].scl, history[i].scl, "%d");
TEST_EQ(expected[i].sda, history[i].sda, "%d");
}
return EC_SUCCESS;
}
static int test_i2c_repeated_start(void)
{
struct pin_state expected[] = {
/* start */
{1, 1},
{1, 0},
{0, 0},
/* repeated start */
{0, 1},
{1, 1},
{1, 0},
{0, 0},
};
int i;
reset_state();
bitbang_start_cond(&i2c_bitbang_ports[0]);
bitbang_start_cond(&i2c_bitbang_ports[0]);
TEST_EQ((int)ARRAY_SIZE(expected), history_count, "%d");
for (i = 0; i < ARRAY_SIZE(expected); i++) {
TEST_EQ(expected[i].scl, history[i].scl, "%d");
TEST_EQ(expected[i].sda, history[i].sda, "%d");
}
return EC_SUCCESS;
}
static int test_i2c_write(void)
{
struct pin_state expected[] = {
/* start */
{1, 1},
{1, 0},
{0, 0},
/* bit 7: 0 */
{1, 0},
{0, 0},
/* bit 6: 1 */
{0, 1},
{1, 1},
{0, 1},
/* bit 5: 0 */
{0, 0},
{1, 0},
{0, 0},
/* bit 4: 1 */
{0, 1},
{1, 1},
{0, 1},
/* bit 3: 0 */
{0, 0},
{1, 0},
{0, 0},
/* bit 2: 1 */
{0, 1},
{1, 1},
{0, 1},
/* bit 1: 1 */
{1, 1},
{0, 1},
/* bit 0: 0 */
{0, 0},
{1, 0},
{0, 0},
/* read bit */
{0, 1},
{1, 1},
{0, 1},
/* stop */
{0, 0},
{1, 0},
{1, 1},
};
int i, ret;
reset_state();
bitbang_start_cond(&i2c_bitbang_ports[0]);
ret = bitbang_write_byte(&i2c_bitbang_ports[0], 0x56);
/* expected to fail because no slave answering the nack bit */
TEST_EQ(EC_ERROR_BUSY, ret, "%d");
TEST_EQ((int)ARRAY_SIZE(expected), history_count, "%d");
for (i = 0; i < ARRAY_SIZE(expected); i++) {
TEST_EQ(expected[i].scl, history[i].scl, "%d");
TEST_EQ(expected[i].sda, history[i].sda, "%d");
}
return EC_SUCCESS;
}
void run_test(void)
{
test_reset();
RUN_TEST(test_i2c_start_stop);
RUN_TEST(test_i2c_repeated_start);
RUN_TEST(test_i2c_write);
test_print_result();
}

9
test/i2c_bitbang.tasklist Normal file
View File

@ -0,0 +1,9 @@
/* Copyright 2019 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/**
* See CONFIG_TASK_LIST in config.h for details.
*/
#define CONFIG_TEST_TASK_LIST

7
test/test_config.h
View File

@ -475,5 +475,12 @@ enum nvmem_users { NVMEM_TPM = 0, NVMEM_CR50, NVMEM_NUM_USERS };
#define CONFIG_CURVE25519
#endif /* TEST_X25519 */
#ifdef TEST_I2C_BITBANG
#define CONFIG_I2C
#define CONFIG_I2C_MASTER
#define CONFIG_I2C_BITBANG
#define I2C_BITBANG_PORT_COUNT 1
#endif
#endif /* TEST_BUILD */
#endif /* __TEST_TEST_CONFIG_H */