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cleanup: Remove 'ryu' board 

Remove 'ryu' and related ryu-only code.

 Conflicts:
	board/ryu/board.c
	board/ryu/board.h
	include/config.h
	power/build.mk
	util/genvif.c

BUG=None
TEST=`make buildall -j`
BRANCH=None

Change-Id: I19b966ea6964a7ed083724f7de80ae192235a406
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/656314
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit f67f1a9b78)
Reviewed-on: https://chromium-review.googlesource.com/660895
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
This commit is contained in:
Shawn Nematbakhsh 2017-09-07 14:28:27 -07:00 committed by ChromeOS Commit Bot
parent 6db5e458f8
commit 735fba4967
17 changed files with 1 additions and 2709 deletions
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225
board/ryu/battery.c
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@ -1,225 +0,0 @@
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Battery pack vendor provided charging profile
*/
#include "battery.h"
#include "charge_state.h"
#include "console.h"
#include "ec_commands.h"
#include "i2c.h"
#include "util.h"
/* Battery temperature ranges in degrees C */
static const struct battery_info info = {
/* Design voltage */
.voltage_max = 4350,
.voltage_normal = 3800,
.voltage_min = 2800,
/* Pre-charge current: I <= 0.01C */
.precharge_current = 64, /* mA */
/* Operational temperature range */
.start_charging_min_c = 5,
.start_charging_max_c = 48,
.charging_min_c = 5,
.charging_max_c = 48,
.discharging_min_c = -20,
.discharging_max_c = 60,
};
const struct battery_info *battery_get_info(void)
{
return &info;
}
int board_cut_off_battery(void)
{
/* Write SET_SHUTDOWN(0x13) to CTRL(0x00) */
return i2c_write16(I2C_PORT_BATTERY, 0xaa, 0x0, 0x13);
}
#ifdef CONFIG_CHARGER_PROFILE_OVERRIDE
static int fast_charging_allowed = 1;
/*
* This can override the smart battery's charging profile. To make a change,
* modify one or more of requested_voltage, requested_current, or state.
* Leave everything else unchanged.
*
* Return the next poll period in usec, or zero to use the default (which is
* state dependent).
*/
int charger_profile_override(struct charge_state_data *curr)
{
/* temp in 0.1 deg C */
int temp_c = curr->batt.temperature - 2731;
/* keep track of last temperature range for hysteresis */
static enum {
TEMP_RANGE_1,
TEMP_RANGE_2,
TEMP_RANGE_3,
TEMP_RANGE_4,
TEMP_RANGE_5,
} temp_range = TEMP_RANGE_3;
/* keep track of last voltage range for hysteresis */
static enum {
VOLTAGE_RANGE_LOW,
VOLTAGE_RANGE_HIGH,
} voltage_range = VOLTAGE_RANGE_LOW;
/* Current and previous battery voltage */
int batt_voltage;
static int prev_batt_voltage;
/*
* Determine temperature range. The five ranges are:
* < 10C
* 10-15C
* 15-23C
* 23-45C
* > 45C
*
* Add 0.2 degrees of hysteresis.
* If temp reading was bad, use last range.
*/
if (!(curr->batt.flags & BATT_FLAG_BAD_TEMPERATURE)) {
/* Don't charge if outside of allowable temperature range */
if (temp_c >= info.charging_max_c * 10 ||
temp_c < info.charging_min_c * 10) {
curr->requested_current = 0;
curr->requested_voltage = 0;
return 0;
}
if (temp_c < 99)
temp_range = TEMP_RANGE_1;
else if (temp_c > 101 && temp_c < 149)
temp_range = TEMP_RANGE_2;
else if (temp_c > 151 && temp_c < 229)
temp_range = TEMP_RANGE_3;
else if (temp_c > 231 && temp_c < 449)
temp_range = TEMP_RANGE_4;
else if (temp_c > 451)
temp_range = TEMP_RANGE_5;
}
/*
* If battery voltage reading is bad, use the last reading. Otherwise,
* determine voltage range with 20mV * hysteresis.
*/
if (curr->batt.flags & BATT_FLAG_BAD_VOLTAGE) {
batt_voltage = prev_batt_voltage;
} else {
batt_voltage = prev_batt_voltage = curr->batt.voltage;
if (batt_voltage < 4130)
voltage_range = VOLTAGE_RANGE_LOW;
else if (batt_voltage > 4150)
voltage_range = VOLTAGE_RANGE_HIGH;
}
/*
* If we are not charging or we aren't using fast charging profiles,
* then do not override desired current and voltage.
*/
if (curr->state != ST_CHARGE || !fast_charging_allowed)
return 0;
/*
* Okay, impose our custom will:
* When battery is 5-10C:
* CC at 900mA @ 4.35V
* CV at 4.35V until current drops to 450mA
*
* When battery is <15C:
* CC at 2700mA @ 4.35V
* CV at 4.35V until current drops to 450mA
*
* When battery is <23C:
* CC at 6300mA until 4.15V @ 4.35V
* CC at 4500mA @ 4.35V
* CV at 4.35V until current drops to 450mA
*
* When battery is <45C:
* CC at 9000mA until 4.15V @ 4.35V
* CC at 4500mA @ 4.35V
* CV at 4.35V until current drops to 450mA
*
* When battery is >45C:
* CC at 4500mA @ 4.15V
* CV at 4.15V (when battery is hot we don't go to fully charged)
*/
switch (temp_range) {
case TEMP_RANGE_1:
curr->requested_current = 900;
curr->requested_voltage = 4350;
break;
case TEMP_RANGE_2:
curr->requested_current = 2700;
curr->requested_voltage = 4350;
break;
case TEMP_RANGE_3:
curr->requested_voltage = 4350;
if (voltage_range == VOLTAGE_RANGE_HIGH)
curr->requested_current = 4500;
else
curr->requested_current = 6300;
break;
case TEMP_RANGE_4:
curr->requested_voltage = 4350;
if (voltage_range == VOLTAGE_RANGE_HIGH)
curr->requested_current = 4500;
else
curr->requested_current = 9000;
break;
case TEMP_RANGE_5:
curr->requested_current = 4500;
curr->requested_voltage = 4150;
break;
}
return 0;
}
/* Customs options controllable by host command. */
#define PARAM_FASTCHARGE (CS_PARAM_CUSTOM_PROFILE_MIN + 0)
enum ec_status charger_profile_override_get_param(uint32_t param,
uint32_t *value)
{
if (param == PARAM_FASTCHARGE) {
*value = fast_charging_allowed;
return EC_RES_SUCCESS;
}
return EC_RES_INVALID_PARAM;
}
enum ec_status charger_profile_override_set_param(uint32_t param,
uint32_t value)
{
if (param == PARAM_FASTCHARGE) {
fast_charging_allowed = value;
return EC_RES_SUCCESS;
}
return EC_RES_INVALID_PARAM;
}
#ifdef CONFIG_CMD_FASTCHARGE
static int command_fastcharge(int argc, char **argv)
{
if (argc > 1 && !parse_bool(argv[1], &fast_charging_allowed))
return EC_ERROR_PARAM1;
ccprintf("fastcharge %s\n", fast_charging_allowed ? "on" : "off");
return EC_SUCCESS;
}
DECLARE_CONSOLE_COMMAND(fastcharge, command_fastcharge,
"[on|off]",
"Get or set fast charging profile");
#endif /* CONFIG_CMD_FASTCHARGE */
#endif /* CONFIG_CHARGER_PROFILE_OVERRIDE */

751
board/ryu/board.c
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@ -1,751 +0,0 @@
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* ryu board configuration */
#include "adc.h"
#include "adc_chip.h"
#include "atomic.h"
#include "battery.h"
#include "case_closed_debug.h"
#include "charge_manager.h"
#include "charge_ramp.h"
#include "charge_state.h"
#include "charger.h"
#include "common.h"
#include "console.h"
#include "driver/accelgyro_bmi160.h"
#include "driver/als_si114x.h"
#include "ec_version.h"
#include "gesture.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
#include "i2c.h"
#include "inductive_charging.h"
#include "lid_switch.h"
#include "lightbar.h"
#include "motion_sense.h"
#include "power.h"
#include "power_button.h"
#include "queue_policies.h"
#include "registers.h"
#include "spi.h"
#include "system.h"
#include "task.h"
#include "usb_charge.h"
#include "usb_descriptor.h"
#include "usb_pd.h"
#include "usb_spi.h"
#include "usb-stm32f3.h"
#include "usb-stream.h"
#include "usart-stm32f3.h"
#include "usart_tx_dma.h"
#include "util.h"
#include "pi3usb9281.h"
#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
/* VBUS too low threshold */
#define VBUS_LOW_THRESHOLD_MV 4600
/* Input current error margin */
#define IADP_ERROR_MARGIN_MA 100
static int charge_current_limit;
/*
* PD host event status for host command
* Note: this variable must be aligned on 4-byte boundary because we pass the
* address to atomic_ functions which use assembly to access them.
*/
static struct ec_response_host_event_status host_event_status __aligned(4);
void vbus_evt(enum gpio_signal signal)
{
usb_charger_vbus_change(0, gpio_get_level(signal));
task_wake(TASK_ID_PD_C0);
}
void usb_evt(enum gpio_signal signal)
{
task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0);
}
#include "gpio_list.h"
const void *const usb_strings[] = {
[USB_STR_DESC] = usb_string_desc,
[USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."),
[USB_STR_PRODUCT] = USB_STRING_DESC("Ryu debug"),
[USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32),
[USB_STR_CONSOLE_NAME] = USB_STRING_DESC("EC_PD"),
[USB_STR_AP_STREAM_NAME] = USB_STRING_DESC("AP"),
};
BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
/*
* Define AP console forwarding queue and associated USART and USB
* stream endpoints.
*/
static struct usart_config const ap_usart;
struct usb_stream_config const ap_usb;
static struct queue const ap_usart_to_usb = QUEUE_DIRECT(64, uint8_t,
ap_usart.producer,
ap_usb.consumer);
static struct queue const ap_usb_to_usart = QUEUE_DIRECT(64, uint8_t,
ap_usb.producer,
ap_usart.consumer);
static struct usart_tx_dma const ap_usart_tx_dma =
USART_TX_DMA(STM32_DMAC_USART1_TX, 16);
static struct usart_config const ap_usart =
USART_CONFIG(usart1_hw,
usart_rx_interrupt,
ap_usart_tx_dma.usart_tx,
115200,
ap_usart_to_usb,
ap_usb_to_usart);
#define AP_USB_STREAM_RX_SIZE 16
#define AP_USB_STREAM_TX_SIZE 16
USB_STREAM_CONFIG(ap_usb,
USB_IFACE_AP_STREAM,
USB_STR_AP_STREAM_NAME,
USB_EP_AP_STREAM,
AP_USB_STREAM_RX_SIZE,
AP_USB_STREAM_TX_SIZE,
ap_usb_to_usart,
ap_usart_to_usb)
struct pi3usb9281_config pi3usb9281_chips[] = {
{
.i2c_port = I2C_PORT_PERICOM,
.mux_lock = NULL,
}
};
BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) ==
CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT);
/* Initialize board. */
static void board_init(void)
{
int i;
/* Enable pericom BC1.2 interrupts. */
gpio_enable_interrupt(GPIO_USBC_BC12_INT_L);
/*
* Initialize AP console forwarding USART and queues.
*/
queue_init(&ap_usart_to_usb);
queue_init(&ap_usb_to_usart);
usart_init(&ap_usart);
/* Disable UART input when the Write Protect is enabled */
if (system_is_locked())
ap_usb.state->rx_disabled = 1;
/*
* Enable CC lines after all GPIO have been initialized. Note, it is
* important that this is enabled after the CC_DEVICE_ODL lines are
* set low to specify device mode.
*/
gpio_set_level(GPIO_USBC_CC_EN, 1);
/* Enable interrupts on VBUS transitions. */
gpio_enable_interrupt(GPIO_CHGR_ACOK);
/* Enable interrupts from BMI160 sensor. */
gpio_enable_interrupt(GPIO_ACC_IRQ1);
/* Enable interrupts from SI1141 sensor. */
gpio_enable_interrupt(GPIO_ALS_PROXY_INT_L);
if (board_has_spi_sensors()) {
for (i = MOTIONSENSE_TYPE_ACCEL;
i <= MOTIONSENSE_TYPE_MAG; i++) {
motion_sensors[i].addr =
BMI160_SET_SPI_ADDRESS(CONFIG_SPI_ACCEL_PORT);
}
/* SPI sensors: put back the GPIO in its expected state */
gpio_set_level(GPIO_SPI3_NSS, 1);
/* Enable SPI for BMI160 */
gpio_config_module(MODULE_SPI_MASTER, 1);
/* Set all four SPI3 pins to high speed */
/* pins C10/C11/C12 */
STM32_GPIO_OSPEEDR(GPIO_C) |= 0x03f00000;
/* pin A4 */
STM32_GPIO_OSPEEDR(GPIO_A) |= 0x00000300;
/* Enable clocks to SPI3 module */
STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI3;
/* Reset SPI3 */
STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI3;
STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI3;
spi_enable(CONFIG_SPI_ACCEL_PORT, 1);
CPRINTS("Board using SPI sensors");
} else { /* I2C sensors on rev v6/7/8 */
CPRINTS("Board using I2C sensors");
/*
* On EVT2, when the sensors are on the same bus as other
* sensors, motion task would not leave enough time for
* processing as soon as its frequency is around ~200Hz.
*/
motion_min_interval = 8 * MSEC;
}
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
static void board_startup_key_combo(void)
{
int vold = !gpio_get_level(GPIO_BTN_VOLD_L);
int volu = !gpio_get_level(GPIO_BTN_VOLU_L);
int pwr = power_button_signal_asserted();
/*
* Determine recovery mode is requested by the power and
* voldown buttons being pressed (while device was off).
*/
if (pwr && vold && !volu) {
host_set_single_event(EC_HOST_EVENT_KEYBOARD_RECOVERY);
CPRINTS("> RECOVERY mode");
}
/*
* Determine fastboot mode is requested by the power and
* voldown buttons being pressed (while device was off).
*/
if (pwr && volu && !vold) {
host_set_single_event(EC_HOST_EVENT_KEYBOARD_FASTBOOT);
CPRINTS("> FASTBOOT mode");
}
}
DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_startup_key_combo, HOOK_PRIO_DEFAULT);
/* power signal list. Must match order of enum power_signal. */
const struct power_signal_info power_signal_list[] = {
{GPIO_AP_HOLD, 1, "AP_HOLD"},
{GPIO_AP_IN_SUSPEND, 1, "SUSPEND_ASSERTED"},
};
BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
/* ADC channels */
const struct adc_t adc_channels[] = {
/* Vbus sensing. Converted to mV, /10 voltage divider. */
[ADC_VBUS] = {"VBUS", 30000, 4096, 0, STM32_AIN(0)},
/* USB PD CC lines sensing. Converted to mV (3000mV/4096). */
[ADC_CC1_PD] = {"CC1_PD", 3000, 4096, 0, STM32_AIN(1)},
[ADC_CC2_PD] = {"CC2_PD", 3000, 4096, 0, STM32_AIN(3)},
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
{"master", I2C_PORT_MASTER, 100,
GPIO_MASTER_I2C_SCL, GPIO_MASTER_I2C_SDA},
{"slave", I2C_PORT_SLAVE, 1000,
GPIO_SLAVE_I2C_SCL, GPIO_SLAVE_I2C_SDA},
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
/* SPI devices */
const struct spi_device_t spi_devices[] = {
{ CONFIG_SPI_FLASH_PORT, 0, GPIO_SPI_FLASH_NSS},
{ CONFIG_SPI_ACCEL_PORT, 1, GPIO_SPI3_NSS }
};
const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
/* Sensor mutex */
static struct mutex g_mutex;
struct bmi160_drv_data_t g_bmi160_data;
/* Matrix to rotate sensor vector into standard reference frame */
const matrix_3x3_t accelgyro_standard_ref = {
{FLOAT_TO_FP(-1), 0, 0},
{ 0, FLOAT_TO_FP(-1), 0},
{ 0, 0, FLOAT_TO_FP(1)}
};
const matrix_3x3_t mag_standard_ref = {
{ 0, FLOAT_TO_FP(1), 0},
{FLOAT_TO_FP(1), 0, 0},
{ 0, 0, FLOAT_TO_FP(-1)}
};
struct motion_sensor_t motion_sensors[] = {
/*
* Note: bmi160: supports accelerometer and gyro sensor
* Requirement: accelerometer sensor must init before gyro sensor
* DO NOT change the order of the following table.
*/
[RYU_LID_ACCEL] = {
.name = "Accel",
.active_mask = SENSOR_ACTIVE_S0_S3_S5,
.chip = MOTIONSENSE_CHIP_BMI160,
.type = MOTIONSENSE_TYPE_ACCEL,
.location = MOTIONSENSE_LOC_LID,
.drv = &bmi160_drv,
.mutex = &g_mutex,
.drv_data = &g_bmi160_data,
.port = I2C_PORT_ACCEL,
.addr = BMI160_ADDR0,
.rot_standard_ref = &accelgyro_standard_ref,
.default_range = 8, /* g, use hifi requirements */
.config = {
/* AP: by default shutdown all sensors */
[SENSOR_CONFIG_AP] = {
.odr = 0,
.ec_rate = 0,
},
/* Used for double tap */
[SENSOR_CONFIG_EC_S0] = {
.odr = TAP_ODR,
/* Interrupt driven, no polling */
.ec_rate = 0,
},
[SENSOR_CONFIG_EC_S3] = {
.odr = TAP_ODR,
.ec_rate = 0,
},
[SENSOR_CONFIG_EC_S5] = {
.odr = TAP_ODR,
.ec_rate = 0,
},
},
},
[RYU_LID_GYRO] = {
.name = "Gyro",
.active_mask = SENSOR_ACTIVE_S0_S3_S5,
.chip = MOTIONSENSE_CHIP_BMI160,
.type = MOTIONSENSE_TYPE_GYRO,
.location = MOTIONSENSE_LOC_LID,
.drv = &bmi160_drv,
.mutex = &g_mutex,
.drv_data = &g_bmi160_data,
.port = I2C_PORT_ACCEL,
.addr = BMI160_ADDR0,
.default_range = 1000, /* dps, use hifi requirement */
.rot_standard_ref = &accelgyro_standard_ref,
.config = {
/* AP: by default shutdown all sensors */
[SENSOR_CONFIG_AP] = {
.odr = 0,
.ec_rate = 0,
},
/* EC does not need gyro in S0 */
[SENSOR_CONFIG_EC_S0] = {
.odr = 0,
.ec_rate = 0,
},
/* Unused */
[SENSOR_CONFIG_EC_S3] = {
.odr = 0,
.ec_rate = 0,
},
[SENSOR_CONFIG_EC_S5] = {
.odr = 0,
.ec_rate = 0,
},
},
},
[RYU_LID_MAG] = {
.name = "Mag",
.active_mask = SENSOR_ACTIVE_S0_S3_S5,
.chip = MOTIONSENSE_CHIP_BMI160,
.type = MOTIONSENSE_TYPE_MAG,
.location = MOTIONSENSE_LOC_LID,
.drv = &bmi160_drv,
.mutex = &g_mutex,
.drv_data = &g_bmi160_data,
.port = I2C_PORT_ACCEL,
.addr = BMI160_ADDR0,
.rot_standard_ref = &mag_standard_ref,
.default_range = 1 << 11, /* 16LSB / uT, fixed */
.config = {
/* AP: by default shutdown all sensors */
[SENSOR_CONFIG_AP] = {
.odr = 0,
.ec_rate = 0,
},
/* EC does not need compass in S0 */
[SENSOR_CONFIG_EC_S0] = {
.odr = 0,
.ec_rate = 0,
},
/* Unused */
[SENSOR_CONFIG_EC_S3] = {
.odr = 0,
.ec_rate = 0,
},
[SENSOR_CONFIG_EC_S5] = {
.odr = 0,
.ec_rate = 0,
},
},
},
[RYU_LID_LIGHT] = {
.name = "Light",
.active_mask = SENSOR_ACTIVE_S0_S3_S5,
.chip = MOTIONSENSE_CHIP_SI1141,
.type = MOTIONSENSE_TYPE_LIGHT,
.location = MOTIONSENSE_LOC_LID,
.drv = &si114x_drv,
.mutex = &g_mutex,
.drv_data = &g_si114x_data,
.addr = SI114X_ADDR,
.rot_standard_ref = NULL,
.default_range = 9000, /* 90%: int = 0 - frac = 9000/10000 */
.config = {
/* AP: by default shutdown all sensors */
[SENSOR_CONFIG_AP] = {
.odr = 0,
.ec_rate = 0,
},
/* EC needs sensor for light adaptive brightness */
[SENSOR_CONFIG_EC_S0] = {
.odr = 1000,
.ec_rate = 0,
},
[SENSOR_CONFIG_EC_S3] = {
.odr = 1000,
/* Interrupt driven, for double tap */
.ec_rate = 0,
},
[SENSOR_CONFIG_EC_S5] = {
.odr = 1000,
.ec_rate = 0,
},
},
},
[RYU_LID_PROX] = {
.name = "Prox",
.active_mask = SENSOR_ACTIVE_S0_S3_S5,
.chip = MOTIONSENSE_CHIP_SI1141,
.type = MOTIONSENSE_TYPE_PROX,
.location = MOTIONSENSE_LOC_LID,
.drv = &si114x_drv,
.mutex = &g_mutex,
.drv_data = &g_si114x_data,
.port = I2C_PORT_ALS,
.addr = SI114X_ADDR,
.rot_standard_ref = NULL,
.default_range = 7630, /* Upon testing at desk */
.config = {
/* AP: by default shutdown all sensors */
[SENSOR_CONFIG_AP] = {
.odr = 0,
.ec_rate = 0,
},
/* EC does not need proximity in S0 */
[SENSOR_CONFIG_EC_S0] = {
.odr = 0,
.ec_rate = 0,
},
/* Unused */
[SENSOR_CONFIG_EC_S3] = {
.odr = 0,
.ec_rate = 0,
},
[SENSOR_CONFIG_EC_S5] = {
.odr = 0,
.ec_rate = 0,
},
},
},
};
const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
const struct lb_brightness_def lb_brightness_levels[] = {
{
/* regular brightness */
.lux_up = 60,
.lux_down = 40,
.color = {
{0x74, 0x58, 0xb4}, /* Segment0: Google blue */
{0xd6, 0x40, 0x20}, /* Segment1: Google red */
{0xfa, 0xe6, 0x20}, /* Segment2: Google yellow */
{0x66, 0xb0, 0x50}, /* Segment3: Google green */
},
},
{
/* 25 - 50% brightness */
.lux_up = 40,
.lux_down = 20,
.color = {
{0x51, 0x38, 0x7d},
{0x99, 0x28, 0x15},
{0xb8, 0x9e, 0x1a},
{0x44, 0x80, 0x35},
},
},
{
/* 0 .. 25% brightness */
.lux_up = 0,
.lux_down = 0,
.color = {
{0x3d, 0x28, 0x5c},
{0x71, 0x28, 0x10},
{0x8a, 0x6f, 0x10},
{0x2f, 0x60, 0x25},
},
},
};
const unsigned int lb_brightness_levels_count =
ARRAY_SIZE(lb_brightness_levels);
int extpower_is_present(void)
{
return gpio_get_level(GPIO_CHGR_ACOK);
}
void usb_board_connect(void)
{
gpio_set_level(GPIO_USB_PU_EN_L, 0);
}
void usb_board_disconnect(void)
{
gpio_set_level(GPIO_USB_PU_EN_L, 1);
}
/**
* Set active charge port -- only one port can be active at a time.
*
* @param charge_port Charge port to enable.
*
* Returns EC_SUCCESS if charge port is accepted and made active,
* EC_ERROR_* otherwise.
*/
int board_set_active_charge_port(int charge_port)
{
/* check if we are source vbus on that port */
int src = gpio_get_level(GPIO_CHGR_OTG);
if (charge_port >= 0 && charge_port < CONFIG_USB_PD_PORT_COUNT && src) {
CPRINTS("Port %d is not a sink, skipping enable", charge_port);
return EC_ERROR_INVAL;
}
/* Enable/disable charging */
gpio_set_level(GPIO_USBC_CHARGE_EN_L, charge_port == CHARGE_PORT_NONE);
return EC_SUCCESS;
}
/**
* Set the charge limit based upon desired maximum.
*
* @param port Port number.
* @param supplier Charge supplier type.
* @param charge_ma Desired charge limit (mA).
* @param charge_mv Negotiated charge voltage (mV).
*/
void board_set_charge_limit(int port, int supplier, int charge_ma,
int max_ma, int charge_mv)
{
int rv;
charge_current_limit = MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT);
rv = charge_set_input_current_limit(charge_current_limit, charge_mv);
if (rv < 0)
CPRINTS("Failed to set input current limit for PD");
}
/**
* Return whether ramping is allowed for given supplier
*/
int board_is_ramp_allowed(int supplier)
{
return supplier == CHARGE_SUPPLIER_BC12_DCP ||
supplier == CHARGE_SUPPLIER_BC12_SDP ||
supplier == CHARGE_SUPPLIER_BC12_CDP ||
supplier == CHARGE_SUPPLIER_PROPRIETARY;
}
/**
* Return the maximum allowed input current
*/
int board_get_ramp_current_limit(int supplier, int sup_curr)
{
switch (supplier) {
case CHARGE_SUPPLIER_BC12_DCP:
return 2400;
case CHARGE_SUPPLIER_BC12_SDP:
return 1000;
case CHARGE_SUPPLIER_BC12_CDP:
return 2400;
case CHARGE_SUPPLIER_PROPRIETARY:
return sup_curr;
default:
return 500;
}
}
/* Send host event up to AP */
void pd_send_host_event(int mask)
{
/* mask must be set */
if (!mask)
return;
atomic_or(&(host_event_status.status), mask);
/* interrupt the AP */
host_set_single_event(EC_HOST_EVENT_PD_MCU);
}
/**
* Enable and disable SPI for case closed debugging. This forces the AP into
* reset while SPI is enabled, thus preventing contention on the SPI interface.
*/
void usb_spi_board_enable(struct usb_spi_config const *config)
{
/* Place AP into reset */
gpio_set_level(GPIO_PMIC_WARM_RESET_L, 0);
/* Configure SPI GPIOs */
gpio_config_module(MODULE_SPI_FLASH, 1);
gpio_set_flags(SPI_FLASH_DEVICE->gpio_cs, GPIO_OUT_HIGH);
/* Set all four SPI pins to high speed */
/* pins B10/B14/B15 and B9 */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0xf03c0000;
/* Enable clocks to SPI2 module */
STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI2;
/* Reset SPI2 */
STM32_RCC_APB1RSTR |= STM32_RCC_PB1_SPI2;
STM32_RCC_APB1RSTR &= ~STM32_RCC_PB1_SPI2;
/* Enable SPI LDO to power the flash chip */
gpio_set_level(GPIO_VDDSPI_EN, 1);
spi_enable(CONFIG_SPI_FLASH_PORT, 1);
}
void usb_spi_board_disable(struct usb_spi_config const *config)
{
spi_enable(CONFIG_SPI_FLASH_PORT, 0);
/* Disable SPI LDO */
gpio_set_level(GPIO_VDDSPI_EN, 0);
/* Disable clocks to SPI2 module */
STM32_RCC_APB1ENR &= ~STM32_RCC_PB1_SPI2;
/* Release SPI GPIOs */
gpio_config_module(MODULE_SPI_FLASH, 0);
gpio_set_flags(SPI_FLASH_DEVICE->gpio_cs, GPIO_INPUT);
/* Release AP from reset */
gpio_set_level(GPIO_PMIC_WARM_RESET_L, 1);
}
int board_get_version(void)
{
static int ver;
if (!ver) {
/*
* read the board EC ID on the tristate strappings
* using ternary encoding: 0 = 0, 1 = 1, Hi-Z = 2
*/
uint8_t id0 = 0, id1 = 0;
gpio_set_flags(GPIO_BOARD_ID0, GPIO_PULL_DOWN | GPIO_INPUT);
gpio_set_flags(GPIO_BOARD_ID1, GPIO_PULL_DOWN | GPIO_INPUT);
usleep(100);
id0 = gpio_get_level(GPIO_BOARD_ID0);
id1 = gpio_get_level(GPIO_BOARD_ID1);
gpio_set_flags(GPIO_BOARD_ID0, GPIO_PULL_UP | GPIO_INPUT);
gpio_set_flags(GPIO_BOARD_ID1, GPIO_PULL_UP | GPIO_INPUT);
usleep(100);
id0 = gpio_get_level(GPIO_BOARD_ID0) && !id0 ? 2 : id0;
id1 = gpio_get_level(GPIO_BOARD_ID1) && !id1 ? 2 : id1;
gpio_set_flags(GPIO_BOARD_ID0, GPIO_INPUT);
gpio_set_flags(GPIO_BOARD_ID1, GPIO_INPUT);
ver = id1 * 3 + id0;
CPRINTS("Board ID = %d", ver);
}
return ver;
}
int board_has_spi_sensors(void)
{
/*
* boards version 6 / 7 / 8 have an I2C bus to sensors.
* board version 0+ has a SPI bus to sensors
*/
int ver = board_get_version();
return (ver < 6);
}
/****************************************************************************/
/* Host commands */
static int host_event_status_host_cmd(struct host_cmd_handler_args *args)
{
struct ec_response_host_event_status *r = args->response;
/* Read and clear the host event status to return to AP */
r->status = atomic_read_clear(&(host_event_status.status));
args->response_size = sizeof(*r);
return EC_RES_SUCCESS;
}
DECLARE_HOST_COMMAND(EC_CMD_PD_HOST_EVENT_STATUS, host_event_status_host_cmd,
EC_VER_MASK(0));
/****************************************************************************/
/* Console commands */
static int cmd_btn_press(int argc, char **argv)
{
enum gpio_signal gpio;
char *e;
int v;
if (argc < 2)
return EC_ERROR_PARAM_COUNT;
if (!strcasecmp(argv[1], "volup"))
gpio = GPIO_BTN_VOLU_L;
else if (!strcasecmp(argv[1], "voldown"))
gpio = GPIO_BTN_VOLD_L;
else
return EC_ERROR_PARAM1;
if (argc < 3) {
/* Just reading */
ccprintf("Button %s pressed = %d\n", argv[1],
!gpio_get_level(gpio));
return EC_SUCCESS;
}
v = strtoi(argv[2], &e, 0);
if (*e)
return EC_ERROR_PARAM2;
if (v)
gpio_set_flags(gpio, GPIO_OUT_LOW);
else
gpio_set_flags(gpio, GPIO_INPUT | GPIO_PULL_UP);
return EC_SUCCESS;
}
DECLARE_CONSOLE_COMMAND(btnpress, cmd_btn_press,
"<volup|voldown> [0|1]",
"Simulate button press");

285
board/ryu/board.h
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@ -1,285 +0,0 @@
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* ryu board configuration */
#ifndef __CROS_EC_BOARD_H
#define __CROS_EC_BOARD_H
/* 48 MHz SYSCLK clock frequency */
#define CPU_CLOCK 48000000
/* the UART console is on USART2 (PD4/PD5) */
#undef CONFIG_UART_CONSOLE
#define CONFIG_UART_CONSOLE 2
/* By default, enable all console messages excepted USB, lightbar and host */
#define CC_DEFAULT (CC_ALL & ~(CC_MASK(CC_USB) | CC_MASK(CC_LIGHTBAR) |\
CC_MASK(CC_HOSTCMD)))
/* Optional features */
#undef CONFIG_CMD_HASH
#define CONFIG_BOARD_VERSION
#define CONFIG_BOARD_SPECIFIC_VERSION
#define CONFIG_CHARGE_MANAGER
#define CONFIG_CHARGE_MANAGER_DRP_CHARGING
#define CONFIG_CHARGE_MANAGER_EXTERNAL_POWER_LIMIT
#define CONFIG_CHARGE_RAMP_HW
#define CONFIG_CHARGER_TERM_CURRENT_LIMIT (64*3)
#define CONFIG_FORCE_CONSOLE_RESUME
#define CONFIG_FPU
#define CONFIG_STM_HWTIMER32
#define CONFIG_USB_CHARGER
#define CONFIG_USB_POWER_DELIVERY
#define CONFIG_USB_PD_ALT_MODE
#define CONFIG_USB_PD_ALT_MODE_DFP
#define CONFIG_USB_PD_CUSTOM_VDM
#undef CONFIG_USB_PD_DEBUG_DR
#define CONFIG_USB_PD_DEBUG_DR PD_ROLE_UFP
#define CONFIG_USB_PD_DUAL_ROLE
#define CONFIG_USB_PD_FLASH_ERASE_CHECK
#define CONFIG_USB_PD_INTERNAL_COMP
#define CONFIG_USB_PD_LOGGING
#define CONFIG_USB_PD_LOW_POWER
#define CONFIG_USB_PD_PORT_COUNT 1
#define CONFIG_USB_PD_TCPC
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_PD_VBUS_DETECT_GPIO
#define CONFIG_USB_SWITCH_PI3USB9281
#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 1
#define CONFIG_USBC_SS_MUX
#define CONFIG_USBC_VCONN
#define CONFIG_USBC_VCONN_SWAP
#define CONFIG_ADC
#define CONFIG_ADC_SAMPLE_TIME 3
#define CONFIG_HW_CRC
#define CONFIG_I2C
#define CONFIG_I2C_MASTER
#define CONFIG_I2C_SLAVE
#define CONFIG_LID_SWITCH
#define CONFIG_LID_SWITCH_GPIO_LIST LID_GPIO(GPIO_LID_OPEN)\
LID_GPIO(GPIO_BASE_PRES_L)
#define CONFIG_LOW_POWER_IDLE
#define CONFIG_MKBP_EVENT
#define CONFIG_VBOOT_HASH
#define CONFIG_WATCHDOG_HELP
#define CONFIG_TASK_PROFILING
#define CONFIG_INDUCTIVE_CHARGING
#undef CONFIG_HIBERNATE
#undef CONFIG_UART_TX_DMA /* DMAC_CH7 is used by USB PD */
#define CONFIG_UART_RX_DMA
#define CONFIG_UART_RX_DMA_CH STM32_DMAC_USART2_RX
/* Charging/Power configuration */
#define CONFIG_BATTERY_RYU
#define CONFIG_BATTERY_BQ27541
#define CONFIG_BATTERY_CUT_OFF
#define CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEAD
#define CONFIG_BATTERY_REVIVE_DISCONNECT
#define CONFIG_CHARGER
#define CONFIG_CHARGER_V2
#define CONFIG_CHARGER_BQ25892
#define CONFIG_CHARGER_BQ2589X_IR_COMP (BQ2589X_IR_TREG_120C | \
BQ2589X_IR_VCLAMP_160MV | \
BQ2589X_IR_BAT_COMP_60MOHM)
#define CONFIG_CHARGER_BQ2589X_BOOST (BQ2589X_BOOSTV_MV(4998) | \
BQ2589X_BOOST_LIM_1650MA)
#define CONFIG_CHARGER_ILIM_PIN_DISABLED
#define CONFIG_CHARGER_PROFILE_OVERRIDE
#define CONFIG_CHARGER_INPUT_CURRENT 512
#define CONFIG_CHARGER_DISCHARGE_ON_AC
#define CONFIG_CHIPSET_TEGRA
#define CONFIG_PMIC_FW_LONG_PRESS_TIMER
#define CONFIG_POWER_COMMON
#define CONFIG_POWER_BUTTON
#define CONFIG_POWER_BUTTON_ACTIVE_STATE 1
#define CONFIG_POWER_IGNORE_LID_OPEN
/* I2C ports configuration */
#define I2C_PORT_MASTER 0
#define I2C_PORT_SLAVE 1
#define I2C_PORT_EC I2C_PORT_SLAVE
#define I2C_PORT_CHARGER I2C_PORT_MASTER
#define I2C_PORT_BATTERY I2C_PORT_MASTER
#define I2C_PORT_LIGHTBAR I2C_PORT_MASTER
#define I2C_PORT_ACCEL I2C_PORT_MASTER
#define I2C_PORT_ALS I2C_PORT_MASTER
#define I2C_PORT_PERICOM I2C_PORT_MASTER
#define BMM150_I2C_ADDRESS BMM150_ADDR0
/* slave address for host commands */
#ifdef HAS_TASK_HOSTCMD
#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3c
#endif
/* USART and USB stream drivers */
#define CONFIG_STREAM_USART
#define CONFIG_STREAM_USART1
#define CONFIG_STREAM_USB
/* USB Configuration */
#define CONFIG_USB
#define CONFIG_USB_PID 0x500f
/* Prevent the USB driver from initializing at boot */
#define CONFIG_USB_INHIBIT_INIT
/* USB interface indexes (use define rather than enum to expand them) */
#define USB_IFACE_CONSOLE 0
#define USB_IFACE_AP_STREAM 1
#define USB_IFACE_UNUSED 2 /* former SH UART interface */
#define USB_IFACE_SPI 3
#define USB_IFACE_COUNT 4
/* USB endpoint indexes (use define rather than enum to expand them) */
#define USB_EP_CONTROL 0
#define USB_EP_CONSOLE 1
#define USB_EP_AP_STREAM 2
#define USB_EP_UNUSED 3 /* former SH UART endpoint */
#define USB_EP_SPI 4
#define USB_EP_COUNT 5
/* Enable console over USB */
#define CONFIG_USB_CONSOLE
#define CONFIG_SPI_MASTER
/* Enable control of SPI over USB */
#define CONFIG_SPI_FLASH_PORT 0 /* First SPI master port */
#define CONFIG_USB_SPI
/* Enable Case Closed Debugging */
#define CONFIG_CASE_CLOSED_DEBUG
/* Enable Accel over SPI */
#define CONFIG_SPI_ACCEL_PORT 1 /* Second SPI master port */
#define SPI_ACCEL_PORT_ID 1 /* stored at spi_ports[1] */
/* Sensor support */
#define CONFIG_ACCELGYRO_BMI160
#define CONFIG_GESTURE_DETECTION
#define CONFIG_GESTURE_HOST_DETECTION
#define CONFIG_GESTURE_SAMPLING_INTERVAL_MS 5
/* First sensor is motion_sensor is used for significant motion */
#define CONFIG_GESTURE_SIGMO 0
#define CONFIG_GESTURE_SIGMO_PROOF_MS 500
#define CONFIG_GESTURE_SIGMO_SKIP_MS 3000
#define CONFIG_GESTURE_SIGMO_THRES_MG 500
#define CONFIG_GESTURE_SENSOR_BATTERY_TAP 0
#define CONFIG_GESTURE_TAP_THRES_MG 100
#define CONFIG_GESTURE_TAP_MAX_INTERSTICE_T 500
#define CONFIG_GESTURE_DETECTION_MASK \
((1 << CONFIG_GESTURE_SIGMO) | \
(1 << CONFIG_GESTURE_SENSOR_BATTERY_TAP))
#define CONFIG_MAG_CALIBRATE
#define CONFIG_MAG_BMI160_BMM150
#define CONFIG_ALS_SI114X 0x41
#define CONFIG_ACCELGYRO_BMI160_INT_EVENT TASK_EVENT_CUSTOM(4)
#define CONFIG_ALS_SI114X_INT_EVENT TASK_EVENT_CUSTOM(8)
/* event 2 to 9 are reserved for hardware interrupt */
#define CONFIG_GESTURE_TAP_EVENT TASK_EVENT_CUSTOM(1024)
#define CONFIG_GESTURE_SIGMO_EVENT TASK_EVENT_CUSTOM(2048)
#define CONFIG_ACCEL_INTERRUPTS
#define CONFIG_CMD_ACCELS
#define CONFIG_CMD_ACCEL_INFO
#define CONFIG_CMD_SPI_XFER
/* Size of FIFO queue is determined by Android Hifi sensor requirements:
* Wake up sensors: Accel @50Hz + Barometer @5Hz + uncal mag @ 10Hz
* 60s minimum, 3min recommened.
* FIFO size is in power of 2.
*/
#define CONFIG_ACCEL_FIFO 2048
/* Depends on how fast the AP boots and typical ODRs */
#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO / 3)
#ifndef __ASSEMBLER__
int board_get_version(void);
int board_has_spi_sensors(void);
/* GPIOs depending on board version */
#define GPIO_VDDSPI_EN (board_has_spi_sensors() ? GPIO_VDDSPI_EN_0 \
: GPIO_VDDSPI_EN_OLD)
#define GPIO_USBC_CC_EN (board_has_spi_sensors() ? GPIO_USBC_CC_EN_0 \
: GPIO_SPI3_NSS)
/* Timer selection */
#define TIM_CLOCK32 5
#define TIM_WATCHDOG 19
#include "gpio_signal.h"
enum power_signal {
TEGRA_XPSHOLD = 0,
TEGRA_SUSPEND_ASSERTED,
/* Number of power signals */
POWER_SIGNAL_COUNT
};
/* Sensor index definition */
enum sensor_id {
RYU_LID_ACCEL,
RYU_LID_GYRO,
RYU_LID_MAG,
RYU_LID_LIGHT,
RYU_LID_PROX
};
/* ADC signal */
enum adc_channel {
ADC_VBUS = 0,
ADC_CC1_PD,
ADC_CC2_PD,
/* Number of ADC channels */
ADC_CH_COUNT
};
/* USB string indexes */
enum usb_strings {
USB_STR_DESC = 0,
USB_STR_VENDOR,
USB_STR_PRODUCT,
USB_STR_VERSION,
USB_STR_CONSOLE_NAME,
USB_STR_AP_STREAM_NAME,
USB_STR_COUNT
};
/* VBUS enable GPIO */
#define GPIO_USB_C0_5V_EN GPIO_CHGR_OTG
/* 1.5A Rp */
#define PD_SRC_VNC PD_SRC_1_5_VNC_MV
#define PD_SRC_RD_THRESHOLD PD_SRC_1_5_RD_THRESH_MV
/* delay for the voltage transition on the power supply, BQ25x spec is 30ms */
#define PD_POWER_SUPPLY_TURN_ON_DELAY 40000 /* us */
#define PD_POWER_SUPPLY_TURN_OFF_DELAY 20000 /* us */
/* delay to turn on/off vconn */
#define PD_VCONN_SWAP_DELAY 5000 /* us */
/* Define typical operating power and max power */
#define PD_OPERATING_POWER_MW 10000
#define PD_MAX_POWER_MW 24000
#define PD_MAX_CURRENT_MA 3000
#define PD_MAX_VOLTAGE_MV 12000
/* The lower the input voltage, the higher the power efficiency. */
#define PD_PREFER_LOW_VOLTAGE
/* PP1800 transition GPIO interrupt handler */
void pp1800_on_off_evt(enum gpio_signal signal);
/* ALS sensor is in forced mode */
#define CONFIG_ACCEL_FORCE_MODE_MASK \
((1 << RYU_LID_LIGHT) | (1 << RYU_LID_PROX))
#define CONFIG_ALS_LIGHTBAR_DIMMING RYU_LID_LIGHT
#endif /* !__ASSEMBLER__ */
#endif /* __CROS_EC_BOARD_H */

13
board/ryu/build.mk
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@ -1,13 +0,0 @@
# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
# Board specific files build
# the IC is STmicro STM32F373VB
CHIP:=stm32
CHIP_FAMILY:=stm32f3
CHIP_VARIANT:=stm32f373
board-y=battery.o board.o
board-$(CONFIG_USB_POWER_DELIVERY)+=usb_mux.o usb_pd_policy.o

3
board/ryu/dfu
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@ -1,3 +0,0 @@
#!/bin/sh
dfu-util -a 0 -d 0483:df11 -s 0x08000000:262144 -D $1

29
board/ryu/ec.tasklist
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/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/**
* List of enabled tasks in the priority order
*
* The first one has the lowest priority.
*
* For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and
* TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries,
* where :
* 'n' in the name of the task
* 'r' in the main routine of the task
* 'd' in an opaque parameter passed to the routine at startup
* 's' is the stack size in bytes; must be a multiple of 8
*/
#define CONFIG_TASK_LIST \
TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, \
SMALLER_TASK_STACK_SIZE) \
TASK_NOTEST(LIGHTBAR, lightbar_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(CHARGER, charger_task, NULL, TASK_STACK_SIZE) \
TASK_NOTEST(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \
TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_NOTEST(HOSTCMD, host_command_task, NULL, VENTI_TASK_STACK_SIZE) \
TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE)

136
board/ryu/gpio.inc
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/* -*- mode:c -*-
*
* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Declare symbolic names for all the GPIOs that we care about.
* Note: Those with interrupt handlers must be declared first. */
/* Interrupts */
GPIO_INT(CHGR_ACOK, PIN(D, 4), GPIO_INT_BOTH, vbus_evt)
GPIO_INT(POWER_BUTTON_L, PIN(C, 13), GPIO_INT_BOTH, power_button_interrupt) /* active high, the name is for compatibility with existing code */
GPIO_INT(USBC_BC12_INT_L, PIN(D, 11), GPIO_INT_FALLING | GPIO_PULL_UP, usb_evt)
GPIO_INT(LID_OPEN, PIN(E, 1), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt)
GPIO_INT(BASE_PRES_L, PIN(E, 10), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt)
GPIO_INT(CHARGE_DONE, PIN(E, 6), GPIO_INT_BOTH, inductive_charging_interrupt)
GPIO_INT(AP_IN_SUSPEND, PIN(F, 9), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(AP_HOLD, PIN(E, 3), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(ACC_IRQ1, PIN(D, 12), GPIO_INT_FALLING, bmi160_interrupt)
GPIO_INT(ALS_PROXY_INT_L, PIN(E, 15), GPIO_INT_FALLING | GPIO_PULL_UP, si114x_interrupt)
/* Interrupt lines not used yet */
GPIO(BC_TEMP_ALERT_L, PIN(C, 5), GPIO_INT_FALLING)
GPIO(LB_INT_L, PIN(C, 14), GPIO_INT_FALLING | GPIO_PULL_UP)
GPIO(LIGHTBAR_EN_L, PIN(E, 8), GPIO_INT_FALLING | GPIO_PULL_UP)
GPIO(CHGR_INT_L, PIN(B, 2), GPIO_INT_FALLING)
GPIO(CAM_SYNC_INT_L, PIN(C, 7), GPIO_INT_FALLING)
GPIO(COMPASS_DRDY, PIN(A, 8), GPIO_INPUT)
/* Buttons */
GPIO(BTN_VOLD_L, PIN(C, 0), GPIO_ODR_HIGH | GPIO_PULL_UP)
GPIO(BTN_VOLU_L, PIN(A, 2), GPIO_ODR_HIGH | GPIO_PULL_UP)
/* PD RX/TX */
GPIO(USBC_CC1_PD, PIN(A, 1), GPIO_ANALOG)
GPIO(USBC_CC2_PD, PIN(A, 3), GPIO_ANALOG)
GPIO(USBC_CC_EN_0, PIN(E, 7), GPIO_OUT_LOW) /* on rev v0+ */
GPIO(USBC_CC_TX_DATA, PIN(A, 6), GPIO_OUT_LOW)
GPIO(USBC_CC_TX_EN, PIN(D, 7), GPIO_OUT_LOW)
GPIO(SPI3_NSS, PIN(A, 4), GPIO_OUT_LOW) /* USB_CC_EN on v6/7/8 */
#if 0
/* Alternate functions */
GPIO(USBC_TX_CLKOUT, PIN(B, 1), GPIO_OUT_LOW)
GPIO(USBC_TX_CLKIN, PIN(B, 3), GPIO_OUT_LOW)
#endif
/* System power */
GPIO(PMIC_PWRON_L, PIN(D, 14), GPIO_ODR_HIGH)
GPIO(PMIC_WARM_RESET_L, PIN(E, 4), GPIO_ODR_HIGH)
/*
* We are missing an external pull-up for EN_PP3300.
* This GPIO is used to pull it up through an external 100kOhm.
* EN_PP3300 is still controlled by PMIC though.
*/
GPIO(EN_PP3300_RSVD, PIN(E, 13), GPIO_ODR_HIGH)
/* sensor temp output and PMIC reset input */
GPIO(PMIC_THERM_L, PIN(B, 8), GPIO_ODR_HIGH)
GPIO(VBUS_SENSE, PIN(A, 0), GPIO_ANALOG)
GPIO(CHGR_PSEL, PIN(B, 0), GPIO_OUT_LOW)
GPIO(CHGR_OTG, PIN(C, 3), GPIO_OUT_LOW)
/* Inductive charging */
GPIO(CHARGE_EN, PIN(D, 13), GPIO_OUT_LOW)
GPIO(BASE_CHG_VDD_EN, PIN(E, 5), GPIO_OUT_LOW)
/* USB-C Power and muxes control */
GPIO(USBC_CHARGE_EN_L, PIN(A, 7), GPIO_OUT_LOW)
GPIO(USBC_VCONN1_EN_L, PIN(F, 10), GPIO_OUT_HIGH)
GPIO(USBC_VCONN2_EN_L, PIN(D, 10), GPIO_OUT_HIGH)
GPIO(USBC_CC1_DEVICE_ODL, PIN(A, 5), GPIO_ODR_LOW)
GPIO(USBC_CC2_DEVICE_ODL, PIN(E, 14), GPIO_ODR_LOW)
GPIO(USBC_CC_PUEN1, PIN(D, 0), GPIO_INPUT)
GPIO(USBC_CC_PUEN2, PIN(C, 8), GPIO_INPUT)
/* Pericom PI3USB30592 mux controls on Proto 5+ */
GPIO(USBC_MUX_CONF0, PIN(D, 3), GPIO_OUT_LOW)
GPIO(USBC_MUX_CONF1, PIN(D, 9), GPIO_OUT_LOW)
GPIO(USBC_MUX_CONF2, PIN(E, 0), GPIO_OUT_LOW)
GPIO(USBC_DP_HPD, PIN(C, 1), GPIO_ODR_LOW)
/* Inputs */
GPIO(BOARD_ID0, PIN(E, 11), GPIO_INPUT)
GPIO(BOARD_ID1, PIN(E, 12), GPIO_INPUT)
/* Lightbar reset */
GPIO(LB_RST_L, PIN(D, 15), GPIO_ODR_HIGH | GPIO_PULL_UP)
#if 0
/* Alternate functions */
GPIO(USB_DM, PIN(A, 11), GPIO_ANALOG)
GPIO(USB_DP, PIN(A, 12), GPIO_ANALOG)
GPIO(UART_TX, PIN(D, 5), GPIO_OUT_LOW)
GPIO(UART_RX, PIN(D, 6), GPIO_OUT_LOW)
#endif
/*
* I2C pins should be configured as inputs until I2C module is
* initialized. This will avoid driving the lines unintentionally.
*/
GPIO(MASTER_I2C_SCL, PIN(A, 15), GPIO_INPUT)
GPIO(MASTER_I2C_SDA, PIN(A, 14), GPIO_INPUT)
GPIO(SLAVE_I2C_SCL, PIN(A, 9), GPIO_INPUT)
GPIO(SLAVE_I2C_SDA, PIN(A, 10), GPIO_INPUT)
/* Case closed debugging. */
GPIO(USB_PU_EN_L, PIN(C, 2), GPIO_OUT_HIGH)
GPIO(PD_DISABLE_DEBUG, PIN(C, 6), GPIO_OUT_LOW)
GPIO(SPI_FLASH_NSS, PIN(B, 9), GPIO_INPUT)
GPIO(VDDSPI_EN_0, PIN(C, 15), GPIO_OUT_LOW) /* on rev v0+ */
GPIO(VDDSPI_EN_OLD, PIN(C, 12), GPIO_OUT_LOW) /* on rev v6/7/8 */
GPIO(EC_INT_L, PIN(F, 2), GPIO_ODR_HIGH)
GPIO(ENTERING_RW, PIN(E, 9), GPIO_OUT_LOW)
GPIO(WP_L, PIN(F, 6), GPIO_INPUT)
GPIO(FW_DEBUG_MODE_L, PIN(D, 1), GPIO_ODR_HIGH)
GPIO(EC_BOOT_SPI_EN, PIN(F, 4), GPIO_ODR_HIGH)
#if 0
/* Alternate functions */
GPIO(AP_UART_TX, PIN(B, 6), GPIO_OUT_LOW)
GPIO(AP_UART_RX, PIN(B, 7), GPIO_INPUT)
#endif
UNIMPLEMENTED(AP_RESET_L)
ALTERNATE(PIN_MASK(C, 0x1C00), 6, MODULE_SPI_MASTER, 0) /* SPI3: PC10/PC11/PC12 */
ALTERNATE(PIN_MASK(B, 0xC400), 5, MODULE_SPI_FLASH, 0) /* SPI2: PB10/14/15 */
ALTERNATE(PIN_MASK(B, 0x0008), 5, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */
ALTERNATE(PIN_MASK(B, 0x0002), 2, MODULE_USB_PD, 0) /* TIM3_CH4: PB1 */
ALTERNATE(PIN_MASK(B, 0x00C0), 7, MODULE_USART, 0) /* USART1: PB6/PB7 */
ALTERNATE(PIN_MASK(D, 0x0060), 7, MODULE_UART, GPIO_PULL_UP) /* USART2: PD4/PD5 */
ALTERNATE(PIN_MASK(A, 0xC600), 4, MODULE_I2C, 0) /* I2C SLAVE:PA9/10 MASTER:PA14/15 */
ALTERNATE(PIN_MASK(A, 0x1800),14, MODULE_USB, 0) /* USB: PA11/12 */

67
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/* Copyright 2015 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Ryu-custom USB mux driver. */
#include "common.h"
#include "gpio.h"
#include "usb_mux.h"
#include "util.h"
static int board_init_usb_mux(int port)
{
return EC_SUCCESS;
}
static int board_set_usb_mux(int port, mux_state_t mux_state)
{
/* reset everything */
gpio_set_level(GPIO_USBC_MUX_CONF0, 0);
gpio_set_level(GPIO_USBC_MUX_CONF1, 0);
gpio_set_level(GPIO_USBC_MUX_CONF2, 0);
if (!(mux_state & (MUX_USB_ENABLED | MUX_DP_ENABLED)))
/* everything is already disabled, we can return */
return EC_SUCCESS;
gpio_set_level(GPIO_USBC_MUX_CONF0, mux_state & MUX_POLARITY_INVERTED);
if (mux_state & MUX_USB_ENABLED)
/* USB 3.0 uses 2 superspeed lanes */
gpio_set_level(GPIO_USBC_MUX_CONF2, 1);
if (mux_state & MUX_DP_ENABLED)
/* DP uses available superspeed lanes (x2 or x4) */
gpio_set_level(GPIO_USBC_MUX_CONF1, 1);
return EC_SUCCESS;
}
static int board_get_usb_mux(int port, mux_state_t *mux_state)
{
*mux_state = 0;
if (gpio_get_level(GPIO_USBC_MUX_CONF2))
*mux_state |= MUX_USB_ENABLED;
if (gpio_get_level(GPIO_USBC_MUX_CONF1))
*mux_state |= MUX_DP_ENABLED;
if (gpio_get_level(GPIO_USBC_MUX_CONF0))
*mux_state |= MUX_POLARITY_INVERTED;
return EC_SUCCESS;
}
const struct usb_mux_driver board_custom_usb_mux_driver = {
.init = board_init_usb_mux,
.set = board_set_usb_mux,
.get = board_get_usb_mux,
};
struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
{
.port_addr = 0,
.driver = &board_custom_usb_mux_driver,
},
};

197
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/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* USB Power delivery board configuration */
#ifndef __CROS_EC_USB_PD_CONFIG_H
#define __CROS_EC_USB_PD_CONFIG_H
#include "adc.h"
#include "charge_state.h"
#include "clock.h"
#include "gpio.h"
#include "registers.h"
#include "usb_mux.h"
/* Timer selection for baseband PD communication */
#define TIM_CLOCK_PD_TX_C0 3
#define TIM_CLOCK_PD_RX_C0 2
#define TIM_CLOCK_PD_TX(p) TIM_CLOCK_PD_TX_C0
#define TIM_CLOCK_PD_RX(p) TIM_CLOCK_PD_RX_C0
/* Timer channel */
#define TIM_RX_CCR_C0 4
#define TIM_TX_CCR_C0 4
/* RX timer capture/compare register */
#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0))
#define TIM_RX_CCR_REG(p) TIM_CCR_C0
/* TX and RX timer register */
#define TIM_REG_TX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C0))
#define TIM_REG_RX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C0))
#define TIM_REG_TX(p) TIM_REG_TX_C0
#define TIM_REG_RX(p) TIM_REG_RX_C0
/* use the hardware accelerator for CRC */
#define CONFIG_HW_CRC
/* TX is using SPI1 on PA6, PB3, and PB5 */
#define SPI_REGS(p) STM32_SPI1_REGS
static inline void spi_enable_clock(int port)
{
STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1;
/* Delay 1 APB clock cycle after the clock is enabled */
clock_wait_bus_cycles(BUS_APB, 1);
}
#define DMAC_SPI_TX(p) STM32_DMAC_CH3
/* RX is using COMP1 triggering TIM2 CH4 */
#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM2_IC4
#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM2_IC4
#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0
#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0
#define TIM_CCR_CS 1
#define EXTI_COMP_MASK(p) ((1 << 21) | (1 << 22))
#define IRQ_COMP STM32_IRQ_COMP
/* triggers packet detection on comparator falling edge */
#define EXTI_XTSR STM32_EXTI_FTSR
#define DMAC_TIM_RX(p) STM32_DMAC_CH7
/* the pins used for communication need to be hi-speed */
static inline void pd_set_pins_speed(int port)
{
/* 40 MHz pin speed on SPI MISO PA6 */
STM32_GPIO_OSPEEDR(GPIO_A) |= 0x00003000;
/* 40 MHz pin speed on TIM3_CH4 (PB1) */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C;
}
/* Reset SPI peripheral used for TX */
static inline void pd_tx_spi_reset(int port)
{
/* Reset SPI1 */
STM32_RCC_APB2RSTR |= (1 << 12);
STM32_RCC_APB2RSTR &= ~(1 << 12);
}
/* Drive the CC line from the TX block */
static inline void pd_tx_enable(int port, int polarity)
{
/* put SPI function on TX pin : PA6 is SPI MISO */
gpio_set_alternate_function(GPIO_A, 0x0040, 5);
/* set the low level reference */
gpio_set_level(GPIO_USBC_CC_TX_EN, 1);
}
/* Put the TX driver in Hi-Z state */
static inline void pd_tx_disable(int port, int polarity)
{
/* output low on SPI TX (PA6 is SPI1 MISO) to disable the FET */
STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
& ~(3 << (2*6)))
| (1 << (2*6));
/* put the low level reference in Hi-Z */
gpio_set_level(GPIO_USBC_CC_TX_EN, 0);
}
/* we know the plug polarity, do the right configuration */
static inline void pd_select_polarity(int port, int polarity)
{
/*
* use the right comparator : CC1 -> PA1 (COMP1 INP)
* CC2 -> PA3 (COMP2 INP)
* use VrefInt / 2 as INM (about 600mV)
*/
STM32_COMP_CSR = (STM32_COMP_CSR
& ~(STM32_COMP_CMP1INSEL_MASK | STM32_COMP_CMP2INSEL_MASK
| STM32_COMP_CMP1EN | STM32_COMP_CMP2EN))
| STM32_COMP_CMP1INSEL_VREF12 | STM32_COMP_CMP2INSEL_VREF12
| (polarity ? STM32_COMP_CMP2EN : STM32_COMP_CMP1EN);
}
/* Initialize pins used for TX and put them in Hi-Z */
static inline void pd_tx_init(void)
{
gpio_config_module(MODULE_USB_PD, 1);
}
static inline void pd_set_host_mode(int port, int enable)
{
if (enable) {
/* We never charging in power source mode */
gpio_set_level(GPIO_USBC_CHARGE_EN_L, 1);
/* High-Z is used for host mode. */
gpio_set_level(GPIO_USBC_CC1_DEVICE_ODL, 1);
gpio_set_level(GPIO_USBC_CC2_DEVICE_ODL, 1);
/* Set 3.3V for Rp pull-up */
gpio_set_flags(GPIO_USBC_CC_PUEN1, GPIO_OUT_HIGH);
gpio_set_flags(GPIO_USBC_CC_PUEN2, GPIO_OUT_HIGH);
} else {
/* Kill VBUS power supply */
charger_enable_otg_power(0);
gpio_set_level(GPIO_CHGR_OTG, 0);
/* Remove Rp pull-up by putting the high side in Hi-Z */
gpio_set_flags(GPIO_USBC_CC_PUEN1, GPIO_INPUT);
gpio_set_flags(GPIO_USBC_CC_PUEN2, GPIO_INPUT);
/* Pull low for device mode. */
gpio_set_level(GPIO_USBC_CC1_DEVICE_ODL, 0);
gpio_set_level(GPIO_USBC_CC2_DEVICE_ODL, 0);
}
}
/**
* Initialize various GPIOs and interfaces to safe state at start of pd_task.
*
* These include:
* VBUS, charge path based on power role.
* Physical layer CC transmit.
* VCONNs disabled.
*
* @param port USB-C port number
* @param power_role Power role of device
*/
static inline void pd_config_init(int port, uint8_t power_role)
{
/*
* Set CC pull resistors, and charge_en and vbus_en GPIOs to match
* the initial role.
*/
pd_set_host_mode(port, power_role);
/* Initialize TX pins and put them in Hi-Z */
pd_tx_init();
/* Reset mux ... for NONE polarity doesn't matter */
usb_mux_set(port, TYPEC_MUX_NONE, USB_SWITCH_DISCONNECT, 0);
gpio_set_level(GPIO_USBC_VCONN1_EN_L, 1);
gpio_set_level(GPIO_USBC_VCONN2_EN_L, 1);
}
static inline int pd_adc_read(int port, int cc)
{
if (cc == 0)
return adc_read_channel(ADC_CC1_PD);
else
return adc_read_channel(ADC_CC2_PD);
}
static inline void pd_set_vconn(int port, int polarity, int enable)
{
/* Set VCONN on the opposite CC line from the polarity */
gpio_set_level(polarity ? GPIO_USBC_VCONN1_EN_L :
GPIO_USBC_VCONN2_EN_L, !enable);
}
#endif /* __CROS_EC_USB_PD_CONFIG_H */

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/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "config.h"
#include "case_closed_debug.h"
#include "charge_manager.h"
#include "charger.h"
#include "common.h"
#include "console.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
#include "registers.h"
#include "system.h"
#include "task.h"
#include "timer.h"
#include "util.h"
#include "usb_mux.h"
#include "usb_pd.h"
#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
PDO_FIXED_COMM_CAP)
const uint32_t pd_src_pdo[] = {
PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
};
const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
const uint32_t pd_snk_pdo[] = {
PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
PDO_BATT(4500, 14000, 10000),
PDO_VAR(4500, 14000, 3000),
};
const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
void pd_set_input_current_limit(int port, uint32_t max_ma,
uint32_t supply_voltage)
{
struct charge_port_info charge;
charge.current = max_ma;
charge.voltage = supply_voltage;
charge_manager_update_charge(CHARGE_SUPPLIER_PD, port, &charge);
}
void typec_set_input_current_limit(int port, uint32_t max_ma,
uint32_t supply_voltage)
{
struct charge_port_info charge;
charge.current = max_ma;
charge.voltage = supply_voltage;
charge_manager_update_charge(CHARGE_SUPPLIER_TYPEC, port, &charge);
}
int pd_is_valid_input_voltage(int mv)
{
/* Any voltage less than the max is allowed */
return 1;
}
void pd_transition_voltage(int idx)
{
/* No-operation: we are always 5V */
}
int pd_set_power_supply_ready(int port)
{
/* provide VBUS */
gpio_set_level(GPIO_CHGR_OTG, 1);
charger_enable_otg_power(1);
/* notify host of power info change */
pd_send_host_event(PD_EVENT_POWER_CHANGE);
return EC_SUCCESS; /* we are ready */
}
void pd_power_supply_reset(int port)
{
/* Kill VBUS */
charger_enable_otg_power(0);
gpio_set_level(GPIO_CHGR_OTG, 0);
/* notify host of power info change */
pd_send_host_event(PD_EVENT_POWER_CHANGE);
}
int pd_snk_is_vbus_provided(int port)
{
return gpio_get_level(GPIO_CHGR_ACOK);
}
int pd_board_checks(void)
{
return EC_SUCCESS;
}
int pd_check_power_swap(int port)
{
/* TODO: use battery level to decide to accept/reject power swap */
/*
* Allow power swap as long as we are acting as a dual role device,
* otherwise assume our role is fixed (not in S0 or console command
* to fix our role).
*/
return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0;
}
int pd_check_data_swap(int port, int data_role)
{
/* Always allow data swap: we can be DFP or UFP for USB */
return 1;
}
int pd_check_vconn_swap(int port)
{
/*
* VCONN is provided directly by the battery(PPVAR_SYS)
* but use the same rules as power swap
*/
return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0;
}
void pd_execute_data_swap(int port, int data_role)
{
/* inform the host controller to change role */
pd_send_host_event(PD_EVENT_DATA_SWAP);
}
void pd_check_pr_role(int port, int pr_role, int flags)
{
/*
* If partner is dual-role power and dualrole toggling is on, consider
* if a power swap is necessary.
*/
if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
pd_get_dual_role() == PD_DRP_TOGGLE_ON) {
/*
* If we are source and partner is externally powered,
* swap to become a sink.
*/
if ((flags & PD_FLAGS_PARTNER_EXTPOWER) &&
pr_role == PD_ROLE_SOURCE)
pd_request_power_swap(port);
}
}
void pd_check_dr_role(int port, int dr_role, int flags)
{
/* if the partner is a DRP (e.g. laptop), try to switch to UFP */
if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_DFP)
pd_request_data_swap(port);
}
/* ----------------- Vendor Defined Messages ------------------ */
const struct svdm_response svdm_rsp = {
.identity = NULL,
.svids = NULL,
.modes = NULL,
};
int pd_custom_vdm(int port, int cnt, uint32_t *payload,
uint32_t **rpayload)
{
int cmd = PD_VDO_CMD(payload[0]);
uint16_t dev_id = 0;
int is_rw, is_latest;
/* make sure we have some payload */
if (cnt == 0)
return 0;
switch (cmd) {
case VDO_CMD_VERSION:
/* guarantee last byte of payload is null character */
*(payload + cnt - 1) = 0;
CPRINTF("version: %s\n", (char *)(payload+1));
break;
case VDO_CMD_READ_INFO:
case VDO_CMD_SEND_INFO:
/* copy hash */
if (cnt == 7) {
dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
is_rw = VDO_INFO_IS_RW(payload[6]);
is_latest = pd_dev_store_rw_hash(port,
dev_id,
payload + 1,
is_rw ?
SYSTEM_IMAGE_RW :
SYSTEM_IMAGE_RO);
/*
* Send update host event unless our RW hash is
* already known to be the latest update RW.
*/
if (!is_rw || !is_latest)
pd_send_host_event(PD_EVENT_UPDATE_DEVICE);
CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
HW_DEV_ID_MAJ(dev_id),
HW_DEV_ID_MIN(dev_id),
VDO_INFO_SW_DBG_VER(payload[6]),
is_rw);
} else if (cnt == 6) {
/* really old devices don't have last byte */
pd_dev_store_rw_hash(port, dev_id, payload + 1,
SYSTEM_IMAGE_UNKNOWN);
}
break;
case VDO_CMD_CURRENT:
CPRINTF("Current: %dmA\n", payload[1]);
break;
case VDO_CMD_FLIP:
usb_mux_flip(port);
break;
#ifdef CONFIG_USB_PD_LOGGING
case VDO_CMD_GET_LOG:
pd_log_recv_vdm(port, cnt, payload);
break;
#endif /* CONFIG_USB_PD_LOGGING */
#ifdef CONFIG_CASE_CLOSED_DEBUG
case VDO_CMD_CCD_EN:
ccd_set_mode(system_is_locked() ? CCD_MODE_PARTIAL
: CCD_MODE_ENABLED);
break;
#endif
}
return 0;
}
static int dp_flags;
/* DP Status VDM as returned by UFP */
static uint32_t dp_status;
static void svdm_safe_dp_mode(int port)
{
/* make DP interface safe until configure */
usb_mux_set(port, TYPEC_MUX_NONE, USB_SWITCH_CONNECT, 0);
dp_flags = 0;
dp_status = 0;
}
static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
{
/* Only enter mode if device is DFP_D capable */
if (mode_caps & MODE_DP_SNK) {
svdm_safe_dp_mode(port);
return 0;
}
return -1;
}
static int svdm_dp_status(int port, uint32_t *payload)
{
int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
CMD_DP_STATUS | VDO_OPOS(opos));
payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */
0, /* HPD level ... not applicable */
0, /* exit DP? ... no */
0, /* usb mode? ... no */
0, /* multi-function ... no */
(!!(dp_flags & DP_FLAGS_DP_ON)),
0, /* power low? ... no */
(!!(dp_flags & DP_FLAGS_DP_ON)));
return 2;
};
static int svdm_dp_config(int port, uint32_t *payload)
{
int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status);
int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status);
if (!pin_mode)
return 0;
usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
USB_SWITCH_CONNECT, pd_get_polarity(port));
payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
CMD_DP_CONFIG | VDO_OPOS(opos));
payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */
1, /* DPv1.3 signaling */
2); /* UFP_U connected as UFP_D */
return 2;
};
static void svdm_dp_post_config(int port)
{
dp_flags |= DP_FLAGS_DP_ON;
if (!(dp_flags & DP_FLAGS_HPD_HI_PENDING))
return;
gpio_set_level(GPIO_USBC_DP_HPD, 1);
}
static void hpd_irq_deferred(void)
{
gpio_set_level(GPIO_USBC_DP_HPD, 1);
}
DECLARE_DEFERRED(hpd_irq_deferred);
static int svdm_dp_attention(int port, uint32_t *payload)
{
int cur_lvl;
int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
cur_lvl = gpio_get_level(GPIO_USBC_DP_HPD);
dp_status = payload[1];
/* Its initial DP status message prior to config */
if (!(dp_flags & DP_FLAGS_DP_ON)) {
if (lvl)
dp_flags |= DP_FLAGS_HPD_HI_PENDING;
return 1;
}
if (irq & cur_lvl) {
gpio_set_level(GPIO_USBC_DP_HPD, 0);
hook_call_deferred(&hpd_irq_deferred_data,
HPD_DSTREAM_DEBOUNCE_IRQ);
} else if (irq & !cur_lvl) {
CPRINTF("ERR:HPD:IRQ&LOW\n");
return 0; /* nak */
} else {
gpio_set_level(GPIO_USBC_DP_HPD, lvl);
}
/* ack */
return 1;
}
static void svdm_exit_dp_mode(int port)
{
svdm_safe_dp_mode(port);
gpio_set_level(GPIO_USBC_DP_HPD, 0);
}
static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
{
/* Always enter GFU mode */
return 0;
}
static void svdm_exit_gfu_mode(int port)
{
}
static int svdm_gfu_status(int port, uint32_t *payload)
{
/*
* This is called after enter mode is successful, send unstructured
* VDM to read info.
*/
pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
return 0;
}
static int svdm_gfu_config(int port, uint32_t *payload)
{
return 0;
}
static int svdm_gfu_attention(int port, uint32_t *payload)
{
return 0;
}
const struct svdm_amode_fx supported_modes[] = {
{
.svid = USB_SID_DISPLAYPORT,
.enter = &svdm_enter_dp_mode,
.status = &svdm_dp_status,
.config = &svdm_dp_config,
.post_config = &svdm_dp_post_config,
.attention = &svdm_dp_attention,
.exit = &svdm_exit_dp_mode,
},
{
.svid = USB_VID_GOOGLE,
.enter = &svdm_enter_gfu_mode,
.status = &svdm_gfu_status,
.config = &svdm_gfu_config,
.attention = &svdm_gfu_attention,
.exit = &svdm_exit_gfu_mode,
}
};
const int supported_modes_cnt = ARRAY_SIZE(supported_modes);

5
common/lb_common.c
View File

@ -152,7 +152,7 @@ static inline uint8_t controller_read(int ctrl_num, uint8_t reg)
#define MAX_GREEN 0x30
#define MAX_BLUE 0x67
#endif
#if defined(BOARD_SAMUS) || defined(BOARD_RYU)
#if defined(BOARD_SAMUS)
/* Samus uses completely different LEDs, so the numbers are different. The
* Samus LEDs can handle much higher currents, but these constants were
* calibrated to provide uniform intensity at the level used by Link.
@ -201,9 +201,6 @@ static const uint8_t led_to_isc[] = { 0x18, 0x15, 0x18, 0x15 };
#ifdef BOARD_SAMUS
static const uint8_t led_to_isc[] = { 0x15, 0x18, 0x15, 0x18 };
#endif
#if defined(BOARD_RYU)
static const uint8_t led_to_isc[] = { 0x18, 0x15, 0x18, 0x15 };
#endif
#ifdef BOARD_HOST
/* For testing only */
static const uint8_t led_to_isc[] = { 0x15, 0x18, 0x15, 0x18 };

10
common/main.c
View File

@ -89,16 +89,6 @@ test_mockable __keep int main(void)
flash_pre_init();
#endif
#if defined(CONFIG_CASE_CLOSED_DEBUG) && defined(CONFIG_USB_POWER_DELIVERY)
/*
* If the device is locked we assert PD_NO_DEBUG, preventing the EC
* from interfering with the AP's access to the SPI flash.
* The PD_NO_DEBUG signal is latched in hardware, so changing this
* GPIO later has no effect.
*/
gpio_set_level(GPIO_PD_DISABLE_DEBUG, system_is_locked());
#endif
/* Set the CPU clocks / PLLs. System is now running at full speed. */
clock_init();

3
include/config.h
View File

@ -200,7 +200,6 @@
#undef CONFIG_BATTERY_BQ20Z453
#undef CONFIG_BATTERY_BQ27541
#undef CONFIG_BATTERY_BQ27621
#undef CONFIG_BATTERY_RYU
#undef CONFIG_BATTERY_SAMUS
/* Compile mock battery support; used by tests. */
@ -613,7 +612,6 @@
/* TODO: Rename below config to CONFIG_CHIPSET_RK32XX */
#undef CONFIG_CHIPSET_ROCKCHIP /* Rockchip rk32xx */
#undef CONFIG_CHIPSET_SKYLAKE /* Intel Skylake (x86) */
#undef CONFIG_CHIPSET_TEGRA /* nVidia Tegra 5 */
#undef CONFIG_CHIPSET_STONEY /* AMD Stoney (x86)*/
/* Support chipset throttling */
@ -2917,7 +2915,6 @@
#undef CONFIG_CHIPSET_RK3399
#undef CONFIG_CHIPSET_ROCKCHIP
#undef CONFIG_CHIPSET_SKYLAKE
#undef CONFIG_CHIPSET_TEGRA
#undef CONFIG_CHIPSET_STONEY
#undef CONFIG_POWER_COMMON
#undef CONFIG_POWER_TRACK_HOST_SLEEP_STATE

1
power/build.mk
View File

@ -13,5 +13,4 @@ power-$(CONFIG_CHIPSET_MEDIATEK)+=mediatek.o
power-$(CONFIG_CHIPSET_RK3399)+=rk3399.o
power-$(CONFIG_CHIPSET_ROCKCHIP)+=rockchip.o
power-$(CONFIG_CHIPSET_SKYLAKE)+=skylake.o intel_x86.o
power-$(CONFIG_CHIPSET_TEGRA)+=tegra.o
power-$(CONFIG_POWER_COMMON)+=common.o

586
power/tegra.c
View File

@ -1,586 +0,0 @@
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/*
* TEGRA SoC power sequencing module for Chrome EC
*
* This implements the following features:
*
* - Cold reset powers on the AP
*
* When powered off:
* - Press pwron turns on the AP
* - Hold pwron turns on the AP, and then 9s later turns it off and leaves
* it off until pwron is released and pressed again
*
* When powered on:
* - The PMIC PWRON signal is released <= 1 second after the power button is
* released
* - Holding pwron for 10.2s powers off the AP
* - Pressing and releasing pwron within that 10.2s is ignored
* - If XPSHOLD is dropped by the AP, then we power the AP off
* - If SUSPEND_L goes low, enter suspend mode.
*
*/
#include "battery.h"
#include "charge_state.h"
#include "chipset.h" /* This module implements chipset functions too */
#include "clock.h"
#include "common.h"
#include "console.h"
#include "gpio.h"
#include "hooks.h"
#include "lid_switch.h"
#include "keyboard_scan.h"
#include "power.h"
#include "power_button.h"
#include "power_led.h"
#include "system.h"
#include "task.h"
#include "timer.h"
#include "util.h"
/* Console output macros */
#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
/* masks for power signals */
#define IN_XPSHOLD POWER_SIGNAL_MASK(TEGRA_XPSHOLD)
#define IN_SUSPEND POWER_SIGNAL_MASK(TEGRA_SUSPEND_ASSERTED)
/* Long power key press to force shutdown */
#define DELAY_FORCE_SHUTDOWN (10200 * MSEC) /* 10.2 seconds */
/*
* The minimum time to assert the PMIC PWRON pin is 20ms.
* Give it longer to ensure the PMIC doesn't lose it.
*/
#define PMIC_PWRON_DEBOUNCE_TIME (20 * MSEC * 3)
/*
* The minimum time to assert the PMIC THERM pin is 32us. However,
* it needs to be extended to about 50ms to let the 5V rail
* dissipate fully.
*/
#define PMIC_THERM_HOLD_TIME (50 * MSEC)
/*
* If the power key is pressed to turn on, then held for this long, we
* power off.
*
* Normal case: User releases power button and chipset_task() goes
* into the inner loop, waiting for next event to occur (power button
* press or XPSHOLD == 0).
*/
#define DELAY_SHUTDOWN_ON_POWER_HOLD (10200 * MSEC) /* 10.2 seconds */
/*
* The hold time for pulling down the PMIC_WARM_RESET_L pin so that
* the AP can entery the recovery mode (flash SPI flash from USB).
*/
#define PMIC_WARM_RESET_L_HOLD_TIME (4 * MSEC)
/*
* The first time the PMIC sees power (AC or battery) it needs 200ms (+/-12%
* oscillator tolerance) for the RTC startup. In addition there is a startup
* time of approx. 0.5msec until V2_5 regulator starts up. */
#define PMIC_RTC_STARTUP (225 * MSEC)
/* TODO(crosbug.com/p/25047): move to HOOK_POWER_BUTTON_CHANGE */
/* 1 if the power button was pressed last time we checked */
static char power_button_was_pressed;
/* 1 if lid-open event has been detected */
static char lid_opened;
/* time where we will power off, if power button still held down */
static timestamp_t power_off_deadline;
/* force AP power on (used for recovery keypress) */
static int auto_power_on;
enum power_request_t {
POWER_REQ_NONE,
POWER_REQ_OFF,
POWER_REQ_ON,
POWER_REQ_COUNT,
};
static enum power_request_t power_request;
/* Forward declaration */
static void chipset_turn_off_power_rails(void);
/**
* Set the AP RESET signal.
*
* This function is for backward-compatibility.
*
* AP_RESET_L (PB3) is stuffed before rev <= 2.0 and connected to PMIC RESET.
* After rev >= 2.2, this is removed. This should not effected the new board.
*
* @param asserted Assert (=1) or deassert (=0) the signal. This is the
* logical level of the pin, not the physical level.
*/
static void set_ap_reset(int asserted)
{
/* Signal is active-low */
gpio_set_level(GPIO_AP_RESET_L, asserted ? 0 : 1);
}
/**
* Set the PMIC PWRON signal.
*
* Note that asserting requires holding for PMIC_PWRON_DEBOUNCE_TIME.
*
* @param asserted Assert (=1) or deassert (=0) the signal. This is the
* logical level of the pin, not the physical level.
*/
static void set_pmic_pwron(int asserted)
{
/* Signal is active-low */
gpio_set_level(GPIO_PMIC_PWRON_L, asserted ? 0 : 1);
}
/**
* Set the PMIC THERM to force shutdown the AP.
*
* @param asserted Assert (=1) or deassert (=0) the signal. This is the
* logical level of the pin, not the physical level.
*/
static void set_pmic_therm(int asserted)
{
/* Signal is active-low */
gpio_set_level(GPIO_PMIC_THERM_L, asserted ? 0 : 1);
}
/**
* Check for some event triggering the shutdown.
*
* It can be either a long power button press or a shutdown triggered from the
* AP and detected by reading XPSHOLD.
*
* @return non-zero if a shutdown should happen, 0 if not
*/
static int check_for_power_off_event(void)
{
timestamp_t now;
int pressed = 0;
/*
* Check for power button press.
*/
if (power_button_is_pressed()) {
pressed = 1;
} else if (power_request == POWER_REQ_OFF) {
power_request = POWER_REQ_NONE;
return 4; /* return non-zero for shutdown */
}
now = get_time();
if (pressed) {
#ifndef CONFIG_PMIC_FW_LONG_PRESS_TIMER
/*
* Only assert PMIC_PWRON if PMIC supports long-press
* power off.
*/
set_pmic_pwron(1);
usleep(PMIC_PWRON_DEBOUNCE_TIME);
#endif
if (!power_button_was_pressed) {
power_off_deadline.val = now.val + DELAY_FORCE_SHUTDOWN;
CPRINTS("power waiting for long press %u",
power_off_deadline.le.lo);
#ifdef CONFIG_PMIC_FW_LONG_PRESS_TIMER
/* Ensure we will wake up to check the power key */
timer_arm(power_off_deadline, TASK_ID_CHIPSET);
#endif
} else if (timestamp_expired(power_off_deadline, &now)) {
power_off_deadline.val = 0;
CPRINTS("power off after long press now=%u, %u",
now.le.lo, power_off_deadline.le.lo);
return 2;
}
} else if (power_button_was_pressed) {
CPRINTS("power off cancel");
set_pmic_pwron(0);
#ifdef CONFIG_PMIC_FW_LONG_PRESS_TIMER
timer_cancel(TASK_ID_CHIPSET);
#endif
}
power_button_was_pressed = pressed;
/* XPSHOLD released by AP : shutdown immediately */
if (!power_has_signals(IN_XPSHOLD))
return 3;
return 0;
}
#ifndef CONFIG_POWER_IGNORE_LID_OPEN
static void tegra_lid_event(void)
{
/* Power task only cares about lid-open events */
if (!lid_is_open())
return;
lid_opened = 1;
task_wake(TASK_ID_CHIPSET);
}
DECLARE_HOOK(HOOK_LID_CHANGE, tegra_lid_event, HOOK_PRIO_DEFAULT);
#endif /* !CONFIG_POWER_IGNORE_LID_OPEN */
enum power_state power_chipset_init(void)
{
int init_power_state;
uint32_t reset_flags = system_get_reset_flags();
/*
* Force the AP shutdown unless we are doing SYSJUMP. Otherwise,
* the AP could stay in strange state.
*/
if (!(reset_flags & RESET_FLAG_SYSJUMP)) {
CPRINTS("not sysjump; forcing AP shutdown");
chipset_turn_off_power_rails();
/*
* The warm reset triggers AP into the Tegra recovery mode (
* flash SPI from USB).
*/
chipset_reset(0);
init_power_state = POWER_G3;
} else {
/* In the SYSJUMP case, we check if the AP is on */
if (power_get_signals() & IN_XPSHOLD) {
init_power_state = POWER_S0;
disable_sleep(SLEEP_MASK_AP_RUN);
} else {
init_power_state = POWER_G3;
enable_sleep(SLEEP_MASK_AP_RUN);
}
}
/* Leave power off only if requested by reset flags */
if (!(reset_flags & RESET_FLAG_AP_OFF) &&
!(reset_flags & RESET_FLAG_SYSJUMP)) {
CPRINTS("auto_power_on set due to reset_flag 0x%x",
system_get_reset_flags());
auto_power_on = 1;
}
/*
* Some batteries use clock stretching feature, which requires
* more time to be stable. See http://crosbug.com/p/28289
*/
battery_wait_for_stable();
return init_power_state;
}
/*****************************************************************************/
/* Chipset interface */
static void chipset_turn_off_power_rails(void)
{
/* Release the power button, if it was asserted */
set_pmic_pwron(0);
/* Assert AP reset to shutdown immediately */
set_pmic_therm(1);
usleep(PMIC_THERM_HOLD_TIME);
set_pmic_therm(0);
/* Hold the reset pin so that the AP stays in off mode (rev <= 2.0) */
set_ap_reset(1);
}
void chipset_force_shutdown(void)
{
chipset_turn_off_power_rails();
/* clean-up internal variable */
power_request = POWER_REQ_NONE;
}
/*****************************************************************************/
/**
* Check if there has been a power-on event
*
* This checks all power-on event signals and returns non-zero if any have been
* triggered (with debounce taken into account).
*
* @return non-zero if there has been a power-on event, 0 if not.
*/
static int check_for_power_on_event(void)
{
int ap_off_flag;
ap_off_flag = system_get_reset_flags() & RESET_FLAG_AP_OFF;
system_clear_reset_flags(RESET_FLAG_AP_OFF);
/* check if system is already ON */
if (power_get_signals() & IN_XPSHOLD) {
if (ap_off_flag) {
CPRINTS(
"system is on, but "
"RESET_FLAG_AP_OFF is on");
return 0;
} else {
CPRINTS(
"system is on, thus clear "
"auto_power_on");
/* no need to arrange another power on */
auto_power_on = 0;
return 1;
}
}
/* power on requested at EC startup for recovery */
if (auto_power_on) {
auto_power_on = 0;
return 2;
}
/* Check lid open */
if (lid_opened) {
lid_opened = 0;
return 3;
}
/* check for power button press */
if (power_button_is_pressed())
return 4;
if (power_request == POWER_REQ_ON) {
power_request = POWER_REQ_NONE;
return 5;
}
return 0;
}
/**
* Power on the AP
*/
static void power_on(void)
{
uint64_t t;
/* Set pull-up and enable interrupt */
gpio_set_flags(power_signal_list[TEGRA_SUSPEND_ASSERTED].gpio,
GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH);
/* Make sure we de-assert the PMI_THERM_L and AP_RESET_L pin. */
set_pmic_therm(0);
set_ap_reset(0);
/*
* Before we push PMIC power button, wait for the PMI RTC ready, which
* takes PMIC_RTC_STARTUP from the AC/battery is plugged in.
*/
t = get_time().val;
if (t < PMIC_RTC_STARTUP) {
uint32_t wait = PMIC_RTC_STARTUP - t;
CPRINTS("wait for %dms for PMIC RTC start-up",
wait / MSEC);
usleep(wait);
}
/*
* When power_on() is called, we are at S5S3. Initialize components
* to ready state before AP is up.
*/
hook_notify(HOOK_CHIPSET_PRE_INIT);
/* Push the power button */
set_pmic_pwron(1);
usleep(PMIC_PWRON_DEBOUNCE_TIME);
disable_sleep(SLEEP_MASK_AP_RUN);
powerled_set_state(POWERLED_STATE_ON);
/* Call hooks now that AP is running */
hook_notify(HOOK_CHIPSET_STARTUP);
CPRINTS("AP running ...");
}
/**
* Wait for the power button to be released
*
* @param timeout_us Timeout in microseconds, or -1 to wait forever
* @return EC_SUCCESS if ok, or
* EC_ERROR_TIMEOUT if power button failed to release
*/
static int wait_for_power_button_release(unsigned int timeout_us)
{
timestamp_t deadline;
timestamp_t now = get_time();
deadline.val = now.val + timeout_us;
while (power_button_is_pressed()) {
now = get_time();
if (timeout_us < 0) {
task_wait_event(-1);
} else if (timestamp_expired(deadline, &now) ||
(task_wait_event(deadline.val - now.val) ==
TASK_EVENT_TIMER)) {
CPRINTS("power button not released in time");
return EC_ERROR_TIMEOUT;
}
}
CPRINTS("power button released");
power_button_was_pressed = 0;
return EC_SUCCESS;
}
/**
* Power off the AP
*/
static void power_off(void)
{
/* Call hooks before we drop power rails */
hook_notify(HOOK_CHIPSET_SHUTDOWN);
/* switch off all rails */
chipset_turn_off_power_rails();
/* Change SUSPEND_L pin to high-Z to reduce power draw. */
gpio_set_flags(power_signal_list[TEGRA_SUSPEND_ASSERTED].gpio,
GPIO_INPUT);
lid_opened = 0;
powerled_set_state(POWERLED_STATE_OFF);
CPRINTS("power shutdown complete");
}
void chipset_reset(int is_cold)
{
if (is_cold) {
CPRINTS("EC triggered cold reboot");
power_off();
/* After XPSHOLD is dropped off, the system will be on again */
power_request = POWER_REQ_ON;
} else {
CPRINTS("EC triggered warm reboot");
CPRINTS("assert GPIO_PMIC_WARM_RESET_L for %d ms",
PMIC_WARM_RESET_L_HOLD_TIME / MSEC);
gpio_set_level(GPIO_PMIC_WARM_RESET_L, 0);
usleep(PMIC_WARM_RESET_L_HOLD_TIME);
gpio_set_level(GPIO_PMIC_WARM_RESET_L, 1);
}
}
enum power_state power_handle_state(enum power_state state)
{
int value;
static int boot_from_g3;
switch (state) {
case POWER_G3:
boot_from_g3 = check_for_power_on_event();
if (boot_from_g3)
return POWER_G3S5;
break;
case POWER_G3S5:
return POWER_S5;
case POWER_S5:
if (boot_from_g3) {
value = boot_from_g3;
boot_from_g3 = 0;
} else {
value = check_for_power_on_event();
}
if (value) {
CPRINTS("power on %d", value);
return POWER_S5S3;
}
return state;
case POWER_S5S3:
power_on();
if (power_wait_signals(IN_XPSHOLD) == EC_SUCCESS) {
CPRINTS("XPSHOLD seen");
if (wait_for_power_button_release(
DELAY_SHUTDOWN_ON_POWER_HOLD) ==
EC_SUCCESS) {
set_pmic_pwron(0);
return POWER_S3;
} else {
CPRINTS("long-press button, shutdown");
power_off();
/*
* Since the AP may be up already, return S0S3
* state to go through the suspend hook.
*/
return POWER_S0S3;
}
} else {
CPRINTS("XPSHOLD not seen in time");
}
set_pmic_pwron(0);
return POWER_S5;
case POWER_S3:
if (!(power_get_signals() & IN_XPSHOLD))
return POWER_S3S5;
else if (!(power_get_signals() & IN_SUSPEND))
return POWER_S3S0;
return state;
case POWER_S3S0:
disable_sleep(SLEEP_MASK_AP_RUN);
powerled_set_state(POWERLED_STATE_ON);
hook_notify(HOOK_CHIPSET_RESUME);
return POWER_S0;
case POWER_S0:
value = check_for_power_off_event();
if (value) {
CPRINTS("power off %d", value);
power_off();
return POWER_S0S3;
} else if (power_get_signals() & IN_SUSPEND)
return POWER_S0S3;
return state;
case POWER_S0S3:
if (lid_is_open())
powerled_set_state(POWERLED_STATE_SUSPEND);
else
powerled_set_state(POWERLED_STATE_OFF);
/* Call hooks here since we don't know it prior to AP suspend */
hook_notify(HOOK_CHIPSET_SUSPEND);
enable_sleep(SLEEP_MASK_AP_RUN);
return POWER_S3;
case POWER_S3S5:
wait_for_power_button_release(-1);
return POWER_S5;
case POWER_S5G3:
return POWER_G3;
}
return state;
}
static void powerbtn_tegra_changed(void)
{
task_wake(TASK_ID_CHIPSET);
}
DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, powerbtn_tegra_changed,
HOOK_PRIO_DEFAULT);

3
test/build.mk
View File

@ -15,9 +15,6 @@ test-list-$(BOARD_BDS)+=
# compile with it. Disable them for now.
test-list-$(BOARD_SAMUS)=
# Ryu has issues when building tests
test-list-$(BOARD_RYU)=
# llama has issues when building tests
test-list-$(BOARD_LLAMA)=

1
util/flash_ec
View File

@ -71,7 +71,6 @@ BOARDS_STM32=(
oak_pd
pit
plankton
ryu
samus_pd
snoball
strago_pd