TCPMv2: Only include PD3.0 functionality when CONFIG_USB_PD_REV30

The TCPMv2 stack defaults to PD2.0 functionality. Defining
CONFIG_USB_PD_REV30 enables PD3.0 functionality.

BUG=b:155879504
BRANCH=none
TEST=make -j buildall
	Manual tests:
	passed FAFT_PD running on kohaku

  Before patch:
  *** 18624 bytes in flash and 29216 bytes in RAM on kohaku RO ****
  *** 18544 bytes in flash and 29216 bytes in RAM on kohaku RW ****

  After patch:
  *** 23320 bytes in flash and 30336 bytes in RAM on kohaku RO ****
  *** 23228 bytes in flash and 30336 bytes in RAM on kohaku RW ****

  Flash savings of 4696 bytest
  Ram savings of 1120

Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I082cf62617a91b487d2d3567afd5e340bd52258c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2184547
Reviewed-by: Jett Rink <jettrink@chromium.org>
This commit is contained in:
Sam Hurst 2020-05-06 08:51:08 -07:00 committed by Commit Bot
parent c92f3d36f7
commit 61efe94f1e
20 changed files with 398 additions and 138 deletions

View File

@ -66,6 +66,7 @@
#define CONFIG_USB_PD_VBUS_DETECT_NONE
#define CONFIG_USB_PD_TCPM_STUB
#define CONFIG_USB_POWER_DELIVERY
#define CONFIG_USB_PD_REV30
#define CONFIG_USB_PD_TCPMV2
#define CONFIG_USB_CTVPD
#define CONFIG_USB_PD_DECODE_SOP

View File

@ -53,8 +53,11 @@
/* USB Type C and USB PD defines */
#undef CONFIG_USB_PD_TCPMV1
#define CONFIG_USB_PD_TCPMV2 /* Use TCPMv2 */
#define CONFIG_USB_PD_REV20 /* enable PD 2.0 because we have a parade TCPC */
/*
* Enable TCPMv2. Use default PD 2.0 operation because we have a
* parade PS8751 TCPC
*/
#define CONFIG_USB_PD_TCPMV2
#define CONFIG_USB_PID 0x5047
#define CONFIG_USB_PD_DECODE_SOP
#define CONFIG_USB_PD_TRY_SRC

View File

@ -141,6 +141,7 @@
#define CONFIG_USB_PD_LOGGING
#define CONFIG_USB_PD_PORT_MAX_COUNT 2
#define CONFIG_USB_PD_TCPC_LOW_POWER
#define CONFIG_USB_PD_REV30
#define CONFIG_USB_PD_TCPMV2
#define CONFIG_USB_PD_TCPM_MUX
#define CONFIG_USB_PD_TCPM_PS8805

View File

@ -130,6 +130,7 @@
/* USB type C */
#define CONFIG_USB_PD_TCPMV2 /* Use TCPMv2 */
#define CONFIG_USB_PD_REV30 /* Enable PD 3.0 functionality */
#define CONFIG_USB_PD_DECODE_SOP
#undef CONFIG_USB_CHARGER
#define CONFIG_USB_POWER_DELIVERY

View File

@ -211,8 +211,6 @@ enum usb_pe_state {
PE_SOFT_RESET,
PE_SEND_NOT_SUPPORTED,
PE_SRC_PING,
PE_GIVE_BATTERY_CAP,
PE_GIVE_BATTERY_STATUS,
PE_DRS_EVALUATE_SWAP,
PE_DRS_CHANGE,
PE_DRS_SEND_SWAP,
@ -225,7 +223,6 @@ enum usb_pe_state {
PE_PRS_SNK_SRC_ASSERT_RP,
PE_PRS_SNK_SRC_SOURCE_ON,
PE_PRS_SNK_SRC_SEND_SWAP,
PE_FRS_SNK_SRC_START_AMS,
PE_VCS_EVALUATE_SWAP,
PE_VCS_SEND_SWAP,
PE_VCS_WAIT_FOR_VCONN_SWAP,
@ -247,8 +244,15 @@ enum usb_pe_state {
PE_BIST_RX,
PE_DR_SNK_GET_SINK_CAP,
/* PD3.0 only states below here*/
PE_FRS_SNK_SRC_START_AMS,
PE_GIVE_BATTERY_CAP,
PE_GIVE_BATTERY_STATUS,
#ifdef CONFIG_USB_PD_REV30
/* Super States */
PE_PRS_FRS_SHARED,
#endif /* CONFIG_USB_PD_REV30 */
};
/* Forward declare the full list of states. This is indexed by usb_pe_state */
@ -297,8 +301,6 @@ static const char * const pe_state_names[] = {
[PE_SOFT_RESET] = "PE_Soft_Reset",
[PE_SEND_NOT_SUPPORTED] = "PE_Send_Not_Supported",
[PE_SRC_PING] = "PE_SRC_Ping",
[PE_GIVE_BATTERY_CAP] = "PE_Give_Battery_Cap",
[PE_GIVE_BATTERY_STATUS] = "PE_Give_Battery_Status",
[PE_DRS_EVALUATE_SWAP] = "PE_DRS_Evaluate_Swap",
[PE_DRS_CHANGE] = "PE_DRS_Change",
[PE_DRS_SEND_SWAP] = "PE_DRS_Send_Swap",
@ -311,7 +313,6 @@ static const char * const pe_state_names[] = {
[PE_PRS_SNK_SRC_ASSERT_RP] = "PE_PRS_SNK_SRC_Assert_Rp",
[PE_PRS_SNK_SRC_SOURCE_ON] = "PE_PRS_SNK_SRC_Source_On",
[PE_PRS_SNK_SRC_SEND_SWAP] = "PE_PRS_SNK_SRC_Send_Swap",
[PE_FRS_SNK_SRC_START_AMS] = "PE_FRS_SNK_SRC_Start_Ams",
[PE_VCS_EVALUATE_SWAP] = "PE_VCS_Evaluate_Swap",
[PE_VCS_SEND_SWAP] = "PE_VCS_Send_Swap",
[PE_VCS_WAIT_FOR_VCONN_SWAP] = "PE_VCS_Wait_For_Vconn_Swap",
@ -333,8 +334,16 @@ static const char * const pe_state_names[] = {
[PE_BIST_TX] = "PE_Bist_TX",
[PE_BIST_RX] = "PE_Bist_RX",
[PE_DR_SNK_GET_SINK_CAP] = "PE_DR_SNK_Get_Sink_Cap",
/* PD3.0 only states below here*/
#ifdef CONFIG_USB_PD_REV30
[PE_FRS_SNK_SRC_START_AMS] = "PE_FRS_SNK_SRC_Start_Ams",
[PE_GIVE_BATTERY_CAP] = "PE_Give_Battery_Cap",
[PE_GIVE_BATTERY_STATUS] = "PE_Give_Battery_Status",
/* Super States */
[PE_PRS_FRS_SHARED] = "SS:PE_PRS_FRS_SHARED",
#endif /* CONFIG_USB_PD_REV30 */
};
#else
/*
@ -359,6 +368,22 @@ enum usb_pe_state PE_VCS_SEND_PS_RDY_SWAP_NOT_SUPPORTED;
#define PE_VCS_SEND_PS_RDY_SWAP PE_VCS_SEND_PS_RDY_SWAP_NOT_SUPPORTED
#endif /* CONFIG_USBC_VCONN */
/*
* Ensure that Invalid states don't link properly. This let's us use guard
* code with IS_ENABLED instead of ifdefs and still save flash space
*/
#ifndef CONFIG_USB_PD_REV30
extern enum usb_pe_state PE_FRS_SNK_SRC_START_AMS_NOT_SUPPORTED;
extern enum usb_pe_state PE_GIVE_BATTERY_CAP_NOT_SUPPORTED;
extern enum usb_pe_state PE_GIVE_BATTERY_STATUS_NOT_SUPPORTED;
extern enum usb_pe_state PE_PRS_FRS_SHARE_NOT_SUPPORTED;
#define PE_FRS_SNK_SRC_START_AMS PE_FRS_SNK_SRC_START_AMS_NOT_SUPPORTED
#define PE_GIVE_BATTERY_CAP PE_GIVE_BATTERY_CAP_NOT_SUPPORTED
#define PE_GIVE_BATTERY_STATUS PE_GIVE_BATTERY_STATUS_NOT_SUPPORTED
#define PE_PRS_FRS_SHARED PE_PRS_FRS_SHARED_NOT_SUPPORTED
void pe_set_frs_enable(int port, int enable);
#endif /* CONFIG_USB_PD_REV30 */
/*
* NOTE:
* DO_PORT_DISCOVERY_START is not actually a vdm command. It is used
@ -670,7 +695,8 @@ void pe_run(int port, int evt, int en)
* state once we are listening for the signal and we want to
* make sure to handle it immediately.
*/
if (PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_SIGNALED)) {
if (IS_ENABLED(CONFIG_USB_PD_REV30) &&
PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_SIGNALED)) {
PE_CLR_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_SIGNALED);
set_state_pe(port, PE_FRS_SNK_SRC_START_AMS);
}
@ -725,6 +751,7 @@ void pe_got_hard_reset(int port)
set_state_pe(port, PE_SNK_TRANSITION_TO_DEFAULT);
}
#ifdef CONFIG_USB_PD_REV30
/*
* pd_got_frs_signal
*
@ -770,10 +797,13 @@ static void pe_set_frs_enable(int port, int enable)
}
}
}
#endif /* CONFIG_USB_PD_REV30 */
void pe_invalidate_explicit_contract(int port)
{
pe_set_frs_enable(port, 0);
if (IS_ENABLED(CONFIG_USB_PD_REV30))
pe_set_frs_enable(port, 0);
PE_CLR_FLAG(port, PE_FLAGS_EXPLICIT_CONTRACT);
pd_update_saved_port_flags(port, PD_BBRMFLG_EXPLICIT_CONTRACT, 0);
}
@ -1091,7 +1121,8 @@ static void print_current_state(const int port)
{
const char *mode = "";
if (PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH))
if (IS_ENABLED(CONFIG_USB_PD_REV30) &&
PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH))
mode = " FRS-MODE";
if (IS_ENABLED(USB_PD_DEBUG_LABELS))
@ -1855,14 +1886,14 @@ static void pe_src_ready_run(int port)
/* Extended Message Requests */
if (ext > 0) {
switch (type) {
#ifdef CONFIG_BATTERY
#if defined(CONFIG_USB_PD_REV30) && defined(CONFIG_BATTERY)
case PD_EXT_GET_BATTERY_CAP:
set_state_pe(port, PE_GIVE_BATTERY_CAP);
break;
case PD_EXT_GET_BATTERY_STATUS:
set_state_pe(port, PE_GIVE_BATTERY_STATUS);
break;
#endif
#endif /* CONFIG_USB_PD_REV30 && CONFIG_BATTERY*/
default:
set_state_pe(port, PE_SEND_NOT_SUPPORTED);
}
@ -2614,14 +2645,14 @@ static void pe_snk_ready_run(int port)
/* Extended Message Request */
if (ext > 0) {
switch (type) {
#ifdef CONFIG_BATTERY
#if defined(CONFIG_USB_PD_REV30) && defined(CONFIG_BATTERY)
case PD_EXT_GET_BATTERY_CAP:
set_state_pe(port, PE_GIVE_BATTERY_CAP);
break;
case PD_EXT_GET_BATTERY_STATUS:
set_state_pe(port, PE_GIVE_BATTERY_STATUS);
break;
#endif
#endif /* CONFIG_USB_PD_REV30 && CONFIG_BATTERY */
default:
set_state_pe(port, PE_SEND_NOT_SUPPORTED);
}
@ -2992,6 +3023,12 @@ static void pe_soft_reset_run(int port)
/**
* PE_SRC_Not_Supported and PE_SNK_Not_Supported
*
* 6.7.1 Soft Reset and Protocol Error (Revision 2.0, Version 1.3)
* An unrecognized or unsupported Message (except for a Structured VDM),
* received in the PE_SNK_Ready or PE_SRC_Ready states, Shall Not cause
* a Soft_Reset Message to be generated but instead a Reject Message
* Shall be generated.
*/
static void pe_send_not_supported_entry(int port)
{
@ -3033,6 +3070,7 @@ static void pe_src_ping_run(int port)
}
}
#ifdef CONFIG_USB_PD_REV30
/**
* PE_Give_Battery_Cap
*/
@ -3200,6 +3238,7 @@ static void pe_give_battery_status_run(int port)
set_state_pe(port, PE_SRC_READY);
}
}
#endif /* CONFIG_USB_PD_REV30 */
/**
* PE_DRS_Evaluate_Swap
@ -3607,7 +3646,8 @@ static void pe_prs_snk_src_transition_to_off_entry(int port)
{
print_current_state(port);
if (!PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH))
if (!IS_ENABLED(CONFIG_USB_PD_REV30) ||
!PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH))
tc_snk_power_off(port);
pe[port].ps_source_timer = get_time().val + PD_T_PS_SOURCE_OFF;
@ -3669,11 +3709,11 @@ static void pe_prs_snk_src_assert_rp_run(int port)
{
/* Wait until TypeC is in the Attached.SRC state */
if (tc_is_attached_src(port)) {
if (!PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH)) {
if (!IS_ENABLED(CONFIG_USB_PD_REV30) ||
!PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH)) {
/* Contract is invalid now */
pe_invalidate_explicit_contract(port);
}
set_state_pe(port, PE_PRS_SNK_SRC_SOURCE_ON);
}
}
@ -3752,11 +3792,15 @@ static void pe_prs_snk_src_send_swap_entry(int port)
* bringing Vbus to vSafe5.
* Request the Protocol Layer to send a FR_Swap Message.
*/
prl_send_ctrl_msg(port,
TCPC_TX_SOP,
PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH)
? PD_CTRL_FR_SWAP
: PD_CTRL_PR_SWAP);
if (IS_ENABLED(CONFIG_USB_PD_REV30)) {
prl_send_ctrl_msg(port,
TCPC_TX_SOP,
PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH)
? PD_CTRL_FR_SWAP
: PD_CTRL_PR_SWAP);
} else {
prl_send_ctrl_msg(port, TCPC_TX_SOP, PD_CTRL_PR_SWAP);
}
/* Start the SenderResponseTimer */
pe[port].sender_response_timer =
@ -3775,10 +3819,13 @@ static void pe_prs_snk_src_send_swap_run(int port)
* 1) The SenderResponseTimer times out.
*/
if (get_time().val > pe[port].sender_response_timer)
set_state_pe(port,
PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH)
if (IS_ENABLED(CONFIG_USB_PD_REV30))
set_state_pe(port,
PE_CHK_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH)
? PE_WAIT_FOR_ERROR_RECOVERY
: PE_SNK_READY);
else
set_state_pe(port, PE_SNK_READY);
/*
* Transition to PE_PRS_SNK_SRC_Transition_to_off when:
@ -3802,12 +3849,16 @@ static void pe_prs_snk_src_send_swap_run(int port)
set_state_pe(port,
PE_PRS_SNK_SRC_TRANSITION_TO_OFF);
} else if ((type == PD_CTRL_REJECT) ||
(type == PD_CTRL_WAIT))
set_state_pe(port,
PE_CHK_FLAG(port,
(type == PD_CTRL_WAIT)) {
if (IS_ENABLED(CONFIG_USB_PD_REV30))
set_state_pe(port,
PE_CHK_FLAG(port,
PE_FLAGS_FAST_ROLE_SWAP_PATH)
? PE_WAIT_FOR_ERROR_RECOVERY
: PE_SNK_READY);
else
set_state_pe(port, PE_SNK_READY);
}
}
}
}
@ -3818,6 +3869,7 @@ static void pe_prs_snk_src_send_swap_exit(int port)
PE_CLR_FLAG(port, PE_FLAGS_TX_COMPLETE);
}
#ifdef CONFIG_USB_PD_REV30
/**
* PE_FRS_SNK_SRC_Start_AMS
*/
@ -3860,6 +3912,7 @@ static void pe_prs_frs_shared_exit(int port)
*/
PE_CLR_FLAG(port, PE_FLAGS_FAST_ROLE_SWAP_PATH);
}
#endif /* CONFIG_USB_PD_REV30 */
/**
* BIST TX
@ -5448,7 +5501,7 @@ static void pe_dr_snk_get_sink_cap_run(int port)
int type;
int cnt;
int ext;
uint32_t payload;
int rev;
/* Wait until message is sent */
if (pe[port].sender_response_timer == 0) {
@ -5479,10 +5532,13 @@ static void pe_dr_snk_get_sink_cap_run(int port)
type = PD_HEADER_TYPE(rx_emsg[port].header);
cnt = PD_HEADER_CNT(rx_emsg[port].header);
ext = PD_HEADER_EXT(rx_emsg[port].header);
payload = *(uint32_t *)rx_emsg[port].buf;
rev = PD_HEADER_REV(rx_emsg[port].header);
if (ext == 0) {
if ((cnt > 0) && (type == PD_DATA_SINK_CAP)) {
uint32_t payload =
*(uint32_t *)rx_emsg[port].buf;
/*
* Check message to see if we can handle
* FRS for this connection. Multiple PDOs
@ -5493,7 +5549,9 @@ static void pe_dr_snk_get_sink_cap_run(int port)
* TODO(b/14191267): Make sure we can handle
* the required current before we enable FRS.
*/
if (payload & PDO_FIXED_DUAL_ROLE) {
if (IS_ENABLED(CONFIG_USB_PD_REV30) &&
(rev > PD_REV20) &&
(payload & PDO_FIXED_DUAL_ROLE)) {
switch (payload &
PDO_FIXED_FRS_CURR_MASK) {
case PDO_FIXED_FRS_CURR_NOT_SUPPORTED:
@ -5571,10 +5629,12 @@ void pd_set_dfp_enter_mode_flag(int port, bool set)
static const struct usb_state pe_states[] = {
/* Super States */
#ifdef CONFIG_USB_PD_REV30
[PE_PRS_FRS_SHARED] = {
.entry = pe_prs_frs_shared_entry,
.exit = pe_prs_frs_shared_exit,
},
#endif /* CONFIG_USB_PD_REV30 */
/* Normal States */
[PE_SRC_STARTUP] = {
@ -5682,6 +5742,7 @@ static const struct usb_state pe_states[] = {
.entry = pe_src_ping_entry,
.run = pe_src_ping_run,
},
#ifdef CONFIG_USB_PD_REV30
[PE_GIVE_BATTERY_CAP] = {
.entry = pe_give_battery_cap_entry,
.run = pe_give_battery_cap_run,
@ -5690,6 +5751,7 @@ static const struct usb_state pe_states[] = {
.entry = pe_give_battery_status_entry,
.run = pe_give_battery_status_run,
},
#endif /* CONFIG_USB_PD_REV30 */
[PE_DRS_EVALUATE_SWAP] = {
.entry = pe_drs_evaluate_swap_entry,
.run = pe_drs_evaluate_swap_run,
@ -5732,32 +5794,42 @@ static const struct usb_state pe_states[] = {
[PE_PRS_SNK_SRC_TRANSITION_TO_OFF] = {
.entry = pe_prs_snk_src_transition_to_off_entry,
.run = pe_prs_snk_src_transition_to_off_run,
#ifdef CONFIG_USB_PD_REV30
.parent = &pe_states[PE_PRS_FRS_SHARED],
#endif /* CONFIG_USB_PD_REV30 */
},
/* State actions are shared with PE_FRS_SNK_SRC_ASSERT_RP */
[PE_PRS_SNK_SRC_ASSERT_RP] = {
.entry = pe_prs_snk_src_assert_rp_entry,
.run = pe_prs_snk_src_assert_rp_run,
#ifdef CONFIG_USB_PD_REV30
.parent = &pe_states[PE_PRS_FRS_SHARED],
#endif /* CONFIG_USB_PD_REV30 */
},
/* State actions are shared with PE_FRS_SNK_SRC_SOURCE_ON */
[PE_PRS_SNK_SRC_SOURCE_ON] = {
.entry = pe_prs_snk_src_source_on_entry,
.run = pe_prs_snk_src_source_on_run,
.exit = pe_prs_snk_src_source_on_exit,
#ifdef CONFIG_USB_PD_REV30
.parent = &pe_states[PE_PRS_FRS_SHARED],
#endif /* CONFIG_USB_PD_REV30 */
},
/* State actions are shared with PE_FRS_SNK_SRC_SEND_SWAP */
[PE_PRS_SNK_SRC_SEND_SWAP] = {
.entry = pe_prs_snk_src_send_swap_entry,
.run = pe_prs_snk_src_send_swap_run,
.exit = pe_prs_snk_src_send_swap_exit,
#ifdef CONFIG_USB_PD_REV30
.parent = &pe_states[PE_PRS_FRS_SHARED],
#endif /* CONFIG_USB_PD_REV30 */
},
#ifdef CONFIG_USB_PD_REV30
[PE_FRS_SNK_SRC_START_AMS] = {
.entry = pe_frs_snk_src_start_ams_entry,
.parent = &pe_states[PE_PRS_FRS_SHARED],
},
#endif /* CONFIG_USB_PD_REV30 */
#ifdef CONFIG_USBC_VCONN
[PE_VCS_EVALUATE_SWAP] = {
.entry = pe_vcs_evaluate_swap_entry,

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@ -94,6 +94,7 @@
/* Size of PDMSG Chunk Buffer */
#define CHK_BUF_SIZE 7
#define CHK_BUF_SIZE_BYTES 28
/*
* Debug log level - higher number == more log
@ -177,6 +178,7 @@ static const char * const prl_hr_state_names[] = {
= "PRL_HR_WAIT_FOR_PE_HARD_RESET_COMPLETE",
};
#ifdef CONFIG_USB_PD_REV30
static const char * const rch_state_names[] = {
[RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER]
= "RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER",
@ -199,12 +201,16 @@ static const char * const tch_state_names[] = {
[TCH_MESSAGE_SENT] = "TCH_MESSAGE_SENT",
[TCH_REPORT_ERROR] = "TCH_REPORT_ERROR",
};
#endif /* CONFIG_USB_PD_REV30 */
/* Forward declare full list of states. Index by above enums. */
static const struct usb_state prl_tx_states[];
static const struct usb_state prl_hr_states[];
#ifdef CONFIG_USB_PD_REV30
static const struct usb_state rch_states[];
static const struct usb_state tch_states[];
#endif /* CONFIG_USB_PD_REV30 */
/* Chunked Rx State Machine Object */
static struct rx_chunked {
@ -274,8 +280,6 @@ static struct pd_message {
enum tcpm_transmit_type xmit_type;
/* type of message */
uint8_t msg_type;
/* extended message */
uint8_t ext;
/* PD revision */
enum pd_rev_type rev[NUM_SOP_STAR_TYPES];
/* Number of 32-bit objects in chk_buf */
@ -285,8 +289,12 @@ static struct pd_message {
uint32_t rx_chk_buf[CHK_BUF_SIZE];
uint32_t chunk_number_expected;
uint32_t num_bytes_received;
#ifdef CONFIG_USB_PD_REV30
/* extended message */
uint8_t ext;
uint32_t chunk_number_to_send;
uint32_t send_offset;
#endif /* CONFIG_USB_PD_REV30 */
} pdmsg[CONFIG_USB_PD_PORT_MAX_COUNT];
struct extended_msg rx_emsg[CONFIG_USB_PD_PORT_MAX_COUNT];
@ -295,6 +303,51 @@ struct extended_msg tx_emsg[CONFIG_USB_PD_PORT_MAX_COUNT];
/* Common Protocol Layer Message Transmission */
static void prl_tx_construct_message(int port);
static void prl_rx_wait_for_phy_message(const int port, int evt);
static void prl_copy_msg_to_buffer(int port);
#ifndef CONFIG_USB_PD_REV30
extern enum usb_prl_tx_state PRL_TX_SRC_SOURCE_TX_NOT_SUPPORTED;
extern enum usb_prl_tx_state PRL_TX_SNK_START_AMS_NOT_SUPPORTED;
#define PRL_TX_SRC_SOURCE_TX PRL_TX_SRC_SOURCE_TX_NOT_SUPPORTED
#define PRL_TX_SNK_START_AMS PRL_TX_SNK_START_AMS_NOT_SUPPORTED
extern enum usb_rch_state
RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER_NOT_SUPPORTED;
extern enum usb_rch_state RCH_PASS_UP_MESSAGE_NOT_SUPPORTED;
extern enum usb_rch_state RCH_PROCESSING_EXTENDED_MESSAGE_NOT_SUPPORTED;
extern enum usb_rch_state RCH_REQUESTING_CHUNK_NOT_SUPPORTED;
extern enum usb_rch_state RCH_WAITING_CHUNK_NOT_SUPPORTED;
extern enum usb_rch_state RCH_REPORT_ERROR_NOT_SUPPORTED;
#define RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER \
RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER_NOT_SUPPORTED
#define RCH_PASS_UP_MESSAGE RCH_PASS_UP_MESSAGE_NOT_SUPPORTED
#define RCH_PROCESSING_EXTENDED_MESSAGE \
RCH_PROCESSING_EXTENDED_MESSAGE_NOT_SUPPORTED
#define RCH_REQUESTING_CHUNK RCH_REQUESTING_CHUNK_NOT_SUPPORTED
#define RCH_WAITING_CHUNK RCH_WAITING_CHUNK_NOT_SUPPORTED
#define RCH_REPORT_ERROR RCH_REPORT_ERROR_NOT_SUPPORTED
extern enum usb_tch_state TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE_NOT_SUPPORTED;
extern enum usb_tch_state TCH_WAIT_FOR_TRANSMISSION_COMPLETE_NOT_SUPPORTED;
extern enum usb_tch_state TCH_CONSTRUCT_CHUNKED_MESSAGE_NOT_SUPPORTED;
extern enum usb_tch_state TCH_SENDING_CHUNKED_MESSAGE_NOT_SUPPORTED;
extern enum usb_tch_state TCH_WAIT_CHUNK_REQUEST_NOT_SUPPORTED;
extern enum usb_tch_state TCH_MESSAGE_RECEIVED_NOT_SUPPORTED;
extern enum usb_tch_state TCH_MESSAGE_SENT_NOT_SUPPORTED;
extern enum usb_tch_state TCH_REPORT_ERROR_NOT_SUPPORTED;
#define TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE \
TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE_NOT_SUPPORTED
#define TCH_WAIT_FOR_TRANSMISSION_COMPLETE \
TCH_WAIT_FOR_TRANSMISSION_COMPLETE_NOT_SUPPORTED
#define TCH_CONSTRUCT_CHUNKED_MESSAGE \
TCH_CONSTRUCT_CHUNKED_MESSAGE_NOT_SUPPORTED
#define TCH_SENDING_CHUNKED_MESSAGE TCH_SENDING_CHUNKED_MESSAGE_NOT_SUPPORTED
#define TCH_WAIT_CHUNK_REQUEST TCH_WAIT_CHUNK_REQUEST_NOT_SUPPORTED
#define TCH_MESSAGE_RECEIVED TCH_MESSAGE_RECEIVED_NOT_SUPPORTED
#define TCH_MESSAGE_SENT TCH_MESSAGE_SENT_NOT_SUPPORTED
#define TCH_REPORT_ERROR TCH_REPORT_ERROR_NOT_SUPPORTED
#endif /* !CONFIG_USB_PD_REV30 */
/* Set the protocol transmit statemachine to a new state. */
static void set_state_prl_tx(const int port,
@ -341,9 +394,12 @@ static void print_current_prl_hr_state(const int port)
/* Set the chunked Rx statemachine to a new state. */
static void set_state_rch(const int port, const enum usb_rch_state new_state)
{
#ifdef CONFIG_USB_PD_REV30
set_state(port, &rch[port].ctx, &rch_states[new_state]);
#endif /* CONFIG_USB_PD_REV30 */
}
#ifdef CONFIG_USB_PD_REV30
/* Get the chunked Rx statemachine's current state. */
test_export_static enum usb_rch_state rch_get_state(const int port)
{
@ -357,20 +413,27 @@ static void print_current_rch_state(const int port)
CPRINTS("C%d: %s", port,
rch_state_names[rch_get_state(port)]);
}
#endif /* CONFIG_USB_PD_REV30 */
/* Set the chunked Tx statemachine to a new state. */
static void set_state_tch(const int port, const enum usb_tch_state new_state)
{
#ifdef CONFIG_USB_PD_REV30
set_state(port, &tch[port].ctx, &tch_states[new_state]);
#endif /* CONFIG_USB_PD_REV30 */
}
/* Get the chunked Tx statemachine's current state. */
test_export_static enum usb_tch_state tch_get_state(const int port)
{
#ifdef CONFIG_USB_PD_REV30
return tch[port].ctx.current - &tch_states[0];
#else
return 0;
#endif /* CONFIG_USB_PD_REV30 */
}
#ifdef CONFIG_USB_PD_REV30
/* Print the chunked Tx statemachine's current state. */
static void print_current_tch_state(const int port)
{
@ -378,7 +441,7 @@ static void print_current_tch_state(const int port)
CPRINTS("C%d: %s", port,
tch_state_names[tch_get_state(port)]);
}
#endif /* CONFIG_USB_PD_REV30 */
void pd_transmit_complete(int port, int status)
{
@ -421,8 +484,10 @@ static void prl_init(int port)
prl_tx[port].last_xmit_type = TCPC_TX_SOP;
prl_tx[port].xmit_status = TCPC_TX_UNSET;
#ifdef CONFIG_USB_PD_REV30
tch[port].flags = 0;
rch[port].flags = 0;
#endif /* CONFIG_USB_PD_REV30 */
/*
* Initialize to highest revision supported. If the port or cable
@ -447,11 +512,13 @@ static void prl_init(int port)
prl_tx[port].ctx = cleared;
set_state_prl_tx(port, PRL_TX_PHY_LAYER_RESET);
#ifdef CONFIG_USB_PD_REV30
rch[port].ctx = cleared;
set_state_rch(port, RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER);
tch[port].ctx = cleared;
set_state_tch(port, TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE);
#endif /* CONFIG_USB_PD_REV30 */
prl_hr[port].ctx = cleared;
set_state_prl_hr(port, PRL_HR_WAIT_FOR_REQUEST);
@ -486,10 +553,17 @@ void prl_send_ctrl_msg(int port,
{
pdmsg[port].xmit_type = type;
pdmsg[port].msg_type = msg;
#ifdef CONFIG_USB_PD_REV30
pdmsg[port].ext = 0;
tx_emsg[port].len = 0;
TCH_SET_FLAG(port, PRL_FLAGS_MSG_XMIT);
#else
pdmsg[port].data_objs = 0;
PRL_TX_SET_FLAG(port, PRL_FLAGS_MSG_XMIT);
#endif /* CONFIG_USB_PD_REV30 */
task_set_event(PD_PORT_TO_TASK_ID(port), PD_EVENT_SM, 0);
}
@ -499,12 +573,20 @@ void prl_send_data_msg(int port,
{
pdmsg[port].xmit_type = type;
pdmsg[port].msg_type = msg;
#ifdef CONFIG_USB_PD_REV30
pdmsg[port].ext = 0;
TCH_SET_FLAG(port, PRL_FLAGS_MSG_XMIT);
#else
prl_copy_msg_to_buffer(port);
PRL_TX_SET_FLAG(port, PRL_FLAGS_MSG_XMIT);
#endif /* CONFIG_USB_PD_REV30 */
task_set_event(PD_PORT_TO_TASK_ID(port), PD_EVENT_SM, 0);
}
#ifdef CONFIG_USB_PD_REV30
void prl_send_ext_data_msg(int port,
enum tcpm_transmit_type type,
enum pd_ext_msg_type msg)
@ -516,6 +598,7 @@ void prl_send_ext_data_msg(int port,
TCH_SET_FLAG(port, PRL_FLAGS_MSG_XMIT);
task_set_event(PD_PORT_TO_TASK_ID(port), PD_EVENT_SM, 0);
}
#endif /* CONFIG_USB_PD_REV30 */
void prl_reset(int port)
{
@ -549,11 +632,13 @@ void prl_run(int port, int evt, int en)
/* Run Protocol Layer Message Reception */
prl_rx_wait_for_phy_message(port, evt);
#ifdef CONFIG_USB_PD_REV30
/* Run RX Chunked state machine */
run_state(port, &rch[port].ctx);
/* Run TX Chunked state machine */
run_state(port, &tch[port].ctx);
#endif /* CONFIG_USB_PD_REV30 */
/* Run Protocol Layer Message Transmission state machine */
run_state(port, &prl_tx[port].ctx);
@ -581,10 +666,39 @@ enum pd_rev_type prl_get_rev(int port, enum tcpm_transmit_type type)
return pdmsg[port].rev[type];
}
static void prl_copy_msg_to_buffer(int port)
{
/*
* Make sure the Policy Engine isn't sending
* more than CHK_BUF_SIZE_BYTES. If so,
* truncate len. This will surely send a
* malformed packet resulting in the port
* partner soft\hard resetting us.
*/
if (tx_emsg[port].len > CHK_BUF_SIZE_BYTES)
tx_emsg[port].len = CHK_BUF_SIZE_BYTES;
/* Copy message to chunked buffer */
memset((uint8_t *)pdmsg[port].tx_chk_buf, 0, CHK_BUF_SIZE_BYTES);
memcpy((uint8_t *)pdmsg[port].tx_chk_buf, (uint8_t *)tx_emsg[port].buf,
tx_emsg[port].len);
/*
* Pad length to 4-byte boundary and
* convert to number of 32-bit objects.
* Since the value is shifted right by 2,
* no need to explicitly clear the lower
* 2-bits.
*/
pdmsg[port].data_objs = (tx_emsg[port].len + 3) >> 2;
}
static int pdmsg_xmit_type_is_rev30(const int port)
{
return ((pdmsg[port].xmit_type < NUM_SOP_STAR_TYPES)
if (IS_ENABLED(CONFIG_USB_PD_REV30))
return ((pdmsg[port].xmit_type < NUM_SOP_STAR_TYPES)
&& (prl_get_rev(port, pdmsg[port].xmit_type) == PD_REV30));
else
return 0;
}
/* Common Protocol Layer Message Transmission */
@ -616,8 +730,8 @@ static void prl_tx_wait_for_message_request_entry(const int port)
static void prl_tx_wait_for_message_request_run(const int port)
{
if (pdmsg_xmit_type_is_rev30(port)
&& PRL_TX_CHK_FLAG(port,
if (IS_ENABLED(CONFIG_USB_PD_REV30) &&
pdmsg_xmit_type_is_rev30(port) && PRL_TX_CHK_FLAG(port,
(PRL_FLAGS_START_AMS | PRL_FLAGS_END_AMS))) {
if (pd_get_power_role(port) == PD_ROLE_SOURCE) {
/*
@ -711,6 +825,7 @@ static void prl_tx_discard_message_entry(const int port)
set_state_prl_tx(port, PRL_TX_PHY_LAYER_RESET);
}
#ifdef CONFIG_USB_PD_REV30
/*
* PrlTxSrcSourceTx
*/
@ -748,6 +863,7 @@ static void prl_tx_snk_start_ams_run(const int port)
set_state_prl_tx(port, PRL_TX_SNK_PENDING);
}
}
#endif /* CONFIG_USB_PD_REV30 */
/*
* PrlTxLayerResetForTransmit
@ -773,6 +889,13 @@ static void prl_tx_layer_reset_for_transmit_run(const int port)
static uint32_t get_sop_star_header(const int port)
{
const int is_sop_packet = pdmsg[port].xmit_type == TCPC_TX_SOP;
int ext;
#ifdef CONFIG_USB_PD_REV30
ext = pdmsg[port].ext;
#else
ext = 0;
#endif
/* SOP vs SOP'/SOP" headers are different. Replace fields as needed */
return PD_HEADER(
@ -784,7 +907,7 @@ static uint32_t get_sop_star_header(const int port)
prl_tx[port].msg_id_counter[pdmsg[port].xmit_type],
pdmsg[port].data_objs,
pdmsg[port].rev[pdmsg[port].xmit_type],
pdmsg[port].ext);
ext);
}
static void prl_tx_construct_message(const int port)
@ -821,6 +944,8 @@ static void prl_tx_wait_for_phy_response_entry(const int port)
static void prl_tx_wait_for_phy_response_run(const int port)
{
int pd3_retry_check;
/* Wait until TX is complete */
/*
@ -839,24 +964,35 @@ static void prl_tx_wait_for_phy_response_run(const int port)
/* Increment check RetryCounter */
prl_tx[port].retry_counter++;
#ifdef CONFIG_USB_PD_REV30
pd3_retry_check = (pdmsg[port].ext &&
PD_EXT_HEADER_DATA_SIZE(GET_EXT_HEADER(
pdmsg[port].tx_chk_buf[0]) > 26));
#else
pd3_retry_check = 0;
#endif /* CONFIG_USB_PD_REV30 */
/*
* (RetryCounter > nRetryCount) | Large Extended Message
*/
if (prl_tx[port].retry_counter > N_RETRY_COUNT ||
(pdmsg[port].ext &&
PD_EXT_HEADER_DATA_SIZE(GET_EXT_HEADER(
pdmsg[port].tx_chk_buf[0]) > 26))) {
pd3_retry_check) {
/*
* NOTE: PRL_Tx_Transmission_Error State embedded
* here.
*/
/*
* State tch_wait_for_transmission_complete will
* inform policy engine of error
*/
PDMSG_SET_FLAG(port, PRL_FLAGS_TX_ERROR);
if (IS_ENABLED(CONFIG_USB_PD_REV30)) {
/*
* State tch_wait_for_transmission_complete will
* inform policy engine of error
*/
PDMSG_SET_FLAG(port, PRL_FLAGS_TX_ERROR);
} else {
/* Report Error To Policy Engine */
pe_report_error(port, ERR_TCH_XMIT,
prl_tx[port].last_xmit_type);
}
/* Increment message id counter */
increment_msgid_counter(port);
@ -871,11 +1007,15 @@ static void prl_tx_wait_for_phy_response_run(const int port)
}
} else if (prl_tx[port].xmit_status == TCPC_TX_COMPLETE_SUCCESS) {
/* NOTE: PRL_TX_Message_Sent State embedded here. */
/* Increment messageId counter */
increment_msgid_counter(port);
/* Inform Policy Engine Message was sent */
PDMSG_SET_FLAG(port, PRL_FLAGS_TX_COMPLETE);
if (IS_ENABLED(CONFIG_USB_PD_REV30))
PDMSG_SET_FLAG(port, PRL_FLAGS_TX_COMPLETE);
else
pe_message_sent(port);
/*
* This event reduces the time of informing the policy engine of
* the transmission by one state machine cycle
@ -994,8 +1134,11 @@ static void prl_hr_reset_layer_entry(const int port)
*/
set_state_prl_tx(port, PRL_TX_WAIT_FOR_MESSAGE_REQUEST);
#ifdef CONFIG_USB_PD_REV30
tch[port].flags = 0;
rch[port].flags = 0;
#endif /* CONFIG_USB_PD_REV30 */
pdmsg[port].flags = 0;
/* Reset message ids */
@ -1088,8 +1231,10 @@ static void prl_hr_wait_for_pe_hard_reset_complete_exit(const int port)
/* Exit from Hard Reset */
set_state_prl_tx(port, PRL_TX_PHY_LAYER_RESET);
set_state_rch(port, RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER);
set_state_tch(port, TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE);
if (IS_ENABLED(CONFIG_USB_PD_REV30)) {
set_state_rch(port, RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER);
set_state_tch(port, TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE);
}
}
static void copy_chunk_to_ext(int port)
@ -1106,6 +1251,7 @@ static void copy_chunk_to_ext(int port)
rx_emsg[port].len = pdmsg[port].num_bytes_received;
}
#ifdef CONFIG_USB_PD_REV30
/*
* Chunked Rx State Machine
*/
@ -1466,29 +1612,9 @@ static void tch_wait_for_message_request_from_pe_run(const int port)
* Non-Extended Message Request
*/
{
/* Make sure buffer doesn't overflow */
if (tx_emsg[port].len > BUFFER_SIZE) {
tch[port].error = ERR_TCH_XMIT;
set_state_tch(port, TCH_REPORT_ERROR);
return;
}
/* NOTE: TCH_Pass_Down_Message embedded here */
/* Copy message to chunked buffer */
memset((uint8_t *)pdmsg[port].tx_chk_buf,
0, BUFFER_SIZE);
memcpy((uint8_t *)pdmsg[port].tx_chk_buf,
(uint8_t *)tx_emsg[port].buf,
tx_emsg[port].len);
/*
* Pad length to 4-byte boundary and
* convert to number of 32-bit objects.
* Since the value is shifted right by 2,
* no need to explicitly clear the lower
* 2-bits.
*/
pdmsg[port].data_objs =
(tx_emsg[port].len + 3) >> 2;
prl_copy_msg_to_buffer(port);
/* Pass Message to Protocol Layer */
PRL_TX_SET_FLAG(port, PRL_FLAGS_MSG_XMIT);
set_state_tch(port,
@ -1722,6 +1848,7 @@ static void tch_report_error_entry(const int port)
pe_report_error(port, tch[port].error, prl_tx[port].last_xmit_type);
set_state_tch(port, TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE);
}
#endif /* CONFIG_USB_PD_REV30 */
/*
* Protocol Layer Message Reception State Machine
@ -1784,8 +1911,13 @@ static void prl_rx_wait_for_phy_message(const int port, int evt)
/* Soft Reset occurred */
set_state_prl_tx(port, PRL_TX_PHY_LAYER_RESET);
set_state_rch(port, RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER);
set_state_tch(port, TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE);
if (IS_ENABLED(CONFIG_USB_PD_REV30)) {
set_state_rch(port,
RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER);
set_state_tch(port,
TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE);
}
}
/*
@ -1798,51 +1930,58 @@ static void prl_rx_wait_for_phy_message(const int port, int evt)
* Discard any pending tx message if this is
* not a ping message
*/
if (pdmsg_xmit_type_is_rev30(port)
&& (cnt == 0)
&& (type != PD_CTRL_PING)) {
if ((cnt > 0) || (type != PD_CTRL_PING)) {
if (prl_tx_get_state(port) == PRL_TX_SRC_PENDING ||
prl_tx_get_state(port) == PRL_TX_SNK_PENDING)
prl_tx_get_state(port) == PRL_TX_SNK_PENDING)
set_state_prl_tx(port, PRL_TX_DISCARD_MESSAGE);
}
/* Store Message Id */
prl_rx[port].msg_id[prl_rx[port].sop] = msid;
/* RTR Chunked Message Router States. */
/*
* Received Ping from Protocol Layer
*/
if (cnt == 0 && type == PD_CTRL_PING) {
/* NOTE: RTR_PING State embedded here. */
rx_emsg[port].len = 0;
if (IS_ENABLED(CONFIG_USB_PD_REV30)) {
/* RTR Chunked Message Router States. */
/*
* Received Ping from Protocol Layer
*/
if (cnt == 0 && type == PD_CTRL_PING) {
/* NOTE: RTR_PING State embedded here. */
rx_emsg[port].len = 0;
pe_message_received(port);
return;
}
/*
* Message (not Ping) Received from
* Protocol Layer & Doing Tx Chunks
*/
else if (tch_get_state(port) !=
TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE &&
tch_get_state(port) !=
TCH_WAIT_FOR_TRANSMISSION_COMPLETE) {
/* NOTE: RTR_TX_CHUNKS State embedded here. */
/*
* Send Message to Tx Chunk
* Chunk State Machine
*/
TCH_SET_FLAG(port, PRL_FLAGS_MSG_RECEIVED);
}
/*
* Message (not Ping) Received from
* Protocol Layer & Not Doing Tx Chunks
*/
else {
/* NOTE: RTR_RX_CHUNKS State embedded here. */
/*
* Send Message to Rx
* Chunk State Machine
*/
RCH_SET_FLAG(port, PRL_FLAGS_MSG_RECEIVED);
}
} else {
/* Copy chunk to extended buffer */
copy_chunk_to_ext(port);
/* Send message to Policy Engine */
pe_message_received(port);
return;
}
/*
* Message (not Ping) Received from
* Protocol Layer & Doing Tx Chunks
*/
else if (tch_get_state(port) != TCH_WAIT_FOR_MESSAGE_REQUEST_FROM_PE &&
tch_get_state(port) != TCH_WAIT_FOR_TRANSMISSION_COMPLETE) {
/* NOTE: RTR_TX_CHUNKS State embedded here. */
/*
* Send Message to Tx Chunk
* Chunk State Machine
*/
TCH_SET_FLAG(port, PRL_FLAGS_MSG_RECEIVED);
}
/*
* Message (not Ping) Received from
* Protocol Layer & Not Doing Tx Chunks
*/
else {
/* NOTE: RTR_RX_CHUNKS State embedded here. */
/*
* Send Message to Rx
* Chunk State Machine
*/
RCH_SET_FLAG(port, PRL_FLAGS_MSG_RECEIVED);
}
task_set_event(PD_PORT_TO_TASK_ID(port), PD_EVENT_SM, 0);
@ -1867,6 +2006,7 @@ static const struct usb_state prl_tx_states[] = {
.run = prl_tx_wait_for_phy_response_run,
.exit = prl_tx_wait_for_phy_response_exit,
},
#ifdef CONFIG_USB_PD_REV30
[PRL_TX_SRC_SOURCE_TX] = {
.entry = prl_tx_src_source_tx_entry,
.run = prl_tx_src_source_tx_run,
@ -1875,6 +2015,7 @@ static const struct usb_state prl_tx_states[] = {
.entry = prl_tx_snk_start_ams_entry,
.run = prl_tx_snk_start_ams_run,
},
#endif /* CONFIG_USB_PD_REV30 */
[PRL_TX_SRC_PENDING] = {
.entry = prl_tx_src_pending_entry,
.run = prl_tx_src_pending_run,
@ -1909,6 +2050,7 @@ static const struct usb_state prl_hr_states[] = {
},
};
#ifdef CONFIG_USB_PD_REV30
/* All necessary Chunked Rx states (Section 6.11.2.1.2) */
static const struct usb_state rch_states[] = {
[RCH_WAIT_FOR_MESSAGE_FROM_PROTOCOL_LAYER] = {
@ -1969,6 +2111,7 @@ static const struct usb_state tch_states[] = {
.entry = tch_report_error_entry,
},
};
#endif
#ifdef TEST_BUILD
@ -1985,6 +2128,7 @@ const struct test_sm_data test_prl_sm_data[] = {
.names = prl_hr_state_names,
.names_size = ARRAY_SIZE(prl_hr_state_names),
},
#ifdef CONFIG_USB_PD_REV30
{
.base = rch_states,
.size = ARRAY_SIZE(rch_states),
@ -1997,11 +2141,14 @@ const struct test_sm_data test_prl_sm_data[] = {
.names = tch_state_names,
.names_size = ARRAY_SIZE(tch_state_names),
},
#endif /* CONFIG_USB_PD_REV30 */
};
BUILD_ASSERT(ARRAY_SIZE(prl_tx_states) == ARRAY_SIZE(prl_tx_state_names));
BUILD_ASSERT(ARRAY_SIZE(prl_hr_states) == ARRAY_SIZE(prl_hr_state_names));
#ifdef CONFIG_USB_PD_REV30
BUILD_ASSERT(ARRAY_SIZE(rch_states) == ARRAY_SIZE(rch_state_names));
BUILD_ASSERT(ARRAY_SIZE(tch_states) == ARRAY_SIZE(tch_state_names));
#endif /* CONFIG_USB_PD_REV30 */
const int test_prl_sm_data_size = ARRAY_SIZE(test_prl_sm_data);
#endif

View File

@ -14,6 +14,7 @@ Boards may enable TCPMv2 by adding the following defines:
* `CONFIG_USB_DRP_ACC_TRYSRC`: Configures the type of state machine to run (in this case, a DRP which performs Try.SRC behavior). Currently available are DRP and charge-through Vconn-powered device options
* `CONFIG_USB_PD_DECODE_SOP`: Sets up messaging for SOP and SOP, which is strongly encouraged in the TCPMv2 code moving forward
* `CONFIG_USB_PID 0x1234`: Sets the USB Product Identifier. This will be shared for all boards within one reference design, and new PIDs may be requested by sending an email to the ChromeOS FW Team.
* `CONFIG_USB_PD_REV30`: The TCPMv2 stack defaults to PD2.0 operation but defining this macro enables PD3.0 functionality.
Other configurations to specify behaviors within the task still apply (ex. `CONFIG_USB_PD_ALT_MODE_DFP` and `CONFIG_USB_PD_TCPC_LOW_POWER`).

View File

@ -37,8 +37,7 @@
#ifdef CONFIG_USB_PD_TCPM_PS8751
/* PS8751 cannot run with PD 3.0 (see b/148554997 for details) */
#if (defined(CONFIG_USB_PD_TCPMV1) && defined(CONFIG_USB_PD_REV30)) || \
(defined(CONFIG_USB_PD_TCPMV2) && !defined(CONFIG_USB_PD_REV20))
#if defined(CONFIG_USB_PD_REV30)
#error "PS8751 cannot run with PD 3.0. Fall back to using PD 2.0"
#endif

View File

@ -9,7 +9,8 @@
fuzz-test-list-host =
# Fuzzers should only be built for architectures that support sanitizers.
ifeq ($(ARCH),amd64)
fuzz-test-list-host += host_command_fuzz usb_pd_fuzz usb_tcpm_v2_fuzz
fuzz-test-list-host += host_command_fuzz usb_pd_fuzz usb_tcpm_v2_rev20_fuzz \
usb_tcpm_v2_rev30_fuzz
endif
# For fuzzing targets libec.a is built from the ro objects and hides functions
@ -26,4 +27,7 @@ endif
# Otherwise use <obj_name>-y
host_command_fuzz-y = host_command_fuzz.o
usb_pd_fuzz-y = usb_pd_fuzz.o
usb_tcpm_v2_fuzz-y = usb_pd_fuzz.o usb_tcpm_v2_fuzz.o ../test/fake_battery.o
usb_tcpm_v2_rev30_fuzz-y = usb_pd_fuzz.o usb_tcpm_v2_rev30_fuzz.o \
../test/fake_battery.o
usb_tcpm_v2_rev20_fuzz-y = usb_pd_fuzz.o usb_tcpm_v2_rev20_fuzz.o \
../test/fake_battery.o

View File

@ -41,7 +41,28 @@
#define CONFIG_SW_CRC
#endif /* TEST_USB_PD_FUZZ */
#ifdef TEST_USB_TCPM_V2_FUZZ
#ifdef TEST_USB_TCPM_V2_REV30_FUZZ
#define CONFIG_USB_PD_DUAL_ROLE
#define CONFIG_USB_PD_PORT_MAX_COUNT 2
#define CONFIG_USB_PD_TCPC_LOW_POWER
#define CONFIG_USB_PD_TRY_SRC
#define CONFIG_USB_PID 0x5555
#define CONFIG_USB_POWER_DELIVERY
#define CONFIG_USB_PRL_SM
#define CONFIG_USB_PD_REV30
#define CONFIG_USB_PD_TCPMV2
#define CONFIG_USB_PD_DECODE_SOP
#define CONFIG_USB_DRP_ACC_TRYSRC
#define CONFIG_USB_PD_ALT_MODE_DFP
#define CONFIG_USBC_SS_MUX
#define CONFIG_USBC_VCONN
#define CONFIG_USBC_VCONN_SWAP
#define PD_VCONN_SWAP_DELAY 5000
#define CONFIG_SHA256
#define CONFIG_SW_CRC
#endif /* TEST_USB_TCPM_V2_REV30_FUZZ */
#ifdef TEST_USB_TCPM_V2_REV20_FUZZ
#define CONFIG_USB_PD_DUAL_ROLE
#define CONFIG_USB_PD_PORT_MAX_COUNT 2
#define CONFIG_USB_PD_TCPC_LOW_POWER
@ -59,7 +80,7 @@
#define PD_VCONN_SWAP_DELAY 5000
#define CONFIG_SHA256
#define CONFIG_SW_CRC
#endif /* TEST_USB_TCPM_V2_FUZZ */
#endif /* TEST_USB_TCPM_V2_REV20_FUZZ */
#endif /* TEST_FUZZ */
#endif /* __FUZZ_FUZZ_CONFIG_H */

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@ -1,4 +1,4 @@
/* Copyright 2019 The Chromium OS Authors. All rights reserved.
/* Copyright 2020 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@ -30,3 +30,4 @@ int pd_check_vconn_swap(int port)
{
return 1;
}

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@ -9,3 +9,4 @@
#define CONFIG_TEST_TASK_LIST \
TASK_TEST(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
TASK_TEST(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE)

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@ -0,0 +1 @@
usb_tcpm_v2_rev20_fuzz.c

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@ -0,0 +1 @@
usb_tcpm_v2_rev20_fuzz.mocklist

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@ -0,0 +1 @@
usb_tcpm_v2_rev20_fuzz.tasklist

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@ -3795,18 +3795,8 @@
#undef CONFIG_USB_PD_GIVE_BACK
/*
* Enable USB PD Rev2.0 features only
* NOTE:
* This flag is only used with TCPMv2. The TCPMv2 stack defaults to PD3.0
* and this flag disabled PD3.0 features.
*/
#undef CONFIG_USB_PD_REV20
/*
* Enable USB PD Rev3.0 features
* NOTE:
* This flag is only used with TCPMv1. The TCPMv1 stack defaults to PD2.0
* and this flag enabled PD3.0 features.
* PD Rev2.0 functionality is enabled by default. Defining this macro
* enables PD Rev3.0 functionality.
*/
#undef CONFIG_USB_PD_REV30
@ -4599,7 +4589,6 @@
#endif
#endif
/******************************************************************************/
/*
* Ensure that CONFIG_USB_PD_TCPMV2 is being used with exactly one device type

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@ -8,8 +8,11 @@
#ifndef __CROS_EC_USB_EBUF_H
#define __CROS_EC_USB_EBUF_H
#ifdef CONFIG_USB_PD_REV30
#define EXTENDED_BUFFER_SIZE 260
#define BUFFER_SIZE 28
#else
#define EXTENDED_BUFFER_SIZE 28
#endif
struct extended_msg {
uint32_t header;

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@ -314,6 +314,7 @@ int ncp15wb_calculate_temp(uint16_t adc);
#if defined(TEST_USB_PRL)
#define CONFIG_USB_PD_PORT_MAX_COUNT 1
#define CONFIG_USB_PD_REV30
#define CONFIG_USB_PD_TCPMV2
#undef CONFIG_USB_PE_SM
#undef CONFIG_USB_TYPEC_SM
@ -333,6 +334,7 @@ int ncp15wb_calculate_temp(uint16_t adc);
#define CONFIG_USB_PID 0x5036
#define CONFIG_USB_POWER_DELIVERY
#undef CONFIG_USB_PRL_SM
#define CONFIG_USB_PD_REV30
#define CONFIG_USB_PD_TCPMV2
#define CONFIG_USB_PD_DECODE_SOP
#undef CONFIG_USB_TYPEC_SM
@ -359,6 +361,7 @@ int ncp15wb_calculate_temp(uint16_t adc);
#define VPD_GND_IMPEDANCE 33
#define CONFIG_USB_PD_PORT_MAX_COUNT 1
#define CONFIG_USB_PD_REV30
#define CONFIG_USB_PD_TCPMV2
#define CONFIG_USB_PE_SM
#define CONFIG_USB_PRL_SM

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@ -109,8 +109,6 @@ enum usb_pe_state {
PE_SOFT_RESET,
PE_SEND_NOT_SUPPORTED,
PE_SRC_PING,
PE_GIVE_BATTERY_CAP,
PE_GIVE_BATTERY_STATUS,
PE_DRS_EVALUATE_SWAP,
PE_DRS_CHANGE,
PE_DRS_SEND_SWAP,
@ -123,7 +121,6 @@ enum usb_pe_state {
PE_PRS_SNK_SRC_ASSERT_RP,
PE_PRS_SNK_SRC_SOURCE_ON,
PE_PRS_SNK_SRC_SEND_SWAP,
PE_FRS_SNK_SRC_START_AMS,
PE_VCS_EVALUATE_SWAP,
PE_VCS_SEND_SWAP,
PE_VCS_WAIT_FOR_VCONN_SWAP,
@ -131,16 +128,29 @@ enum usb_pe_state {
PE_VCS_TURN_OFF_VCONN_SWAP,
PE_VCS_SEND_PS_RDY_SWAP,
PE_DO_PORT_DISCOVERY,
PE_VDM_SEND_REQUEST,
PE_VDM_IDENTITY_REQUEST_CBL,
PE_INIT_PORT_VDM_IDENTITY_REQUEST,
PE_INIT_VDM_SVIDS_REQUEST,
PE_INIT_VDM_MODES_REQUEST,
PE_VDM_REQUEST,
PE_VDM_ACKED,
PE_VDM_RESPONSE,
PE_HANDLE_CUSTOM_VDM_REQUEST,
PE_WAIT_FOR_ERROR_RECOVERY,
PE_BIST,
PE_BIST_TX,
PE_BIST_RX,
PE_DR_SNK_GET_SINK_CAP,
/* PD3.0 only states below here*/
PE_FRS_SNK_SRC_START_AMS,
PE_GIVE_BATTERY_CAP,
PE_GIVE_BATTERY_STATUS,
#ifdef CONFIG_USB_PD_REV30
/* Super States */
PE_PRS_FRS_SHARED,
#endif
};
void set_state_pe(const int port, const enum usb_pe_state new_state);