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sc7180: Increase delays between enabling switchcap and enabling PMIC 

According to some experiments, the current delays are not enough on
some boards. Add larger margin to the value. Also do the same on the
power-off sequence delay.

BRANCH=Trogdor
BUG=b:163613549
TEST=Made DUT transit to DEV mode and the next auto-boot worked fine.

Change-Id: Ia72c725fe1e8ff795e637e1b4b99b097478bcc1a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2565635
Commit-Queue: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
This commit is contained in:
Wai-Hong Tam 2020-11-30 11:35:44 -08:00 committed by Commit Bot
parent 7e0d430378
commit 2f7eec59e7
1 changed files with 5 additions and 5 deletions
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10
power/sc7180.c
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@ -88,17 +88,17 @@
/*
* Delay between power-on the system and power-on the PMIC.
* Some latest PMIC firmware needs this delay longer, for doing a cold
* reboot. Did an experiment; it should be 100ms+. Set it with margin.
* reboot. Did an experiment; it should be 120ms+. Set it with margin.
*/
#define SYSTEM_POWER_ON_DELAY (110 * MSEC)
#define SYSTEM_POWER_ON_DELAY (150 * MSEC)
/*
* Delay between the PMIC power drop and power-off the system.
* Qualcomm measured the entire POFF duration is around 70ms. Setting
* this delay to 70ms is more than enough, as the PMIC power drop is in
* the middle of POFF duration.
* this delay to the same value as the above power-on sequence, which
* has much safer margin.
*/
#define PMIC_POWER_OFF_DELAY (70 * MSEC)
#define PMIC_POWER_OFF_DELAY (150 * MSEC)
/* The AP_RST_L transition count of a normal AP warm reset */
#define EXPECTED_AP_RST_TRANSITIONS 3