diff --git a/core/riscv-rv32i/build.mk b/core/riscv-rv32i/build.mk
index 5515eb79b0..c315148dcb 100644
--- a/core/riscv-rv32i/build.mk
+++ b/core/riscv-rv32i/build.mk
@@ -14,4 +14,4 @@ $(call set-option,CROSS_COMPILE,$(CROSS_COMPILE_riscv),\
 CFLAGS_CPU+=-march=rv32imafc -mabi=ilp32f -Os
 LDFLAGS_EXTRA+=-mrelax
 
-core-y=cpu.o init.o panic.o task.o switch.o __builtin.o
+core-y=cpu.o init.o panic.o task.o switch.o __builtin.o math.o
diff --git a/core/riscv-rv32i/include/math.h b/core/riscv-rv32i/include/math.h
new file mode 100644
index 0000000000..f17144762a
--- /dev/null
+++ b/core/riscv-rv32i/include/math.h
@@ -0,0 +1,13 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Math utility functions for RISC-V */
+
+#ifndef __CROS_EC_MATH_H
+#define __CROS_EC_MATH_H
+
+float sqrtf(float x);
+
+#endif  /* __CROS_EC_MATH_H */
diff --git a/core/riscv-rv32i/math.c b/core/riscv-rv32i/math.c
new file mode 100644
index 0000000000..591a67eb8f
--- /dev/null
+++ b/core/riscv-rv32i/math.c
@@ -0,0 +1,19 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "common.h"
+
+#ifdef CONFIG_FPU
+/* Single precision floating point square root. */
+float sqrtf(float x)
+{
+	asm volatile (
+		"fsqrt.s %0, %1"
+		: "=f" (x)
+		: "f" (x));
+
+	return x;
+}
+#endif