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ish: fix reading current interrupt vector 

When we switched to using REG32 macros for registers, we made
a mistake in using address of LAPIC's ISR.

The original CL that changed this was CL:1586458

BRANCH=none
BUG=none
TEST=Tested on Arcada platform

Change-Id: Ia64806a4cb0fa5d150b41407b0f6c9f34f0168e8
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1611746
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
This commit is contained in:
Hyungwoo Yang 2019-05-14 08:23:58 -07:00 committed by chrome-bot
parent 45434aed20
commit 0ef828836e
2 changed files with 5 additions and 4 deletions
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3
chip/ish/registers.h
View File

@ -321,7 +321,8 @@ enum ish_i2c_port {
/* Bare address needed for assembler (ISH_LAPIC_BASE + 0xB0) */
#define LAPIC_EOI_REG_ADDR 0xFEE000B0
#define LAPIC_EOI_REG REG32(LAPIC_EOI_REG_ADDR)
#define LAPIC_ISR_REG REG32(ISH_LAPIC_BASE + 0x170)
#define LAPIC_ISR_REG REG32(ISH_LAPIC_BASE + 0x100)
#define LAPIC_ISR_LAST_REG REG32(ISH_LAPIC_BASE + 0x170)
#define LAPIC_IRR_REG REG32(ISH_LAPIC_BASE + 0x200)
#define LAPIC_ESR_REG REG32(ISH_LAPIC_BASE + 0x280)
#define LAPIC_ERR_RECV_ILLEGAL BIT(6)

6
core/minute-ia/interrupts.c
View File

@ -233,11 +233,11 @@ uint32_t get_current_interrupt_vector(void)
uint32_t vec;
/* In service register */
uint32_t *ioapic_icr_last = (uint32_t *)LAPIC_ISR_REG;
volatile uint32_t *ioapic_isr_last = &LAPIC_ISR_LAST_REG;
/* Scan ISRs from highest priority */
for (i = 7; i >= 0; i--, ioapic_icr_last -= 4) {
vec = *ioapic_icr_last;
for (i = 7; i >= 0; i--, ioapic_isr_last -= 4) {
vec = *ioapic_isr_last;
if (vec) {
return (32 * i) + __fls(vec);
}