arm-trusted-firmware/lib/extensions
Ahmad Fatoum e6f8fc7437 fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32
While comments introduced with the original commit claim that
pmuv3_disable_el3()/pmuv3_init_el3() are compatible with PMUv2 and
PMUv1, this is not true in practice: The function accesses the Secure
Debug Control Register (SDCR), which only available to ARMv8 CPUs.

ARMv8 CPUs executing in AArch32 mode would thus be able to disable
their PMUv3, while ARMv7 CPUs would hang trying to access the SDCR.

Fix this by only doing PMUv3 handling when we know a PMUv3 to be
available. This resolves boot hanging on all STM32MP15 platforms
that use SP_min as BL32 instead of OP-TEE.

Change-Id: I40f7611cf46b89a30243cc55bf55a8d9c9de93c8
Fixes: c73686a11c ("feat(pmu): introduce pmuv3 lib/extensions folder")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
2024-04-02 16:17:03 +02:00
..
amu refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
brbe refactor(cpufeat): separate the EL2 and EL3 enablement code 2023-07-04 14:57:46 +01:00
mpam refactor(cm): move MPAM3_EL3 reg to per world context 2023-12-21 12:37:21 +00:00
pauth chore(pauth): remove redundant pauth_disable_el3() call 2023-04-28 08:09:14 +01:00
pmuv3 fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32 2024-04-02 16:17:03 +02:00
ras chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
sme refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
spe fix(spe): invoke spe_disable during power domain off/suspend 2024-02-02 20:06:28 +00:00
sve refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
sys_reg_trace refactor(cm): move EL3 registers to global context 2023-10-31 11:18:42 +00:00
trbe refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only 2023-07-24 11:04:44 +01:00
trf fix(cm): set MDCR_EL3.{NSPBE, STE} explicitly 2023-07-24 11:04:38 +01:00