This was accidentally overwitten with an older version by the PI
1.0.0.5 update. Revert to the newer/correct version.
Signed-off-by: Matt DeVillier <matt.devillier@amd.com>
This was accidentally overwitten with an older version by the PI
1.0.0.5 update. Revert to the newer/correct version.
Signed-off-by: Matt DeVillier <matt.devillier@amd.com>
Update upstream Picasso FSP binaries to match version used in ChromeOS
firmware builds. Binaries taken from latest CPFE archive.
Previous version: 0x26
Updated version: 0x26-18-g5e11eb90 (add intel SSD 670p to PSPP blacklist)
Signed-off-by: Matt DeVillier <matt.devillier@amd.com>
Duplicate the mendocino blobs into glinda and change the names. This
is a temporary step in order to fix up coreboot's soc/amd/glinda/fw.cfg
file. After glinda has reached 1.0.0.0, the blobs will be updated
with ones correct for the product.
Change-Id: I97c54c8f4147f17a9372a1477e40e98ffd6388bc
Signed-off-by: Jason Glenesk <jason.glenesk@amd.com>
Release notes will be added to the mendocino directory once the first
system ships.
Change-Id: I9062e63e82cc622c82aa6ae196108d0de8d74dbe
Signed-off-by: Jason Glenesk <jason.glenesk@amd.com>
Duplicate the mendocino blobs into morgana and change the names. This
is a temporary step in order to fix up coreboot's soc/amd/morgana/fw.cfg
file. After morgana has reached 1.0.0.0, the blobs will be updated
with ones correct for the product.
Change-Id: Ibc76e7de7cabdfb5e43924d18753d574c4d808ed
Signed-off-by: Jason Glenesk <jason.glenesk@amd.com>
Release notes will be added to the mendocino directory once the first
system ships.
Change-Id: I110a85fe1f9d11ba04f6d577034523ec78fea5c4
Signed-off-by: Jason Glenesk <jason.glenesk@amd.com>
Add patch with UEFI specific signature padding stripped off.
Change-Id: I2558ef63f605f187838f25ef8f82e99f8791c22b
Signed-off-by: Jason Glenesk <jason.glenesk@amd.com>
Update PSP binaries from version 0.11.0.68 to 0.11.E.75.
Update release notes.
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Built from cros branch firmware-guybrush-14500.B,
commit 9aa904cfd5ba587d20cbc82e8194aab6e72a56fb
(AmdCezannePkg: Add a HOB to retrieve/return CPPC values)
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
They were copied from CZN, and the proper MDN binaries have been added,
so these are no longer needed or useful.
Signed-off-by: Matt DeVillier <matt.devillier@amd.com>
Release notes will be added to the mendocino directory once the first
system ships.
Signed-off-by: Marshall Dawson <marshall.dawson@amd.com>
Change-Id: I0e765b4e0ca5611caf55f9928298b3fcd90cf629
Duplicate the cezanne blobs into sabrina and change the names. This is
a temporary step in order to fix up coreboot's soc/amd/sabrina/fw.cfg
file. After Sabrina has reached 1.0.0.0 the blobs will be updated
with ones correct for the product.
Create additional new files with updated or different naming:
* TypeId0x00_SabrinaRoot.tkn
* TypeId0x01_PspBootLoader1_SBR.sbin
* TypeId0x08_SmuFirmware_SBR.sbin
* TypeId0x09_Sabrina-SDU.stkn
* TypeId0x0C_FtpmDrv_SBR.sbin
* TypeId0x12_SmuFirmware2_SBR.sbin
* TypeId0x20_HwIpCfg_SBR.sbin
* TypeId0x21_PspiKek_SBR.bin
* TypeId0x24_SecPolicy_SBR.sbin
* TypeId0x30_AgesaBootloaderU_SBR_LPDDR5.sbin
* TypeId0x45_SecPolicytOS_SBR.sbin
* TypeId0x5A_Msmu_SBR.sbin
* TypeId0x5C_SpiRomConfig_SBR_Dual66.sbin
* TypeId0x71_DmcubFw_SBR.sbin
* TypeId0x73_PspBootLoader2_SBR.sbin
* TypeId0x8D_IkekTa_SBR.bin
* LPDDR5 files
* TypeId0x6a_Mp2FwConfig_SBR.sbin
Signed-off-by: Marshall Dawson <marshall.dawson@amd.com>
Change-Id: I360f5f28a18ab1b6221e894b83c03b15235a9ff4
Update the firmware version to 64.62.0
64.62.0
- [PMFW-9633] add gpio2 to s0i3 save/restore list based on rev ID
- [PMFW-9245] add gpio67 to s0i3 save/restore list based on rev ID
- [PMFW-9245] add rev ID check
- [PLAT-97359] Save and restore controllers value for Modern Standby
- [PMFW-9243] Broke AllCorePsm Adder
64.61.0
- DXIO v55.775
- PMFW Kernel v22
- [PMFW-8203] [OPT] DC BTC: PSMs not tracking aging
- [PMFW-8935] Change Makefile to include missing source files for Cezanne
tar.gz package
Signed-off-by: Jason Glenesk <jason.glenesk@amd.com>
Change-Id: I89e0c125be979ad16f5985c72ab12a0ef8c39036
Update the firmware version to 37.67.0
37.67.0
- [PMFW-8767] [IMP] Full Adapter Reset - TDR Reset
37.66.0
- [PMFW-8648] [ETB] Perform range check, use macros
37.65.0
- [PLAT-86124][IMP] BSOD when launching camera app
37.64.0
- [PLAT-84381][WKA] BSOD(VIDEO TDR FAILURE) occurred when play 4K local
video via Movies&TV
37.63.0
- [PMFW-6899] [IMP] dGPU Mailbox read/write policy update
- [PMFW-7644] [IMP] Pollock PD limit mantissa fix
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
The name change needs to correspond to a source change in coreboot.
Signed-off-by: Marshall Dawson <marshall.dawson@amd.com>
Change-Id: I40cb8b715702d56177e7ebd0e88a7c0022f91640
BUG=b:197216826
TEST=boot to ChromeOS and suspend with powerd_dbus_suspend 5 times each.
Cq-Depend: chrome-internal:4073788
Signed-off-by: Matt Papageorge <matt.papageorge@amd.corp-partner.google.com>
Change-Id: I1fec10b1bcde4a2c92be9a783f53513d8654b3fc
Fix the release notes due to the intent for public consumption.
Signed-off-by: Marshall Dawson <marshall.dawson@amd.com>
Change-Id: Ic63e80ff1d89d4e9e5d2c0702eae3781d3c46b72