Commit Graph

34 Commits

Author SHA1 Message Date
Eugene Myers 4836ce7d43 Fix for problem in restore order for AsmVmLaunch & AsmVmResume
Restore of rdi and rsi were reversed with respect to the vmexit.
2020-01-29 18:49:48 -05:00
jyao1 8560868570
Merge pull request #1 from tsunghowu/master
Test/FrmPkg: Fix the boot failure if guest OS has kernel 4.12 or newer.
2018-12-13 11:12:51 +08:00
Tsung Ho Wu 5d982b52d3 Test/FrmPkg: Fix the boot failure if guest OS has kernel 4.12 or newer.
Kernel 4.12 reads MSR 0x140, MSR_XEON_PHI_MISC_FEATURE_ENABLES_REGISTER
and it causes CPU hang if CPU is in VMM mode.

Solution: Set MsrBitmap to 1 and set the corresponding bits in
mGuestContextCommon.MsrBitmap. Make VMM service the MSR read/write
requests only if the MSR handler is  defined in MsrHandler.c.

Testing: Verified pass with Minnowboard max.
2018-12-12 17:14:46 -08:00
Jiewen Yao 2696e3dc80 Update binary according to latest code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 12:02:53 +08:00
Jiewen Yao 5fb1d10d98 Make SmMonitorService optional
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 12:02:15 +08:00
Jiewen Yao fed93f2347 Sync SimpleSyncLib to EDKII.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 12:01:35 +08:00
Jiewen Yao 7ca2869b02 Enhance debug message in test FRM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:54:18 +08:00
Jiewen Yao f67a8a2ea1 Enhance debug message.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:54:06 +08:00
Jiewen Yao 3b0160622c enable 1G paging for test FRM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:53:37 +08:00
Jiewen Yao ca0afe832d Enable 1G paging.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:52:46 +08:00
Jiewen Yao 6ddc89f7e7 Fix guest XD enabling issue in test FRM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:51:43 +08:00
Jiewen Yao 957328a129 Fix guest XD enabling issue. (more)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-12-14 10:50:39 +08:00
Jiewen Yao f1bb90b5d4 Fix guest XD enabling issue.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-11-24 09:54:05 +08:00
Jiewen Yao 94a1a06e2b Add NOTE on how to enlarge STM heap.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 22:04:21 +08:00
Jiewen Yao 359e96d2c1 Add NOTE for AP handling,
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 22:02:10 +08:00
Jiewen Yao 763a620874 Make SmmMonitorService optional.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:45:13 +08:00
Jiewen Yao 25c4e6b9a5 Add DisableAp/EnableAp.
to notify CPU driver on convert MONITOR wakeup to HLT wakeup.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:42:02 +08:00
Jiewen Yao acbdef4d55 Support not SmMonitorServiceProtocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:38:10 +08:00
Jiewen Yao 5829c88ac5 Skip MSR 0x400000xx access.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:37:10 +08:00
Jiewen Yao 06960576d1 Support non-paging IA32 guest.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:36:37 +08:00
Jiewen Yao 58c6e9fa74 Fix AsmVmRead IA32.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:36:03 +08:00
Jiewen Yao 8ff8546ef5 Fix AsmVmRead IA32.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:35:51 +08:00
Jiewen Yao 62f54952a2 Fix display version.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:35:10 +08:00
Jiewen Yao 29f2ef94ef Fix display version.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-28 21:34:42 +08:00
Jiewen Yao aeee693e26 Add >4G memory map.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-08 12:59:17 +08:00
Jiewen Yao 2b5345f479 Add Microcode update handling.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-10-08 12:58:25 +08:00
Jiewen Yao a0a6a1c031 Fix CPU number calculation in EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-09-22 15:00:05 +08:00
Jiewen Yao 2d49504a94 Add standalone STM hash record in PCR 0.
So that STM hash can be known in non-TXT launch path.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-17 16:16:39 +08:00
Jiewen Yao ac2a67c8b9 Sync latest data structure from MLE writer's guide.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-17 16:15:00 +08:00
Jiewen Yao 8e4c1267e2 Correct event log type.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-02 11:50:13 +08:00
Jiewen Yao 04074850f6 Add TXT launch support in FRM.
Known limitation:
The FRM does not support S3, and FRM TXT support does not have a complete trusted boot chain.
The purpose of FrmPkg is to validate STM with or without TXT support.
Please do not include it in the production without full validation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-01 20:39:21 +08:00
Jiewen Yao bce4120374 Add StmPlatformLib for special MSR access.
A platform BIOS may need override StmPlatformLib to handle some special MSR access,
which must happen in VMX Root Mode if STM is enabled.
If so, this platform owner need override the StmPlatformLib in StmPkg.dsc.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
2016-08-01 16:52:50 +08:00
Jiewen Yao 0640726c01 Add license file. 2016-05-17 13:48:02 +08:00
Jiewen Yao 3da9a66044 Add STM, bios and test package. 2016-03-31 15:15:57 +08:00