coreboot-mirror
/
STM
mirror of https://review.coreboot.org/STM.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #1 from tsunghowu/master 

Test/FrmPkg: Fix the boot failure if guest OS has kernel 4.12 or newer.
This commit is contained in:
jyao1 2018-12-13 11:12:51 +08:00 committed by GitHub
parent 2696e3dc80 5d982b52d3
commit 8560868570
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 50 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
Test/FrmPkg/Core/Init/FrmInit.c
View File

@ -413,6 +413,47 @@ InitGuestVmcs (
return ;
}
#define MSR_READ 1
#define MSR_WRITE 2
VOID
EnableMsrInterception (
UINT8 *bitmap, UINT32 msr_arg, UINT8 mode
)
{
UINT8 *read_map;
UINT8 *write_map;
UINT32 msr = msr_arg;
UINT8 msr_bit;
UINT32 msr_index;
/* low MSR */
if (msr < 0x1FFFU) {
read_map = bitmap;
write_map = bitmap + 2048;
} else if ((msr >= 0xc0000000U) && (msr <= 0xc0001fffU)) {
read_map = bitmap + 1024;
write_map = bitmap + 3072;
} else {
return;
}
msr &= 0x1FFFU;
msr_bit = 1U << (msr & 0x7U);
msr_index = msr >> 3U;
if ((mode & MSR_READ) == MSR_READ) {
read_map[msr_index] |= msr_bit;
} else {
read_map[msr_index] &= ~msr_bit;
}
if ((mode & MSR_WRITE) == MSR_WRITE) {
write_map[msr_index] |= msr_bit;
} else {
write_map[msr_index] &= ~msr_bit;
}
}
/**
This function initialize guest common context.
@ -432,7 +473,14 @@ InitGuestContextCommon (
mGuestContextCommon.CompatiblePageTablePae = CreateCompatiblePageTablePae ();
mGuestContextCommon.MsrBitmap = (UINT64)(UINTN)AllocatePages (1);
EnableMsrInterception( (UINT8*)mGuestContextCommon.MsrBitmap, IA32_EFER_MSR_INDEX, MSR_WRITE|MSR_READ);
EnableMsrInterception( (UINT8*)mGuestContextCommon.MsrBitmap, IA32_SYSENTER_CS_MSR_INDEX, MSR_WRITE|MSR_READ);
EnableMsrInterception( (UINT8*)mGuestContextCommon.MsrBitmap, IA32_SYSENTER_ESP_MSR_INDEX, MSR_WRITE|MSR_READ);
EnableMsrInterception( (UINT8*)mGuestContextCommon.MsrBitmap, IA32_SYSENTER_EIP_MSR_INDEX, MSR_WRITE|MSR_READ);
EnableMsrInterception( (UINT8*)mGuestContextCommon.MsrBitmap, IA32_FS_BASE_MSR_INDEX, MSR_WRITE|MSR_READ);
EnableMsrInterception( (UINT8*)mGuestContextCommon.MsrBitmap, IA32_GS_BASE_MSR_INDEX, MSR_WRITE|MSR_READ);
EnableMsrInterception( (UINT8*)mGuestContextCommon.MsrBitmap, IA32_BIOS_UPDT_TRIG_MSR_INDEX, MSR_WRITE);
EptInit ();
IoInit ();

2
Test/FrmPkg/Core/Init/VmcsInit.c
View File

@ -84,7 +84,7 @@ SetVmcsControlField (
ProcessorBasedCtrls.Bits.InterruptWindow = 0; // interrupt window
ProcessorBasedCtrls.Bits.NmiWindow = 0;
ProcessorBasedCtrls.Bits.IoBitmap = 1;
ProcessorBasedCtrls.Bits.MsrBitmap = 0;
ProcessorBasedCtrls.Bits.MsrBitmap = 1;
ProcessorBasedCtrls.Bits.SecondaryControl = 1;
Data64 = AsmReadMsr64 (IA32_VMX_PROCBASED_CTLS2_MSR_INDEX);