openocd: target: changing the order of the JATG devices

For Cyclone V SoC Development kit, the order of the JTAG devices is
inverted when using USB blaster to program the SoC, this is a fix,
so the user dont have to do it manually

Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
This commit is contained in:
Esteban Valverde 2022-04-27 16:43:46 +01:00 committed by Stephanos Ioannidis
parent 7e3dbbbe23
commit af169e8053
1 changed files with 8 additions and 10 deletions

View File

@ -7,6 +7,14 @@ if { [info exists CHIPNAME] } {
set _CHIPNAME fpgasoc
}
# Subsidiary TAP: fpga
if { [info exists FPGA_TAPID] } {
set _FPGA_TAPID $FPGA_TAPID
} else {
set _FPGA_TAPID 0x02d020dd
}
jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id $_FPGA_TAPID
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
@ -16,16 +24,6 @@ if { [info exists DAP_TAPID] } {
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
# Subsidiary TAP: fpga
if { [info exists FPGA_TAPID] } {
set _FPGA_TAPID $FPGA_TAPID
} else {
set _FPGA_TAPID 0x02d020dd
}
jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id $_FPGA_TAPID
#
# Cortex-A9 target
#