SWI: Add SWI pseudo peripheral

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit is contained in:
Alberto Escolar Piedras 2023-09-14 15:07:03 +02:00
parent a70c73bbae
commit ecd7b9bf05
4 changed files with 30 additions and 4 deletions

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@ -12,5 +12,6 @@ src/HW_models/NHW_EGU.c
src/HW_models/NHW_misc.c
src/HW_models/NHW_RNG.c
src/HW_models/NHW_RTC.c
src/HW_models/NHW_SWI.c
src/HW_models/NHW_TIMER.c
src/HW_models/weak_stubs.c

18
src/HW_models/NHW_SWI.c Normal file
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@ -0,0 +1,18 @@
/*
* Copyright (c) 2023, Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* SWI
* https://infocenter.nordicsemi.com/topic/ps_nrf5340/swi.html?cp=4_0_0_6_32
*
* This file just allocates the RAM addresses booked for the SW interrupts
* This is with all likelihood a model of no-HW
*/
#include <stdint.h>
#include "NHW_config.h"
int NRF_SWI_regs[NHW_SWI_TOTAL_INST];

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@ -322,6 +322,12 @@
#define NHW_RTC_HAS_SHORT_COMP_CLEAR 1
#define NHW_RTC_N_CC {4, 4, 4, 4}
#define NHW_SWI_TOTAL_INST 4
#define NHW_SWI_NET0 0
#define NHW_SWI_NET1 1
#define NHW_SWI_NET2 2
#define NHW_SWI_NET3 3
#define NHW_TIMER_TOTAL_INST 6
#define NHW_TIMER_APP0 0
#define NHW_TIMER_APP1 1

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@ -169,14 +169,15 @@ extern NRF_TIMER_Type NRF_TIMER_regs[];
#define NRF_TIMER1_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_NET1])
#undef NRF_TIMER2_NS_BASE
#define NRF_TIMER2_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_NET2])
extern int NRF_SWI_regs[];
#undef NRF_SWI0_NS_BASE
#define NRF_SWI0_NS_BASE NULL
#define NRF_SWI0_NS_BASE (&NRF_SWI_regs[NHW_SWI_NET0])
#undef NRF_SWI1_NS_BASE
#define NRF_SWI1_NS_BASE NULL
#define NRF_SWI1_NS_BASE (&NRF_SWI_regs[NHW_SWI_NET1])
#undef NRF_SWI2_NS_BASE
#define NRF_SWI2_NS_BASE NULL
#define NRF_SWI2_NS_BASE (&NRF_SWI_regs[NHW_SWI_NET2])
#undef NRF_SWI3_NS_BASE
#define NRF_SWI3_NS_BASE NULL
#define NRF_SWI3_NS_BASE (&NRF_SWI_regs[NHW_SWI_NET3])
#undef NRF_APPMUTEX_NS_BASE
#define NRF_APPMUTEX_NS_BASE NULL
#undef NRF_APPMUTEX_S_BASE