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@ -55,7 +55,7 @@
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#include "NHW_common_types.h"
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#include "NHW_config.h"
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#include "NHW_peri_types.h"
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#include "NRF_CLOCK.h"
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#include "NHW_CLOCK.h"
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#include "nsi_hw_scheduler.h"
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#include "NHW_xPPI.h"
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#include "NRF_RTC.h"
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@ -113,7 +113,7 @@ NRF_POWER_Type *NRF_POWER_regs[NHW_CLKPWR_TOTAL_INST];
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NRF_RESET_Type *NRF_RESET_regs[NHW_CLKPWR_TOTAL_INST];
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#endif /* (NHW_CLKPWR_HAS_RESET) */
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static void nrf_clock_update_master_timer(void) {
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static void nhw_clock_update_master_timer(void) {
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Timer_PWRCLK = TIME_NEVER;
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@ -132,7 +132,7 @@ static void nrf_clock_update_master_timer(void) {
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nsi_hws_find_next_event();
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}
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static void nrf_clock_init(void) {
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static void nhw_clock_init(void) {
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#if (NHW_HAS_DPPI)
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/* Mapping of peripheral instance to DPPI instance */
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uint nhw_clkpwr_dppi_map[NHW_CLKPWR_TOTAL_INST] = NHW_CLKPWR_DPPI_MAP;
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@ -173,9 +173,9 @@ static void nrf_clock_init(void) {
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}
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}
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NSI_TASK(nrf_clock_init, HW_INIT, 100);
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NSI_TASK(nhw_clock_init, HW_INIT, 100);
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static void nrf_pwrclk_eval_interrupt(int inst) {
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static void nhw_pwrclk_eval_interrupt(int inst) {
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/* Mapping of peripheral instance to {int controller instance, int number} */
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static struct nhw_irq_mapping nhw_clock_irq_map[NHW_CLKPWR_TOTAL_INST] = NHW_CLKPWR_INT_MAP;
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static bool clock_int_line[NHW_CLKPWR_TOTAL_INST]; /* Is the CLOCK currently driving its interrupt line high */
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@ -219,14 +219,14 @@ static void nrf_pwrclk_eval_interrupt(int inst) {
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#define nhw_clock_signal_handler(x) \
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static void nhw_clock_signal_##x(int i) { \
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NRF_CLOCK_regs[i]->EVENTS_##x = 1; \
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nrf_pwrclk_eval_interrupt(i); \
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nhw_pwrclk_eval_interrupt(i); \
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nrf_ppi_event(CLOCK_EVENTS_##x); \
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}
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#else
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#define nhw_clock_signal_handler(x) \
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static void nhw_clock_signal_##x(int i) { \
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NRF_CLOCK_regs[i]->EVENTS_##x = 1; \
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nrf_pwrclk_eval_interrupt(i); \
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nhw_pwrclk_eval_interrupt(i); \
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nhw_dppi_event_signal_if(nhw_clkpwr_st[i].dppi_map, \
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NRF_CLOCK_regs[i]->PUBLISH_##x);\
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}
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@ -260,7 +260,7 @@ void nhw_clock_TASKS_LFCLKSTART(uint inst) {
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this->LF_Clock_state = Starting;
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this->Timer_CLOCK_LF = nsi_hws_get_time(); //we assume the clock is ready in 1 delta
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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void nhw_clock_TASKS_LFCLKSTOP(uint inst) {
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@ -277,7 +277,7 @@ void nhw_clock_TASKS_LFCLKSTOP(uint inst) {
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NRF_CLOCK_regs[inst]->LFCLKRUN = 0;
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this->LF_Clock_state = Stopping;
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this->Timer_CLOCK_LF = nsi_hws_get_time(); //we assume the clock is stopped in 1 delta
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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}
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@ -288,7 +288,7 @@ void nhw_clock_TASKS_HFCLKSTART(uint inst) {
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this->HF_Clock_state = Starting;
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NRF_CLOCK_regs[inst]->HFCLKRUN = CLOCK_HFCLKRUN_STATUS_Msk;
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this->Timer_CLOCK_HF = nsi_hws_get_time(); //we assume the clock is ready in 1 delta
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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}
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@ -299,7 +299,7 @@ void nhw_clock_TASKS_HFCLKSTOP(uint inst) {
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NRF_CLOCK_regs[inst]->HFCLKRUN = 0;
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this->HF_Clock_state = Stopping;
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this->Timer_CLOCK_HF = nsi_hws_get_time(); //we assume the clock is stopped in 1 delta
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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}
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@ -346,7 +346,7 @@ void nhw_clock_TASKS_CAL(uint inst) {
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this->LF_cal_state = Started; //We don't check for re-triggers, as we are going to be done right away
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this->Timer_LF_cal = nsi_hws_get_time(); //we assume the calibration is done in 1 delta
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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#if (NHW_CLKPWR_HAS_CALTIMER)
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@ -360,7 +360,7 @@ void nhw_clock_TASKS_CTSTART(uint inst) {
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} else { /* LCOV_EXCL_STOP */
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this->caltimer_state = Started;
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this->Timer_caltimer = nsi_hws_get_time() + (bs_time_t)NRF_CLOCK_regs[inst]->CTIV * 250000;
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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nhw_clock_signal_CTSTARTED(inst);
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}
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@ -374,7 +374,7 @@ void nhw_clock_TASKS_CTSTOP(uint inst) {
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} /* LCOV_EXCL_STOP */
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this->caltimer_state = Stopped;
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this->Timer_caltimer = TIME_NEVER;
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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nhw_clock_signal_CTSTOPPED(inst);
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}
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#endif /* NHW_CLKPWR_HAS_CALTIMER */
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@ -385,7 +385,7 @@ void nhw_clock_reqw_sideeffects_INTENSET(uint i) {
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this->INTEN |= NRF_CLOCK_regs[i]->INTENSET;
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NRF_CLOCK_regs[i]->INTENSET = this->INTEN;
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nrf_pwrclk_eval_interrupt(i);
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nhw_pwrclk_eval_interrupt(i);
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}
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}
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@ -396,7 +396,7 @@ void nhw_clock_reqw_sideeffects_INTENCLR(uint i) {
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this->INTEN &= ~NRF_CLOCK_regs[i]->INTENCLR;
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NRF_CLOCK_regs[i]->INTENSET = this->INTEN;
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NRF_CLOCK_regs[i]->INTENCLR = 0;
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nrf_pwrclk_eval_interrupt(i);
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nhw_pwrclk_eval_interrupt(i);
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}
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}
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@ -428,10 +428,10 @@ nhw_clock_reqw_sideeffects_TASKS_(CTSTOP)
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#endif /* NHW_CLKPWR_HAS_CALTIMER */
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void nhw_pwrclk_regw_sideeffects_EVENTS_all(uint i) {
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nrf_pwrclk_eval_interrupt(i);
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nhw_pwrclk_eval_interrupt(i);
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}
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void nrf_clock_LFTimer_triggered(struct clkpwr_status *this) {
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void nhw_clock_LFTimer_triggered(struct clkpwr_status *this) {
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NRF_CLOCK_Type *CLOCK_regs = this->CLOCK_regs;
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//For simplicity we assume the enable comes at the same instant as the first
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@ -450,14 +450,14 @@ void nrf_clock_LFTimer_triggered(struct clkpwr_status *this) {
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}
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this->Timer_CLOCK_LF = TIME_NEVER;
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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#ifndef CLOCK_HFCLKSTAT_SRC_Xtal
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#define CLOCK_HFCLKSTAT_SRC_Xtal CLOCK_HFCLKSTAT_SRC_HFXO /* Bit name change from 52 -> 53 series but same meaning*/
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#endif
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void nrf_clock_HFTimer_triggered(struct clkpwr_status *this) {
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void nhw_clock_HFTimer_triggered(struct clkpwr_status *this) {
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NRF_CLOCK_Type *CLOCK_regs = this->CLOCK_regs;
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if ( this->HF_Clock_state == Starting ){
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@ -474,50 +474,56 @@ void nrf_clock_HFTimer_triggered(struct clkpwr_status *this) {
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}
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this->Timer_CLOCK_HF = TIME_NEVER;
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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}
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void nrf_clock_LF_cal_triggered(struct clkpwr_status *this) {
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void nhw_clock_LF_cal_triggered(struct clkpwr_status *this) {
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this->LF_cal_state = Stopped;
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this->Timer_LF_cal = TIME_NEVER;
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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nhw_clock_signal_DONE(this->inst);
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}
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#if (NHW_CLKPWR_HAS_CALTIMER)
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void nrf_clock_caltimer_triggered(struct clkpwr_status *this) {
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void nhw_clock_caltimer_triggered(struct clkpwr_status *this) {
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if (this->caltimer_state != Started) { /* LCOV_EXCL_START */
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bs_trace_error_time_line("%s: programming error\n", __func__);
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} /* LCOV_EXCL_STOP */
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this->caltimer_state = Stopped;
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this->Timer_caltimer = TIME_NEVER;
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nrf_clock_update_master_timer();
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nhw_clock_update_master_timer();
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nhw_clock_signal_CTTO(this->inst);
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}
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#endif /* NHW_CLKPWR_HAS_CALTIMER */
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static void nrf_pwrclk_timer_triggered(void) {
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static void nhw_pwrclk_timer_triggered(void) {
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bool any = false;
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for (int i = 0; i < NHW_CLKPWR_TOTAL_INST; i++) {
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struct clkpwr_status * c_el = &nhw_clkpwr_st[i];
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if (Timer_PWRCLK == c_el->Timer_CLOCK_HF) {
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nrf_clock_HFTimer_triggered(c_el);
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nhw_clock_HFTimer_triggered(c_el);
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any = true;
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} else if (Timer_PWRCLK == c_el->Timer_CLOCK_LF) {
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nrf_clock_LFTimer_triggered(c_el);
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nhw_clock_LFTimer_triggered(c_el);
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any = true;
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} else if (Timer_PWRCLK == c_el->Timer_LF_cal) {
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nrf_clock_LF_cal_triggered(c_el);
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nhw_clock_LF_cal_triggered(c_el);
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any = true;
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#if (NHW_CLKPWR_HAS_CALTIMER)
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} else if (Timer_PWRCLK == c_el->Timer_caltimer) {
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nrf_clock_caltimer_triggered(c_el);
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nhw_clock_caltimer_triggered(c_el);
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any = true;
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#endif
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} else { /* LCOV_EXCL_START */
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bs_trace_error_time_line("%s programming error\n", __func__);
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} /* LCOV_EXCL_STOP */
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}
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}
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if (!any) { /* LCOV_EXCL_START */
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bs_trace_error_time_line("%s programming error\n", __func__);
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} /* LCOV_EXCL_STOP */
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}
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NSI_HW_EVENT(Timer_PWRCLK, nrf_pwrclk_timer_triggered, 50);
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NSI_HW_EVENT(Timer_PWRCLK, nhw_pwrclk_timer_triggered, 50);
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#if (NHW_HAS_DPPI)
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