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nrf_hw_models
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FICR: Add nrf53 variants 

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit is contained in:
Alberto Escolar Piedras 2023-09-27 13:49:40 +02:00
parent 82ee9bdc09
commit 5f0ae29856
8 changed files with 141 additions and 25 deletions
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2
make_inc/52833_hw_files
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@ -24,7 +24,7 @@ src/HW_models/NRF_GPIO.c
src/HW_models/NHW_TEMP.c
src/HW_models/NHW_TIMER.c
src/HW_models/bs_compat.c
src/HW_models/NRF_FICR.c
src/HW_models/NHW_52_FICR.c
src/HW_models/NRF_GPIOTE.c
src/HW_models/NHW_RNG.c
src/HW_models/weak_stubs.c

1
make_inc/5340_hw_files
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@ -6,6 +6,7 @@ src/HW_models/crc.c
src/HW_models/irq_ctrl.c
src/HW_models/bstest_ticker.c
src/HW_models/bs_compat.c
src/HW_models/NHW_53_FICR.c
src/HW_models/NHW_AAR.c
src/HW_models/NHW_AES_CCM.c
src/HW_models/NHW_AES_ECB.c

6
src/HW_models/NRF_FICR.c → src/HW_models/NHW_52_FICR.c
View File

@ -20,8 +20,6 @@
#include "NHW_common_types.h"
#include "NHW_config.h"
#include "NHW_peri_types.h"
#include "NRF_FICR.h"
#include "NHW_NVMC.h"
#include <string.h>
#include "bs_rand_main.h"
#include "nsi_tasks.h"
@ -29,7 +27,7 @@
NRF_FICR_Type NRF_FICR_regs;
static void nrf_ficr_init(void) {
static void nhw_52_ficr_init(void) {
memset(&NRF_FICR_regs, 0xFF, sizeof(NRF_FICR_regs));
#define FLASH_PAGE_SIZE (4*1024)
@ -57,4 +55,4 @@ static void nrf_ficr_init(void) {
NRF_FICR_regs.PRODTEST[2] = 0xBB42319F;
}
NSI_TASK(nrf_ficr_init, HW_INIT, 100);
NSI_TASK(nhw_52_ficr_init, HW_INIT, 100);

61
src/HW_models/NHW_53_FICR.c Normal file
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@ -0,0 +1,61 @@
/*
* Copyright (c) 2017 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Factory information configuration registers
* https://infocenter.nordicsemi.com/topic/ps_nrf52833/ficr.html?cp=5_1_0_3_3
*/
/*
* TOLOW: we start with most registers cleared, and a few evident ones set to some values.
* It could be interesting to let people load them from command line
* for example by specifying a file with their values. and/or by specifying particular ones
* with command line options; something like -deviceaddr=<bt_address>
*/
#include <string.h>
#include "bs_rand_main.h"
#include "nsi_tasks.h"
#include "NHW_common_types.h"
#include "NHW_config.h"
#include "NHW_peri_types.h"
#include "weak_stubs.h"
static NRF_FICR_APP_Type NRF_FICR_APP_regs;
static NRF_FICR_NET_Type NRF_FICR_NET_regs;
void *NRF_FICR_regs_p[] = {(void*)&NRF_FICR_APP_regs, (void*)&NRF_FICR_NET_regs};
static void nhw_53_ficr_init(void) {
memset(&NRF_FICR_APP_regs, 0xFF, sizeof(NRF_FICR_APP_regs));
memset(&NRF_FICR_NET_regs, 0xFF, sizeof(NRF_FICR_NET_regs));
NRF_FICR_APP_regs.INFO.DEVICEID[0] = (bs_random_uint32() & 0xFFFFFF00) + bsim_args_get_global_device_nbr();
NRF_FICR_APP_regs.INFO.DEVICEID[1] = bs_random_uint32();
NRF_FICR_APP_regs.INFO.PART = 0x5340;
NRF_FICR_APP_regs.INFO.FLASH = 0x400; /*1 MB*/
NRF_FICR_APP_regs.INFO.CODEPAGESIZE = 0x1000;
NRF_FICR_APP_regs.INFO.CODESIZE = 256;
NRF_FICR_APP_regs.INFO.DEVICETYPE = 0;
NRF_FICR_NET_regs.INFO.DEVICEID[0] = NRF_FICR_APP_regs.INFO.DEVICEID[0];
NRF_FICR_NET_regs.INFO.DEVICEID[1] = NRF_FICR_APP_regs.INFO.DEVICEID[1];
NRF_FICR_NET_regs.INFO.PART = 0x5340;
NRF_FICR_NET_regs.INFO.FLASH = 0x100; /*256 KB*/
NRF_FICR_NET_regs.INFO.CODEPAGESIZE = 0x800;
NRF_FICR_NET_regs.INFO.CODESIZE = 128;
NRF_FICR_NET_regs.INFO.DEVICETYPE = 0;
for (int i = 0; i < 4; i++) {
NRF_FICR_NET_regs.ER[i] = bs_random_uint32();
NRF_FICR_NET_regs.IR[i] = bs_random_uint32();
}
NRF_FICR_NET_regs.DEVICEADDRTYPE = 0;
NRF_FICR_NET_regs.DEVICEADDR[0] = bs_random_uint32();
NRF_FICR_NET_regs.DEVICEADDR[1] = bs_random_uint32();
}
NSI_TASK(nhw_53_ficr_init, HW_INIT, 100);

3
src/HW_models/NHW_config.h
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@ -263,6 +263,9 @@
#define NHW_DPPI_N_CH {32, 32} /* Number of channels in each DPPI */
#define NHW_DPPI_N_CHG {6, 6} /* Number of channel groups in each DPPI */
#define NHW_FICR_APP 0
#define NHW_FICR_NET 1
#define NHW_INTCTRL_TOTAL_INST 2
#define NHW_INTCTRL_MAX_INTLINES 58

69
src/HW_models/NRF5340_peri_types.h
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@ -58,6 +58,41 @@ typedef struct {
__IM uint32_t DATA; /*!< (@ 0x00000004) Description cluster: Data */
} FICR_TRIMCNF_Type; /*!< Size = 8 (0x8) */
/**
* @brief FICR_NFC [NFC] (Unspecified)
*/
typedef struct {
__IM uint32_t TAGHEADER0; /*!< (@ 0x00000000) Default header for NFC Tag. Software can read
these values to populate NFCID1_3RD_LAST,
NFCID1_2ND_LAST and NFCID1_LAST. */
__IM uint32_t TAGHEADER1; /*!< (@ 0x00000004) Default header for NFC Tag. Software can read
these values to populate NFCID1_3RD_LAST,
NFCID1_2ND_LAST and NFCID1_LAST. */
__IM uint32_t TAGHEADER2; /*!< (@ 0x00000008) Default header for NFC Tag. Software can read
these values to populate NFCID1_3RD_LAST,
NFCID1_2ND_LAST and NFCID1_LAST. */
__IM uint32_t TAGHEADER3; /*!< (@ 0x0000000C) Default header for NFC Tag. Software can read
these values to populate NFCID1_3RD_LAST,
NFCID1_2ND_LAST and NFCID1_LAST. */
} FICR_NFC_Type; /*!< Size = 16 (0x10) */
/**
* @brief FICR_TRNG90B [TRNG90B] (NIST800-90B RNG calibration data)
*/
typedef struct {
__IM uint32_t BYTES; /*!< (@ 0x00000000) Amount of bytes for the required entropy bits */
__IM uint32_t RCCUTOFF; /*!< (@ 0x00000004) Repetition counter cutoff */
__IM uint32_t APCUTOFF; /*!< (@ 0x00000008) Adaptive proportion cutoff */
__IM uint32_t STARTUP; /*!< (@ 0x0000000C) Amount of bytes for the startup tests */
__IM uint32_t ROSC1; /*!< (@ 0x00000010) Sample count for ring oscillator 1 */
__IM uint32_t ROSC2; /*!< (@ 0x00000014) Sample count for ring oscillator 2 */
__IM uint32_t ROSC3; /*!< (@ 0x00000018) Sample count for ring oscillator 3 */
__IM uint32_t ROSC4; /*!< (@ 0x0000001C) Sample count for ring oscillator 4 */
} FICR_TRNG90B_Type; /*!< Size = 32 (0x20) */
/**
* @brief RADIO_PSEL [PSEL] (Unspecified)
*/
@ -1905,6 +1940,40 @@ typedef struct { /*!< (@ 0x4100F000) DPPIC_NS Str
#define DPPIC_CHG_CH0_Excluded (0UL) /*!< Exclude */
#define DPPIC_CHG_CH0_Included (1UL) /*!< Include */
/* =========================================================================================================================== */
/* ================ FICR ================ */
/* =========================================================================================================================== */
/**
* @brief Factory Information Configuration Registers (FICR)
*/
typedef struct { /*!< (@ 0x00FF0000) FICR_S Structure */
__IM uint32_t RESERVED[128];
__IOM FICR_INFO_Type INFO; /*!< (@ 0x00000200) Device info */
__IM uint32_t RESERVED1[53];
__IOM FICR_TRIMCNF_Type TRIMCNF[32]; /*!< (@ 0x00000300) Unspecified */
__IM uint32_t RESERVED2[20];
__IOM FICR_NFC_Type NFC; /*!< (@ 0x00000450) Unspecified */
__IM uint32_t RESERVED3[488];
__IOM FICR_TRNG90B_Type TRNG90B; /*!< (@ 0x00000C00) NIST800-90B RNG calibration data */
__IM uint32_t XOSC32MTRIM; /*!< (@ 0x00000C20) XOSC32M capacitor selection trim values */
} NRF_FICR_APP_Type; /*!< Size = 3108 (0xc24) */
typedef struct { /*!< (@ 0x01FF0000) FICR_NS Structure */
__IM uint32_t RESERVED[128];
__IOM FICR_INFO_Type INFO; /*!< (@ 0x00000200) Device info */
__IM uint32_t RESERVED1[21];
__IM uint32_t ER[4]; /*!< (@ 0x00000280) Description collection: Encryption Root, word
n */
__IM uint32_t IR[4]; /*!< (@ 0x00000290) Description collection: Identity Root, word n */
__IM uint32_t DEVICEADDRTYPE; /*!< (@ 0x000002A0) Device address type */
__IM uint32_t DEVICEADDR[2]; /*!< (@ 0x000002A4) Description collection: Device address n */
__IM uint32_t RESERVED2[21];
__IOM FICR_TRIMCNF_Type TRIMCNF[32]; /*!< (@ 0x00000300) Unspecified */
} NRF_FICR_NET_Type; /*!< Size = 1024 (0x400) */
/* =========================================================================================================================== */
/* ================ NVMC ================ */

18
src/HW_models/NRF_FICR.h
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@ -1,18 +0,0 @@
/*
* Copyright (c) 2017 Oticon A/S
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _NRF_HW_MODEL_FICR_H
#define _NRF_HW_MODEL_FICR_H
#ifdef __cplusplus
extern "C"{
#endif
#ifdef __cplusplus
}
#endif
#endif

6
src/nrfx/mdk_replacements/nrf_bsim_redef.h
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@ -101,8 +101,9 @@ extern NRF_UICR_Type *NRF_UICR_regs_p[];
/********************************************************************/
#elif defined(NRF5340_XXAA_NETWORK)
extern void *NRF_FICR_regs_p[];
#undef NRF_FICR_NS_BASE
#define NRF_FICR_NS_BASE NULL
#define NRF_FICR_NS_BASE (NRF_FICR_regs_p[NHW_FICR_NET])
extern NRF_UICR_Type *NRF_UICR_regs_p[];
#undef NRF_UICR_NS_BASE
#define NRF_UICR_NS_BASE (NRF_UICR_regs_p[NHW_UICR_NET0])
@ -210,8 +211,9 @@ extern NRF_NVMC_Type *NRF_NVMC_regs_p[];
#define NRF_CACHEDATA_S_BASE NULL
#undef NRF_CACHEINFO_S_BASE
#define NRF_CACHEINFO_S_BASE NULL
extern void *NRF_FICR_regs_p[];
#undef NRF_FICR_S_BASE
#define NRF_FICR_S_BASE NULL
#define NRF_FICR_S_BASE (NRF_FICR_regs_p[NHW_FICR_APP])
extern NRF_UICR_Type *NRF_UICR_regs_p[];
#undef NRF_UICR_S_BASE
#define NRF_UICR_S_BASE (NRF_UICR_regs_p[NHW_UICR_APP0])