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mcuboot
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espressif: grouping common functions for esp chips init functions 

Grouped common bootloader init functions among esp32, esp32s2,
esp32c3 and esp32s3 into common files.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
This commit is contained in:
Almir Okato 2022-04-14 01:18:07 -03:00 committed by Gustavo Henrique Nihei
parent dfce0be6a1
commit 1dc71368b2
8 changed files with 82 additions and 147 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
boot/espressif/hal/CMakeLists.txt
View File

@ -51,6 +51,7 @@ if("${MCUBOOT_ARCH}" STREQUAL "xtensa")
endif()
set(hal_srcs
${src_dir}/bootloader_init_common.c
${src_dir}/bootloader_wdt.c
${src_dir}/secure_boot.c
${src_dir}/flash_encrypt.c

1
boot/espressif/hal/include/bootloader_wdt.h
View File

@ -6,3 +6,4 @@
#pragma once
void bootloader_wdt_feed(void);
void bootloader_config_wdt(void);

48
boot/espressif/hal/src/bootloader_init_common.c Normal file
View File

@ -0,0 +1,48 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <stdint.h>
#include "sdkconfig.h"
#include "esp_attr.h"
#include "esp_log.h"
#include "bootloader_init.h"
#include "bootloader_common.h"
#include "bootloader_flash_config.h"
#include "bootloader_flash.h"
#include "bootloader_flash_priv.h"
static const char *TAG = "boot";
esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
void bootloader_clear_bss_section(void)
{
memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
}
esp_err_t bootloader_read_bootloader_header(void)
{
/* load bootloader image header */
if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &bootloader_image_hdr, sizeof(esp_image_header_t), true) != ESP_OK) {
ESP_LOGE(TAG, "failed to load bootloader image header!");
return ESP_FAIL;
}
return ESP_OK;
}
esp_err_t bootloader_check_bootloader_validity(void)
{
/* read chip revision from efuse */
uint8_t revision = bootloader_common_get_chip_revision();
ESP_LOGI(TAG, "chip revision: %d", revision);
/* compare with the one set in bootloader image header */
if (bootloader_common_check_chip_validity(&bootloader_image_hdr, ESP_IMAGE_BOOTLOADER) != ESP_OK) {
return ESP_FAIL;
}
return ESP_OK;
}

23
boot/espressif/hal/src/bootloader_wdt.c
View File

@ -6,6 +6,7 @@
#include <bootloader_wdt.h>
#include <hal/wdt_hal.h>
#include "soc/rtc.h"
void bootloader_wdt_feed(void)
{
@ -14,3 +15,25 @@ void bootloader_wdt_feed(void)
wdt_hal_feed(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
}
void bootloader_config_wdt(void)
{
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_set_flashboot_en(&rtc_wdt_ctx, false);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#ifdef CONFIG_ESP_MCUBOOT_WDT_ENABLE
wdt_hal_init(&rtc_wdt_ctx, WDT_RWDT, 0, false);
uint32_t stage_timeout_ticks = (uint32_t)((uint64_t)CONFIG_BOOTLOADER_WDT_TIME_MS * rtc_clk_slow_freq_get_hz() / 1000);
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC);
wdt_hal_enable(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
wdt_hal_context_t wdt_ctx = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_write_protect_disable(&wdt_ctx);
wdt_hal_set_flashboot_en(&wdt_ctx, false);
wdt_hal_write_protect_enable(&wdt_ctx);
}

39
boot/espressif/hal/src/esp32/bootloader_init.c
View File

@ -21,18 +21,14 @@
#include "soc/efuse_reg.h"
#include "soc/rtc.h"
#include "bootloader_wdt.h"
#include "hal/wdt_hal.h"
#include "esp32/rom/cache.h"
#include "esp32/rom/spi_flash.h"
#include "esp32/rom/uart.h"
esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
void bootloader_clear_bss_section(void)
{
memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
}
extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
static void bootloader_common_vddsdio_configure(void)
{
@ -84,14 +80,6 @@ static esp_err_t bootloader_check_rated_cpu_clock(void)
return ESP_OK;
}
esp_err_t bootloader_read_bootloader_header(void)
{
if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &bootloader_image_hdr, sizeof(esp_image_header_t), true) != ESP_OK) {
return ESP_FAIL;
}
return ESP_OK;
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)
{
uint32_t size;
@ -139,28 +127,6 @@ static esp_err_t bootloader_init_spi_flash(void)
return ESP_OK;
}
void bootloader_config_wdt(void)
{
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_set_flashboot_en(&rtc_wdt_ctx, false);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#ifdef CONFIG_ESP_MCUBOOT_WDT_ENABLE
wdt_hal_init(&rtc_wdt_ctx, WDT_RWDT, 0, false);
uint32_t stage_timeout_ticks = (uint32_t)((uint64_t)CONFIG_BOOTLOADER_WDT_TIME_MS * rtc_clk_slow_freq_get_hz() / 1000);
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC);
wdt_hal_enable(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
wdt_hal_context_t wdt_ctx = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_write_protect_disable(&wdt_ctx);
wdt_hal_set_flashboot_en(&wdt_ctx, false);
wdt_hal_write_protect_enable(&wdt_ctx);
}
static void bootloader_init_uart_console(void)
{
const int uart_num = 0;
@ -173,7 +139,6 @@ static void bootloader_init_uart_console(void)
uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud);
}
esp_err_t bootloader_init(void)
{
esp_err_t ret = ESP_OK;

41
boot/espressif/hal/src/esp32c3/bootloader_init.c
View File

@ -18,6 +18,7 @@
#include "esp_rom_sys.h"
#include "bootloader_init.h"
#include "bootloader_common.h"
#include "bootloader_clock.h"
#include "bootloader_flash_config.h"
#include "bootloader_mem.h"
@ -33,16 +34,10 @@
#include "esp32c3/rom/cache.h"
#include "esp32c3/rom/spi_flash.h"
#include "bootloader_wdt.h"
#include "hal/wdt_hal.h"
extern uint8_t bootloader_common_get_chip_revision(void);
esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
void bootloader_clear_bss_section(void)
{
memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
}
extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
void IRAM_ATTR bootloader_configure_spi_pins(int drv)
{
@ -84,14 +79,6 @@ static void bootloader_reset_mmu(void)
REG_CLR_BIT(EXTMEM_ICACHE_CTRL1_REG, EXTMEM_ICACHE_SHUT_DBUS);
}
esp_err_t bootloader_read_bootloader_header(void)
{
if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &bootloader_image_hdr, sizeof(esp_image_header_t), true) != ESP_OK) {
return ESP_FAIL;
}
return ESP_OK;
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)
{
uint32_t size;
@ -174,28 +161,6 @@ static void bootloader_super_wdt_auto_feed(void)
REG_WRITE(RTC_CNTL_SWD_WPROTECT_REG, 0);
}
void bootloader_config_wdt(void)
{
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_set_flashboot_en(&rtc_wdt_ctx, false);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#ifdef CONFIG_ESP_MCUBOOT_WDT_ENABLE
wdt_hal_init(&rtc_wdt_ctx, WDT_RWDT, 0, false);
uint32_t stage_timeout_ticks = (uint32_t)((uint64_t)CONFIG_BOOTLOADER_WDT_TIME_MS * rtc_clk_slow_freq_get_hz() / 1000);
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC);
wdt_hal_enable(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
wdt_hal_context_t wdt_ctx = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_write_protect_disable(&wdt_ctx);
wdt_hal_set_flashboot_en(&wdt_ctx, false);
wdt_hal_write_protect_enable(&wdt_ctx);
}
static void bootloader_init_uart_console(void)
{
const int uart_num = 0;

38
boot/espressif/hal/src/esp32s2/bootloader_init.c
View File

@ -26,6 +26,7 @@
#include "soc/extmem_reg.h"
#include "soc/io_mux_reg.h"
#include "bootloader_wdt.h"
#include "hal/wdt_hal.h"
#include "esp32s2/rom/cache.h"
@ -33,12 +34,7 @@
#include "esp32s2/rom/spi_flash.h"
#include "esp32s2/rom/uart.h"
esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
void bootloader_clear_bss_section(void)
{
memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
}
extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
static void bootloader_reset_mmu(void)
{
@ -51,14 +47,6 @@ static void bootloader_reset_mmu(void)
REG_CLR_BIT(EXTMEM_PRO_ICACHE_CTRL1_REG, EXTMEM_PRO_ICACHE_MASK_DROM0);
}
esp_err_t bootloader_read_bootloader_header(void)
{
if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &bootloader_image_hdr, sizeof(esp_image_header_t), true) != ESP_OK) {
return ESP_FAIL;
}
return ESP_OK;
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)
{
uint32_t size;
@ -132,28 +120,6 @@ static esp_err_t bootloader_init_spi_flash(void)
return ESP_OK;
}
void bootloader_config_wdt(void)
{
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_set_flashboot_en(&rtc_wdt_ctx, false);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#ifdef CONFIG_ESP_MCUBOOT_WDT_ENABLE
wdt_hal_init(&rtc_wdt_ctx, WDT_RWDT, 0, false);
uint32_t stage_timeout_ticks = (uint32_t)((uint64_t)CONFIG_BOOTLOADER_WDT_TIME_MS * rtc_clk_slow_freq_get_hz() / 1000);
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC);
wdt_hal_enable(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
wdt_hal_context_t wdt_ctx = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_write_protect_disable(&wdt_ctx);
wdt_hal_set_flashboot_en(&wdt_ctx, false);
wdt_hal_write_protect_enable(&wdt_ctx);
}
static void bootloader_init_uart_console(void)
{
const int uart_num = 0;

38
boot/espressif/hal/src/esp32s3/bootloader_init.c
View File

@ -33,6 +33,7 @@
#include "soc/io_mux_reg.h"
#include "soc/assist_debug_reg.h"
#include "bootloader_wdt.h"
#include "hal/wdt_hal.h"
#include "esp32s3/rom/cache.h"
@ -45,12 +46,7 @@
static const char *TAG = "boot.esp32s3";
esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
void bootloader_clear_bss_section(void)
{
memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
}
extern esp_image_header_t WORD_ALIGNED_ATTR bootloader_image_hdr;
static void bootloader_reset_mmu(void)
{
@ -62,14 +58,6 @@ static void bootloader_reset_mmu(void)
REG_CLR_BIT(EXTMEM_ICACHE_CTRL1_REG, EXTMEM_ICACHE_SHUT_CORE1_BUS);
}
esp_err_t bootloader_read_bootloader_header(void)
{
if (bootloader_flash_read(ESP_BOOTLOADER_OFFSET, &bootloader_image_hdr, sizeof(esp_image_header_t), true) != ESP_OK) {
return ESP_FAIL;
}
return ESP_OK;
}
static void update_flash_config(const esp_image_header_t *bootloader_hdr)
{
uint32_t size;
@ -154,28 +142,6 @@ static esp_err_t bootloader_init_spi_flash(void)
return ESP_OK;
}
void bootloader_config_wdt(void)
{
wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_set_flashboot_en(&rtc_wdt_ctx, false);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#ifdef CONFIG_ESP_MCUBOOT_WDT_ENABLE
wdt_hal_init(&rtc_wdt_ctx, WDT_RWDT, 0, false);
uint32_t stage_timeout_ticks = (uint32_t)((uint64_t)CONFIG_BOOTLOADER_WDT_TIME_MS * rtc_clk_slow_freq_get_hz() / 1000);
wdt_hal_write_protect_disable(&rtc_wdt_ctx);
wdt_hal_config_stage(&rtc_wdt_ctx, WDT_STAGE0, stage_timeout_ticks, WDT_STAGE_ACTION_RESET_RTC);
wdt_hal_enable(&rtc_wdt_ctx);
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif
wdt_hal_context_t wdt_ctx = {.inst = WDT_MWDT0, .mwdt_dev = &TIMERG0};
wdt_hal_write_protect_disable(&wdt_ctx);
wdt_hal_set_flashboot_en(&wdt_ctx, false);
wdt_hal_write_protect_enable(&wdt_ctx);
}
static void bootloader_init_uart_console(void)
{
const int uart_num = 0;